JP4411040B2 - Surface emitting semiconductor laser - Google Patents

Description

  The present invention relates to a surface emitting semiconductor laser.

A VCSEL (Vertical Cavity Surface Emitting Laser), that is, a surface emitting semiconductor laser as shown in FIG. 1, is provided on a semiconductor substrate (GaAs substrate), a lower DBR (Distributed Bragg Reflector), a spacer layer, and an active layer. A layer, a spacer layer, and an upper DBR are sequentially stacked, and the upper DBR to at least the surface of the lower DBR are etched into a columnar stacked structure (mesa structure). An insulating layer (SiO ₂ ) is formed on the side surface of the mesa structure. A protective film (polyimide) for protecting the mesa side surface is provided. An upper electrode is formed on the upper DBR and on the protective film except for an opening serving as a light output portion. A lower electrode is formed on the back surface of the GaAs substrate.

  Here, a polyimide protective film is often used as a protective film for embedding the periphery of the mesa structure.

  The surface-emitting type semiconductor laser has the characteristics that the threshold current Ith is smaller than that of the edge-emitting type semiconductor laser and the beam divergence angle is small. However, as compared with the edge-emitting semiconductor laser, there is a drawback that the thermal resistance of the element is large and the heat dissipation is poor. In the semiconductor laser, when the element becomes high temperature, its characteristics change and the output decreases. In addition, when the operation is performed at a high temperature, the temporal change of the element becomes a problem. Therefore, an element structure with higher heat dissipation efficiency is desired.

  The thermal resistance of the surface emitting semiconductor laser is 1000 (K / W) or more, whereas the thermal resistance of the edge emitting semiconductor laser is as small as several tens to several hundreds (K / W). This is mainly due to the fact that the surface-emitting type semiconductor laser cannot have a large active layer area due to its structure and that the active layer is sandwiched between DBR layers having poor thermal conductivity.

Conventionally, many methods for improving heat dissipation characteristics have been proposed for surface emitting semiconductor lasers. FIG. 10 is a diagram showing a surface emitting semiconductor laser disclosed in Patent Document 1. In FIG. Referring to FIG. 10, the surface emitting semiconductor laser disclosed in Patent Document 1 has a structure in which a mesa structure is embedded with metal, thereby reducing thermal resistance and improving heat dissipation. Many other surface emitting semiconductor laser structures with improved heat dissipation have been proposed in which a member having good thermal conductivity, such as SiN, is embedded around the mesa structure.
Japanese Patent Laid-Open No. 10-261830

  However, just by embedding a high thermal conductivity material around the mesa structure as in the prior art described above, the heat dissipation is not so much improved. In other words, in order to release heat, a part of the heat conductive material must be at a temperature lower than that of the active layer, and heat transfer does not occur in the state shown in FIG. 10, so the temperature of the active layer is lowered. I can't.

  An object of the present invention is to provide a surface emitting semiconductor laser that solves the above-described drawbacks of the prior art and has a high heat dissipation effect.

To achieve the above object, an invention according to claim 1, on a semiconductor substrate, at least, a lower DBR and an active layer and an upper DBR is laminated to the surface of at least a lower DBR from the upper DBR is met mesa structure In the surface emitting semiconductor laser in which the lower electrode is formed on the back surface of the semiconductor substrate and the upper electrode is formed on the mesa structure , a through hole is formed from the lower DBR to the bottom of the semiconductor substrate, and the through hole Is filled with high thermal conductivity members ,
The high heat conductive member is a conductive member, and is electrically connected to the upper electrode, and is further exposed to be electrically insulated from the lower electrode on the back surface of the semiconductor substrate .

The invention of claim 2, in the surface-emitting type semiconductor laser according to claim 1 Symbol placement, is characterized by GaInNAs-based material is used as the material of the active layer.

According to the first and second aspects of the present invention, since the through holes are arranged from the lower DBR to the bottom of the semiconductor substrate to radiate heat from the lower DBR, the thermal resistance can be further reduced.

In particular, the invention according to claim 1 has a structure in which the upper electrode also serves as a heat path for heat dissipation, and is further connected to the submount through the through hole, so that not only the thermal resistance can be reduced but also the mounting can be facilitated. it can.

  Hereinafter, the best mode for carrying out the present invention will be described.

  The inventors of the present application have devised a VCSEL structure capable of reducing the thermal resistance as compared with the prior art by considering the heat conduction of the VCSEL structure in detail. The results of the study are described below.

  In the VCSEL having the conventional structure shown in FIG. 1, a case is considered in which heat generated in the active layer conducts through each layer and escapes to a copper (Cu) heat sink. In the analysis, the heat spread was assumed to be 45 degrees.

FIG. 2 is a view showing a cross section of a plate-like heat conducting member for considering thermal resistance. In the drawing, T _H is the heat source temperature, T _L is the temperature at the bottom of the substrate, and T _H > T _L. Assuming that the heat escapes to the back side of the substrate having a thickness h with a 45 ° spread from a circular φ2a heat source as shown in FIG. ) Is guided.

  In Equation 1, λ is the thermal conductivity, a is the radius of the heat source, and h is the thickness of the layer. It can be seen from Equation 1 that the thermal resistance is inversely proportional to the diameter a of the heat source when the spread of heat is taken into consideration.

In the surface emitting semiconductor laser structure as shown in FIG. 1, the thermal resistance can be calculated by applying the above equation 1 to each layer. Below, the thermal resistance of a 1.3 μm wavelength surface emitting semiconductor laser is estimated. Using the active layer as a heat source, the GaAs spacer layer has a thickness of 0.162 (μm), a thermal conductivity of 44 (W / (m · K)), and an Al _0.9 Ga _0.1 As / GaAs lower DBR layer. Has a thickness of 6.9 (μm) and a thermal conductivity of 29.7 (W / (m · K)), and an n-GaAs substrate has a thickness of 200 (μm) and a thermal conductivity of 44 (W / (m · K). K)), the AuSn solder layer has a thickness of 3 (μm) and a thermal conductivity of 251 (W / (m · K)), the AlN submount has a thickness of 200 (μm) and a thermal conductivity of 190 (W / (M · K)), and in a stacked structure in which the heat sink of copper is thermal conductivity 393 (W / (m · K)), the diameter of the current confinement layer opening (current injection portion) is 15 μm Is estimated to be 1153 (K / W).

Further, if the change in the thermal resistance _Rth with respect to the diameter D of the current confinement layer opening (current injection portion) is calculated, the relationship shown in FIG. 3 is obtained, and the diameter of the confinement layer opening (current injection portion) decreases. It can be seen that the thermal resistance _Rth increases abruptly. This explains the experimental results well.

Next, the temperature rise of the active layer is estimated. For example, in the case of a surface emitting semiconductor laser having a driving current I _op = 10 (mA), a forward voltage V _F = 2 (V), and an optical output P _O = 0.8 (mW), the power converted into heat Since P _L = 19.2 (mW), when the thermal resistance R _th = 1153 (K / W), the active layer is R _th × P _L = 22.1 (rather than the ambient temperature (heat sink temperature)). deg) is expected to increase in temperature. FIG. 4 shows a plot of the temperature profile over the distance from the copper heat sink surface to the VCSEL active layer. As can be seen from FIG. 4, the temperature varies greatly between the GaAs substrate and the lower DBR, which have a large thermal resistance.

As a result of the thermal analysis, in order to reduce the thermal resistance of the VCSEL,
(1) increase the mesa radius of the active layer;
(2) reducing the thermal resistance of the lower DBR;
(3) reducing the thermal resistance of the GaAs semiconductor substrate;
These three methods were found to be effective.

  Among the above three methods, since the method (1) is limited due to device characteristics, the thermal resistance reduction measures (2) and (3) were examined.

  First, in order to reduce the thermal resistance of the GaAs substrate, it is effective to make the substrate thinner. In order to prevent the mechanical strength from being reduced by making the substrate thinner, the inventors of the present application have devised a structure in which the GaAs substrate immediately below the active layer is thinned into a groove shape and the groove is filled with a high thermal conductivity member. did.

FIG. 5 shows the dependence of the thermal resistance _{Rth on} the thickness of the GaAs substrate in a structure in which the GaAs substrate immediately below the active layer is thinned into a groove shape and the groove is filled with a high thermal conductivity member. In the example of FIG. 5, the thickness of a 200 (μm) GaAs substrate is reduced, and the thermal resistance is calculated with a structure in which the shaved thickness is filled with gold of a high thermal conductivity member. The thermal resistance at a GaAs substrate thickness of 200 (μm) was 1153 (K / W), but at a substrate thickness of 50 μm and a gold filling thickness of 150 μm, the thermal resistance _Rth was 1085 (K / W), Furthermore, when all the GaAs substrates were removed (substrate thickness 50 μm, gold filling thickness 150 μm), it was predicted that the thermal resistance _Rth could be reduced to 754 (K / W).

  In this way, by making the GaAs substrate immediately below the active layer thin into a groove shape and filling the groove with a high thermal conductivity member, the thermal resistance can be reduced while suppressing a decrease in mechanical strength. .

  In addition, as a means of reducing the thermal resistance of the lower DBR, the inventor of the present application forms a heat path (heat path) around the mesa structure with a high thermal conductive member, and further passes the heat path through the lower DBR and the GaAs substrate. And devised a VCSEL structure thermally connected to the submount.

  Thus, by newly providing a heat path, the thermal resistance of the VCSEL can be reduced.

  As described above, according to the first aspect of the present invention, at least the lower DBR, the active layer, and the upper DBR are stacked on the semiconductor substrate, and the mesa structure is formed from the upper DBR to at least the surface of the lower DBR. In the surface emitting semiconductor laser, a groove is formed in the semiconductor substrate immediately below the mesa structure, and the groove is filled with a high thermal conductive member. Thereby, a surface emitting semiconductor laser having a high heat dissipation effect can be provided.

  In the surface-emitting type semiconductor laser according to the first embodiment, the high thermal conductive member is, for example, a conductive member.

  Alternatively, in the surface-emitting type semiconductor laser according to the first embodiment, the high thermal conductivity member is, for example, an insulating member.

  In the surface-emitting type semiconductor laser according to the first embodiment, the width of the groove is preferably 2a + 2h or more when the thickness from the active layer having a mesa dimension 2a to the bottom of the semiconductor substrate is h.

  As a second mode of the present invention, at least a lower DBR, an active layer, and an upper DBR are stacked on a semiconductor substrate, and a mesa structure is formed from the upper DBR to at least the surface of the lower DBR. In the light emitting semiconductor laser, a through hole is formed from the lower DBR to the bottom of the semiconductor substrate, and the through hole is filled with a high thermal conductive member. As described above, since the through holes are arranged from the lower DBR to the bottom of the semiconductor substrate to dissipate heat from the lower DBR, the thermal resistance can be further reduced.

  In the surface-emitting type semiconductor laser according to the second embodiment, the high thermal conductive member is, for example, a conductive member.

  Alternatively, in the surface-emitting type semiconductor laser according to the second embodiment, the high thermal conductivity member is, for example, an insulating member.

  In the surface-emitting type semiconductor laser according to the second embodiment, the high thermal conductivity member is, for example, a conductive member, and is electrically connected to the upper electrode. Further, the lower electrode is electrically connected to the back surface of the semiconductor substrate. It can be configured to be insulated and exposed.

  In the surface-emitting semiconductor laser of the first or second embodiment, a GaInNAs-based material is preferably used as the material of the active layer.

  FIG. 6 is a view showing a surface emitting semiconductor laser (surface emitting semiconductor laser in which the thermal resistance is reduced by thinning a GaAs substrate) of Example 1 of the present invention. Specifically, this surface emitting semiconductor laser is configured as a 1.3 μm wavelength GaInNAs surface emitting laser.

Referring to FIG. 6, a groove having a depth d is formed in a part of the back surface of an n-GaAs substrate having a thickness L of about 200 μm, and at least the thermal conductivity of the GaAs substrate is higher in this groove. A heat conductive member (for example, gold (Au)) is embedded. On the GaAs substrate, 35 cycles of n-Al _x Ga _1-x As (x = 0.9) and n-GaAs were alternately stacked with a thickness of ¼ times the oscillation wavelength in each medium. An n-semiconductor distributed Bragg reflector having a periodic structure (lower semiconductor distributed Bragg reflector: simply referred to as a lower reflector (lower DBR)) is formed. On the lower DBR, an undoped lower GaAs spacer layer, a multi-quantum well active layer composed of four GaInNAs well layers and five GaNPAs barrier layers, an undoped upper GaAs spacer layer, a p-semiconductor distributed Bragg reflector ( Upper semiconductor distributed Bragg reflector: simply upper reflector (also referred to as upper DBR) is formed.

Here, the upper DBR is made of C-doped p-Al _x Ga _1-x As (x = 0.9) and p-GaAs alternately with a thickness of 1/4 times the oscillation wavelength in each medium. It is composed of a stacked periodic structure (for example, 25 periods). In the example of FIG. 6, a selective oxidation layer made of AlAs is provided with a thickness of, for example, 30 nm at a position near the active layer in the upper DBR. The uppermost p-GaAs layer of the upper DBR also serves as a contact layer that contacts the electrode.

  The In composition x of the well layer in the active layer is 33%, the nitrogen composition is 1.0%, the thickness of the well layer is 7 nm, and the well layer is compressed to about 2.1% with respect to the GaAs substrate. Has strain (high strain). The GaNPAs barrier layer has an N composition of 0.8%, a P composition of 4%, a thickness of 20 nm, and a tensile strain of 0.3% with respect to the GaAs substrate.

  Next, a manufacturing method of the 1.3 μm wavelength surface emitting semiconductor laser of Example 1 will be described.

the n-GaAs substrate by using a MOCVD or MBE, 1/4 times the thickness of the oscillation wavelength in the respective medium _{n-Al x Ga 1-x} As (x = 0.9) and n- A lower DBR layer having a periodic structure in which 35 cycles of GaAs are alternately stacked, an undoped lower GaAs spacer layer, a multi-quantum well active layer including four GaInNAs well layers and five GaNPAs barrier layers, and an undoped upper GaAs An upper DBR layer having a periodic structure in which p-Al _x Ga _1-x As (x = 0.9) including an AlAs layer as a selective oxidation layer and p-GaAs are alternately stacked for 25 periods; -GaAs layers are grown sequentially.

  Next, the mesa structure is formed by dry etching from the p-GaAs layer to the lower DBR surface by RIE or the like, and the side surface of the AlAs selective oxidation layer is exposed.

  Next, in the water vapor atmosphere, the exposed AlAs layer is heated to oxidize AlAs, thereby forming a current confinement layer made of insulating AlO. The current confinement layer serves to locally increase the current density in the active layer region and lower the threshold current.

Next, an SiO ₂ film is formed on the surface as an insulating layer using plasma CVD.

Next, the etched portion is filled with polyimide and planarized, the polyimide in the light emitting portion of the p-GaAs contact layer is removed, and the SiO ₂ film is removed by etching.

  Next, a p-side electrode formed by sequentially depositing Ti / Pt / Au on a part of the p-GaAs contact layer is formed.

  Thereafter, the surface is protected, and the GaAs substrate immediately below the mesa structure is used as a mask to remove all or a part thereof.

  Next, Ti / Au is thinly deposited while leaving the resist, and a base metal film for plating is formed on the bottom of the GaAs substrate groove. Thereafter, the back resist is removed, and gold is grown to a predetermined thickness by electroless plating.

  Finally, an n-side electrode formed by sequentially depositing Ti / Pt / Au is formed on the entire back surface of the n-GaAs substrate, and the resist on the surface is removed to complete the surface emitting semiconductor laser of Example 1. .

  In the structure of FIG. 6, the width of the groove formed at the bottom of the GaAs substrate is important. The width of the groove is selected in consideration of the spread of heat from the active layer. As a result, the width W of the groove is 2a + 2h or more when the thickness from the active layer to the bottom of the GaAs substrate is h in consideration of the spread of heat from the heat source (active layer) having the mesa size 2a. It is necessary to select a suitable dimension.

The groove can be filled using, for example, gold as a groove filling member after etching the GaAs substrate. In addition, as a filling member, metals other than gold, for example, silver, copper, tin, magnesium, nickel, etc. can also be used, and the same effect is acquired even with these metals. In addition, as the filling member, an insulating member having a high thermal conductivity can be used. In this case, the same effect can be obtained. As such an insulating member, AlN, BN, BeO, SiC, or the like can be used.

  FIG. 7 is a diagram showing a surface emitting semiconductor laser according to Example 2 of the present invention. In the surface-emitting type semiconductor laser of Example 2, all the GaAs substrate in Example 1 was removed, and a heat conductive member (eg, gold (Au)) higher than the thermal conductivity of the GaAs substrate was embedded therein. Thus, the heat dissipation effect can be further improved.

  FIG. 8 is a diagram showing a surface emitting semiconductor laser according to Example 3 of the present invention. The surface-emitting type semiconductor laser of Example 3 has a structure that reduces the thermal resistance of the lower DBR. That is, in the surface emitting semiconductor laser of Example 3, the structure on the GaAs substrate is the same as that of Example 1, but in order to reduce the thermal resistance of the lower DBR, high thermal conductivity is provided on the lower DBR around the mesa structure. A heat path made of a member is formed, and a through hole from the lower DBR to the back surface of the GaAs substrate is formed, and the through hole is filled with a high heat conductive member.

  Thus, by disposing the high thermal conductivity member on the lower DBR and connecting it to the submount through the through hole, it is possible to dissipate the heat generated in the active layer to the submount through the heat path on the lower DBR. Therefore, the thermal resistance of the element can be reduced as compared with the conventional case.

  Next, a manufacturing method of the 1.3 μm wavelength surface emitting semiconductor laser of Example 3 will be described.

the n-GaAs substrate by using a MOCVD or MBE, 1/4 times the thickness of the oscillation wavelength in the respective medium _{n-Al x Ga 1-x} As (x = 0.9) and n- A lower DBR layer having a periodic structure in which 35 cycles of GaAs are alternately stacked, an undoped lower GaAs spacer layer, a multi-quantum well active layer including four GaInNAs well layers and five GaNPAs barrier layers, and an undoped upper GaAs An upper DBR layer having a periodic structure in which p-Al _x Ga _1-x As (x = 0.9) including an AlAs layer as a selective oxidation layer and p-GaAs are alternately stacked for 25 periods; -GaAs layers are grown sequentially.

  Next, the mesa structure is formed by dry etching from the p-GaAs layer to the lower DBR surface by RIE, and the side surface of the AlAs selective oxidation layer is exposed.

  Next, in a water vapor atmosphere, the exposed AlAs layer is heated to oxidize AlAs to form a current confinement layer as an insulating AlO oxide layer. The current confinement layer serves to locally increase the current density in the active layer region and lower the threshold current.

  Next, a resist pattern that opens a part of the substrate surface is formed, and dry etching is performed by RIE using the resist as a mask to form a through hole from the lower DBR to the back surface of the GaAs substrate.

  Next, the mesa structure portion is masked with a resist, and Ti / Au as a plating base metal is sequentially formed by sputtering.

  Next, gold is formed into a predetermined thickness by electrolysis or electroless plating as a heat conducting member to form a heat path serving as a heat path.

Next, the etched portion is filled with polyimide and planarized, the polyimide in the light emitting portion of the p-GaAs contact layer is removed, and the SiO ₂ film is removed by etching.

  Next, a p-side electrode formed by sequentially depositing Ti / Pt / Au on a part of the p-GaAs contact layer is formed.

  Finally, an n-side electrode formed by sequentially depositing Ti / Pt / Au is formed on the entire back surface of the substrate, and the surface resist is removed to complete the surface emitting semiconductor laser of Example 3.

  In the above example, gold is used as the heat path, but other metals such as silver, copper, tin, magnesium, nickel, etc. can be used, and the same effect can be obtained with these metals. In addition, an insulating member having high thermal conductivity can be used as the heat path, and the same effect can be obtained in this case. As such an insulating member, AlN, BN, BeO, SiC, or the like can be used.

  FIG. 9 is a diagram showing a surface emitting semiconductor laser according to Example 4 of the present invention. The surface emitting semiconductor laser of this Example 4 also has a structure that reduces the thermal resistance of the lower DBR, as in Example 3. That is, in the surface-emitting type semiconductor laser of Example 4, the structure on the GaAs substrate is the same as that of Example 1, but as in Example 3, a through hole from the lower DBR to the GaAs substrate is formed, and this through-hole is formed. The hole is filled with a high thermal conductivity member. Furthermore, in Example 4, the high heat conductive member filled on the lower DBR and in the through hole is conductive (for example, gold), and this high heat conductive member also serves as the upper electrode (p-side electrode). Yes.

  Next, a manufacturing method of the 1.3 μm wavelength surface emitting semiconductor laser of Example 4 will be described.

the n-GaAs substrate by using a MOCVD or MBE, 1/4 times the thickness of the oscillation wavelength in the respective medium _{n-Al x Ga 1-x} As (x = 0.9) and n- A lower DBR layer having a periodic structure in which 35 cycles of GaAs are alternately stacked, an undoped lower GaAs spacer layer, a multi-quantum well active layer including four GaInNAs well layers and five GaNPAs barrier layers, and an undoped upper GaAs An upper DBR layer having a periodic structure in which p-Al _x Ga _1-x As (x = 0.9) including an AlAs layer as a selective oxidation layer and p-GaAs are alternately stacked for 25 periods; -GaAs layers are grown sequentially.

  Next, a mesa structure is formed by etching from the p-GaAs layer to the lower DBR surface, and the side surface of the AlAs selectively oxidized layer is exposed. Etching is performed by RIE using chlorine gas using a resist as a mask.

  Next, in a water vapor atmosphere, the exposed AlAs layer is heated to oxidize AlAs to form a current confinement layer as an insulating AlO oxide layer. The current confinement layer serves to locally increase the current density in the active layer region and lower the threshold current.

  Next, a resist pattern that opens a part of the substrate surface is formed, and dry etching is performed using the resist as a mask to form a through hole from the lower DBR to the back surface of the GaAs substrate.

  Next, the mesa structure portion is masked with a resist, and Ti / Au as a plating base metal is sequentially formed by sputtering.

  Next, gold is formed as a heat conductive member to a predetermined thickness by electrolysis or electroless plating to form a heat path.

Next, the etched portion is filled with polyimide and planarized, the polyimide in the light emitting portion of the p-GaAs contact layer is removed, and the SiO ₂ film is removed by etching.

  Next, a p-side electrode is formed in addition to the light emitting part on the p-GaAs layer having the light emitting part.

  Finally, an n-side electrode formed by sequentially depositing Ti / Pt / Au on the entire back surface of the substrate is formed, and the resist on the surface is removed to complete the surface emitting semiconductor laser of Example 4.

  In the surface-emitting type semiconductor laser of Example 4, the conductive heat path disposed on the lower DBR has a structure also serving as the p-side electrode. Therefore, the p-side electrode is disposed on the back surface of the GaAs substrate in the same manner as the n-side electrode. As a result, there is an advantage that the electrode can be easily taken out.

In the above example, gold is used as the heat path, but the same effect can be obtained with other metals such as silver, copper, tin, magnesium, and nickel. In addition, an insulating member having high thermal conductivity can be used as the heat path, and the same effect can be obtained in this case. As such an insulating member, AlN, BN, BeO, SiC, or the like can be used.

It is a figure which shows the conventional surface emitting semiconductor laser. It is a figure which shows the cross section of the plate-shaped heat conductive member for considering thermal resistance. It is a figure which shows the change of the thermal resistance _Rth with respect to the diameter D of an electric current confinement layer opening part (current injection part). It is a figure which shows the temperature profile in the distance to the VCSEL active layer from the copper heat sink surface. It is a figure which shows the GaAs substrate thickness dependence of thermal resistance _Rth in the structure where the GaAs substrate immediately under the active layer was thinned into a groove shape, and the groove was filled with a high thermal conductivity member. It is a figure which shows the surface emitting semiconductor laser (surface emitting semiconductor laser which reduced the thermal resistance by thinning a GaAs substrate) of Example 1 of this invention. It is a figure which shows the surface emitting semiconductor laser of Example 2 of this invention. It is a figure which shows the surface emitting semiconductor laser of Example 3 of this invention. It is a figure which shows the surface emitting semiconductor laser of Example 4 of this invention. 1 is a diagram showing a surface emitting semiconductor laser disclosed in Patent Document 1. FIG.

Claims (2)

At least a lower DBR, an active layer, and an upper DBR are stacked on a semiconductor substrate, a mesa structure is formed from the upper DBR to at least the surface of the lower DBR , a lower electrode is formed on the back surface of the semiconductor substrate, and the mesa In a surface emitting semiconductor laser having an upper electrode formed on the upper part of the structure, a through hole is formed from the lower DBR to the bottom of the semiconductor substrate, and the through hole is filled with a high thermal conductivity member ,
The high thermal conductive member is a conductive member, and is electrically connected to the upper electrode, and is further exposed on the back surface of the semiconductor substrate electrically insulated from the lower electrode. Semiconductor laser. In the surface-emitting type semiconductor laser according to claim 1 Symbol placement, surface-emitting type semiconductor laser, wherein a GaInNAs-based material is used as the material of the active layer.

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