JP4423303B2 - Frequency conversion circuit - Google Patents

Description

  The present invention relates to a frequency conversion circuit, and more particularly to a mixer circuit applied to a wireless receiver such as a mobile phone or a wireless LAN.

  Recently, as the CMOS process becomes finer, a mixer circuit that operates at a low voltage of, for example, 1.5 V to 1.8 V has become necessary. Conventionally, as a mixer circuit capable of operating at a low voltage, a folding type or transformer input type mixer circuit is known. This type of mixer circuit has a problem in that the amplitude of the local oscillation signal varies due to the nonlinearity of the transistors constituting the local oscillator, and the common-mode voltage of the signal output from the mixer circuit varies. As described above, when the common-mode voltage fluctuates, it adversely affects the operation of the circuit in the next stage.

As a method for realizing the common-mode voltage stabilization, for example, in a general mixer using a Gilbert cell, a parallel circuit of a constant current source as a resistance load and an active load is connected to the output terminal, and A method of detecting a fluctuation component and controlling a constant current source has been developed. As a related technique, a circuit using a differential low noise amplifier (LNA) and a folded cascode mixer has been developed to reduce common mode noise (see, for example, Non-Patent Document 1). Further, a circuit has been developed in which a center tap FET resistor is connected between output terminals of a mixer using a Gilbert cell, and a common mode is fed back from the center tap (for example, Non-Patent Document 2).
Kwang-jin Koh et al., “A Merged Gain-Variable RF Front-end Design for a 2GHz WCDMA DCR Application I” IEEE MWSCAS pp. 453-456, 2002 Ahmadreza Rofougaran et al, “A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless Receiver” IEEE Journal of Solid-State Circuits, Vol. 31, No. 7, July 1996

  However, when the conventional common mode feedback method is applied to a mixer circuit operating at a low voltage, it is necessary to use an active load composed of a constant current source for adjusting the common-mode voltage at the output section of the mixer circuit. For this reason, especially in the case of a mixer circuit for direct conversion using CMOS technology, there is a problem that the noise figure (NF) characteristics deteriorate due to the influence of flicker noise and thermal noise of the MOS transistor constituting the output portion of the mixer. ing.

  The present invention intends to provide a frequency conversion circuit capable of suppressing the influence of noise and preventing the deterioration of the NF characteristic.

According to a first aspect of the frequency conversion circuit of the present invention, the first and second input terminals to which a high frequency signal is input, the third and fourth input terminals to which a local oscillation signal is supplied, and the high frequency signal A double balanced mixer having first and second output terminals for outputting an output signal mixed with the local oscillation signal, and a bias voltage applied to the local oscillation signal, connected to the third and fourth input terminals. Bias voltage generating circuit to be supplied, first and second resistors connected between the first and second output terminals and the ground, and a common-mode voltage output from the first and second output terminals of the mixer A common-mode voltage feedback circuit that amplifies the difference between the fluctuation component and the reference voltage and supplies the difference to the third and fourth input terminals, and the common- mode voltage feedback circuit is connected between the first and second output terminals. And a common-mode voltage detection circuit connected to the A differential amplifier that amplifies a difference between a phase voltage fluctuation component and the reference voltage, and the common-mode voltage feedback circuit includes first and second gates connected to the first and second output terminals, respectively. A MOS transistor; third and fourth MOS transistors whose gates are supplied with a reference voltage; a first current source that supplies a constant current to one end of a current path of the first and third MOS transistors; A second current source for supplying a constant current to one end of the current path of the second and fourth MOS transistors; a current mirror circuit for extracting a current flowing through the other end of the current path of the third and fourth MOS transistors; It is characterized by comprising.
According to a second aspect of the frequency conversion circuit of the present invention, the first and second input terminals to which a high frequency signal is input, the third and fourth input terminals to which a local oscillation signal is supplied, and the high frequency signal A double balanced mixer having first and second output terminals for outputting an output signal mixed with the local oscillation signal, and a bias voltage applied to the local oscillation signal, connected to the third and fourth input terminals. Bias voltage generating circuit to be supplied, first and second resistors connected between the first and second output terminals and the ground, and a common-mode voltage output from the first and second output terminals of the mixer A common-mode voltage feedback circuit that amplifies the difference between the fluctuation component and the reference voltage and supplies the difference to the third and fourth input terminals, and the common-mode voltage feedback circuit is connected between the first and second output terminals. And a common-mode voltage detection circuit connected to the A differential amplifier that amplifies a difference between a phase voltage fluctuation component and the reference voltage, and the common-mode voltage detection circuit includes fifth and sixth terminals connected in series between the first and second output terminals. It is constituted by a MOS transistor, a constant voltage is supplied to the gates of the fifth and sixth MOS transistors, and a connection node of the fifth and sixth MOS transistors is supplied to the differential amplifier. And
According to a third aspect of the frequency conversion circuit of the present invention, the first and second input terminals to which a high frequency signal is input, the third and fourth input terminals to which a local oscillation signal is supplied, and the high frequency signal A double balanced mixer having first and second output terminals for outputting an output signal mixed with the local oscillation signal, and a bias voltage applied to the local oscillation signal, connected to the third and fourth input terminals. Bias voltage generating circuit to be supplied, first and second resistors connected between the first and second output terminals and the ground, and a common-mode voltage output from the first and second output terminals of the mixer A common-mode voltage feedback circuit that amplifies the difference between the fluctuation component and the reference voltage and supplies the difference to the third and fourth input terminals, and the common-mode voltage feedback circuit is connected between the first and second output terminals. And a common-mode voltage detection circuit connected to the A differential amplifier for amplifying the difference between the phase voltage fluctuation component and the reference voltage; and the common-mode voltage detection circuit includes seventh and eighth gates connected to the first and second output terminals, respectively. A MOS transistor, a current source for supplying current to one end of the current path of each of the seventh and eighth MOS transistors, and a first connected in series between one end of the current path of each of the seventh and eighth MOS transistors. 5. A fifth and sixth resistors are provided, and a connection node of the fifth and sixth resistors is supplied to the differential amplifier.

  ADVANTAGE OF THE INVENTION According to this invention, the frequency converter circuit which can suppress the influence of noise and can prevent deterioration of NF characteristic can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a configuration diagram of a direct conversion mixer circuit according to an embodiment of the present invention. The mixer 11 has first input terminals 11a and 11b, second input terminals 11c and 11d, and output terminals 11e and 11f. The high frequency signals RFin + and RFin− are supplied to the first input terminals 11a and 11b. Local oscillation signals LOin + and LOin− generated by a local oscillation circuit (not shown) are supplied to the second input terminals 11c and 11d of the mixer 11 via the capacitors C1 and C2. Further, a bias voltage generation circuit 12 is connected to the second input terminals 11 c and 11 d, and a bias voltage generated from the bias voltage generation circuit 12 is supplied to the mixer 11.

  For example, baseband signals converted by the mixer 11 are output from the output terminals 11e and 11f. For example, resistive loads 13 and 14 are connected between the output terminals 11e and 11f and the ground, respectively. Further, a common-mode voltage detection circuit 15 is connected to the output terminals 11e and 11f. The common-mode voltage detection circuit 15 detects a fluctuation component of the common-mode voltage output to the output terminals 11e and 11f. The common-mode voltage detection circuit 15 is composed of, for example, resistors 16 and 17 connected in series, and a connection node of the resistors 16 and 17 is connected to one input terminal of a differential amplifier 18 constituting a common mode feedback (CMFB) circuit. Has been. A reference voltage Vref is supplied to the other input terminal of the differential amplifier 18. The reference voltage Vref is generated by a band gap reference circuit (not shown), for example. The differential amplifier 18 amplifies the difference between the output voltage of the common-mode voltage detection circuit 15 and the reference voltage Vref and supplies it to the bias voltage generation circuit 12. The common-mode voltage detection circuit 15 and the differential amplifier 18 constitute a common-mode voltage feedback circuit.

  FIG. 2 is a circuit diagram specifically showing FIG. 1. The same parts as those in FIG. 1 are denoted by the same reference numerals, and only different parts will be described. The mixer 11 is, for example, a double balance type mixer constituted by a plurality of P channel MOS transistors (hereinafter referred to as PMOS) P1 to P4. The sources of the PMOSs P1 and P2 are connected to the supply node of the power source Vdd via the inductor L1 and to the first input terminal 11a. The sources of the PMOSs P3 and P4 are connected to the supply node of the power supply Vdd via the inductor L2, and are also connected to the first input terminal 11b. The gates of the PMOSs P2 and P3 are connected to the second input terminal 11c, and the gates of the PMOSs P1 and P4 are connected to the second input terminal 11d. The drains of the PMOSs P1 and P3 are connected to the output terminal 11e, and the drains of the PMOSs P2 and P4 are connected to the output terminal 11f. Both output terminals of the differential amplifier 18 are connected to the second input terminals 11c and 11d, respectively.

  Although the mixer 11 is composed of a PMOS, it can also be composed of an N-channel MOS transistor (hereinafter referred to as NMOS).

  The bias voltage generation circuit 12 includes a diode-connected PMOS P5, NMOS N1, and resistors 12a and 12b. The source of the PMOS P5 is connected to the supply node of the power supply Vdd, and the gate and drain of the PMOS P5 are connected to the drain of the NMOS N1. The source of the NMOS N1 is grounded, and a constant voltage Vbias is supplied to the gate. The voltage Vbias is generated from a circuit (not shown) and is supplied via, for example, a current mirror circuit. A connection node between the PMOS P5 and the NMOS N1 is connected to the second input terminals 11c and 11d via the resistors 12a and 12b.

  The reason for using the PMOS P5 is to make the matching good because the mixer 11 is composed of PMOS. The NMOS N1 acts as a current source, the current flowing through the NMOS N1 is converted into a voltage by the PMOS P5, and supplied to the mixer 11 as a bias voltage via the resistors 12a and 12b.

  In the above configuration, when the high frequency signals RFin + and RFin− and the local oscillation signals LOin + and LOin− are not input and the size ratio of the PMOSP1 to P4 and the PMOSP5 is, for example, k: 1, the current I flows through the PMOSP5. And The inductors L1 and L2 connected to the mixer 11 are short-circuited with respect to the direct current, and the gates of the PMOSs P1 to P4 are supplied with the same gate voltage from the bias voltage generation circuit 12 via the resistors 12a and 12b. Yes. For this reason, the current kI flows through the PMOSs P1 to P4. The current flowing through the PMOSs P1 to P4 is added to the output terminals 11e and 11f of the mixer 11 and flows. Accordingly, a current 2kI that is twice the current flowing through the PMOSs P1 to P4 flows through the output terminals 11e and 11f, respectively. When the resistance values of the resistance loads 13 and 14 are R, a voltage 2RkI is generated in the resistance loads 13 and 14.

  In the above state, when the high frequency signals RFin + and RFin− and the local oscillation signals LOin + and LOin− are supplied to the mixer 11, the converted baband signals are output to the output terminals 11 e and 11 f of the mixer 11. When the common-mode voltage in the baseband signal fluctuates, the fluctuation component is detected by the resistors 16 and 17 as the common-mode voltage detection circuit 15 and supplied to the differential amplifier 18. The differential amplifier 18 outputs a signal corresponding to the difference voltage between the detected fluctuation component and the reference voltage Vref. The bias voltage of the mixer 11 output from the bias voltage generation circuit 12 is controlled by the output voltage of the differential amplifier 18. Therefore, the fluctuation of the common-mode voltage of the signal output from the mixer 11 is suppressed.

  In general, the relationship between the gate-source voltage Vgs of the MOS transistor and the drain current Id has a square characteristic, and Id increases rapidly as Vgs increases. When the amplitude of the local oscillation signals LOin + and LOin− supplied to the gates of the PMOSs P1 to P4 is small, for example, the current flowing through the PMOSs P1 and P4 decreases and the current flowing through the PMOSs P2 and P3 increases. In the signals of the output terminals 11e and 11f, the decrease and increase of the current are offset, and the change is zero. However, for example, when the amplitudes of the local oscillation signals LOin + and LOin− are large, the decrease amount and the increase amount of the current flowing through the PMOSs P1 to P4 are not equal. Therefore, the common-mode potential varies.

  On the other hand, in the present embodiment, the differential amplifier 18 controls the bias voltage output from the bias voltage generation circuit 12 so that the common-mode voltage becomes constant. Therefore, even when large amplitude local oscillation signals LOin + and LOin− are input, fluctuations in the common-mode potentials of the PMOSs P1 to P4 can be suppressed.

  According to the embodiment, the bias voltage generation circuit 12 is provided at the second input terminals 11c and 11d of the mixer 11, and the bias voltage generation circuit 12 is used to generate the high-frequency signals RFin + and RFin− and the local oscillation signals LOin + and LOin−. The fluctuation of the common mode potential of the mixer output with respect to the fluctuation of the amplitude is indirectly suppressed. For this reason, the load of the output part of the mixer 11 can be comprised only by the resistive loads 13 and 14, and it is not necessary to connect the transistor as an active load like the past. Therefore, the occurrence of flicker noise and thermal noise at the output end can be prevented, and the NF characteristics can be improved.

  In addition, since the common-mode potential can be stabilized by controlling the potential of the second input terminals 11 c and 11 d of the mixer 11 by the bias voltage generation circuit 12, noise of the common mode feedback circuit appears at the output terminal of the mixer 11. Absent. Therefore, noise can be further reduced.

(Modification)
3 and 4 show modifications of the common-mode voltage detection circuit 15 and the differential amplifier 18, and an example of the common-mode voltage feedback circuit 21 in which the common-mode voltage detection circuit 15 and the differential amplifier 18 are constituted by MOS transistors. Is shown.

  The common-mode voltage feedback circuit 21 includes PMOSs P11 to P14, NMOSs N11, N12, and N13, and current sources CS1, CS2, CS3, and CS4. The gates of PMOS P11 and PMOS P14 constituting the common-mode voltage detection circuit 15 are connected to the output terminals 11e and 11f of the mixer 11, respectively. A reference voltage Vref is supplied to the gates of the PMOSP12 and PMOSP13 constituting the differential amplifier 18. The sources of the PMOSs P11 and P12 are connected to the supply node of the power supply Vdd via the current source CS1, and the sources of the PMOSs P13 and P14 are connected to the supply node of the power supply Vdd via the current source CS2. The drains of the PMOS P11 and PMOS P14 are grounded, and the drains of the PMOS P12 and P13 are connected to the drain and gate of the NMOS N11 constituting the current mirror circuit. The source of the NMOS N11 is grounded, and the gate is connected to the gates of the NMOS N12 and NMOS N13. The sources of the NMOSs N12 and N13 are grounded, and the drains are connected to the supply node of the power supply Vdd through the current sources CS3 and CS4, respectively, and are connected to the bias voltage generation circuit 12.

  According to the configuration shown in FIGS. 3 and 4, the common-mode voltage detection circuit 15 and the differential amplifier 18 can be configured by MOS transistors. For this reason, the area occupied by the circuit can be reduced as compared with the case where a resistor is used.

  FIG. 5 shows a modification of the common-mode voltage detection circuit 15 shown in FIGS. The common-mode voltage detection circuit 15 includes PMOSs P31 and P32. The PMOSs P31 and P32 are connected in series to the output terminals 11e and 11f of the mixer 11. A constant voltage Vbias is supplied to the gates of the PMOSs P31 and P32, and a connection node of the PMOSs P31 and P32 is connected to one input terminal of the differential amplifier 18.

  According to the modified example, the PMOSs P31 and P32 can be used as a high resistance. In addition, since the common-mode voltage detection circuit 15 can be composed of only MOS transistors, the area occupied by the circuit can be reduced.

  FIG. 6 shows another modification of the common-mode voltage detection circuit 15 shown in FIGS. The common-mode voltage detection circuit 15 includes resistors 41 and 42, PMOSs P41 and P42, and current sources CS41 and CS42. The gates of the PMOSs P41 and P42 are connected to the output terminals 11e and 11f of the mixer 11, respectively. The drains of the PMOSs P41 and P42 are grounded, and the sources are connected to the supply node of the power supply Vdd via the current sources CS41 and CS42, respectively. Further, resistors R41 and R42 are connected in series between the sources of the PMOSs P41 and P42, and a connection node of these resistors R41 and R42 is connected to one input terminal of the differential amplifier 18. In FIG. 6, PMOSs P41 and P42 constitute a source follower buffer circuit.

  According to the modified example, by using the buffer circuit composed of the PMOSs P41 and P42, the resistance values of the resistors R41 and R42 can be made smaller than the resistors 16 and 17 shown in FIGS. Therefore, this modification can also reduce the area occupied by the circuit.

  FIG. 7 further shows a modification of the present embodiment. The circuit shown in FIG. 7 shows a case where the present invention is applied to a transformer input type mixer, and the same parts as those in FIG.

  In FIG. 7, the high frequency signal RFin + is supplied to the primary winding L1a of the transformer T1, and the secondary winding L1b is connected between the supply node of the power source Vdd and the sources of the PMOSs P1 and P2. The high frequency signal RFin− is supplied to the primary winding L2a of the transformer T2, and the secondary winding L2b is connected between the supply node of the power supply Vdd and the sources of the PMOSs P3 and P4. The high frequency signals RFin + and RFin− supplied to the primary windings L1a and L2a of the transformers T1 and T2 are respectively guided to the corresponding secondary windings L1b and L2b and supplied to the mixer 11. Since other circuit operations are the same as those in the above embodiment, the description thereof is omitted.

  The same effect as that of the above embodiment can be obtained by the transformer input type mixer.

  Of course, various modifications can be made without departing from the scope of the present invention.

The block diagram which shows the mixer circuit which concerns on this embodiment. The circuit diagram which shows the mixer circuit shown in FIG. The block diagram which shows the modification of the common-mode voltage detection circuit and common mode feedback circuit which are shown in FIG. 1, FIG. FIG. 4 is a circuit diagram specifically showing the configuration shown in FIG. 3. FIG. 3 is a circuit diagram showing a modification of the common-mode voltage detection circuit shown in FIGS. 1 and 2. FIG. 3 is a circuit diagram showing another modification of the common-mode voltage detection circuit shown in FIGS. 1 and 2. The circuit diagram which shows the modification of this embodiment and shows the example which applied this invention to the transformer input type mixer.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Mixer, 12 ... Bias voltage generation circuit, 13, 14 ... Resistive load, 15 ... Common-mode voltage detection circuit, 18 ... Differential amplifier, 21 ... Common-mode voltage feedback circuit, T1, T2 ... Transformer

Claims (4)

First and second input terminals to which a high-frequency signal is input, third and fourth input terminals to which a local oscillation signal is supplied, and an output signal in which the local oscillation signal is mixed with the high-frequency signal are output. A double-balanced mixer having first and second output ends;
A bias voltage generating circuit connected to the third and fourth input terminals for supplying a bias voltage to the local oscillation signal;
First and second resistors connected between the first and second output terminals and ground;
A common-mode voltage feedback circuit that amplifies the difference between the fluctuation component of the common-mode voltage output from the first and second output terminals of the mixer and the reference voltage and supplies the difference to the third and fourth input terminals ;
The common-mode voltage feedback circuit includes a common-mode voltage detection circuit connected between the first and second output terminals,
A differential amplifier that amplifies the difference between the fluctuation component of the common-mode voltage detected by the common-mode voltage detection circuit and the reference voltage;
The common-mode voltage feedback circuit includes first and second MOS transistors having gates connected to the first and second output terminals,
Third and fourth MOS transistors whose reference voltage is supplied to the gate;
A first current source for supplying a constant current to one end of a current path of the first and third MOS transistors;
A second current source for supplying a constant current to one end of a current path of the second and fourth MOS transistors;
A frequency conversion circuit comprising: a current mirror circuit for extracting a current flowing in the other end of the current path of the third and fourth MOS transistors . First and second input terminals to which a high-frequency signal is input, third and fourth input terminals to which a local oscillation signal is supplied, and an output signal in which the local oscillation signal is mixed with the high-frequency signal are output. A double-balanced mixer having first and second output ends;
A bias voltage generating circuit connected to the third and fourth input terminals for supplying a bias voltage to the local oscillation signal;
First and second resistors connected between the first and second output terminals and ground;
A common-mode voltage feedback circuit that amplifies the difference between the fluctuation component of the common-mode voltage output from the first and second output terminals of the mixer and the reference voltage and supplies the difference to the third and fourth input terminals;
The common-mode voltage feedback circuit includes a common-mode voltage detection circuit connected between the first and second output terminals,
A differential amplifier that amplifies the difference between the fluctuation component of the common-mode voltage detected by the common-mode voltage detection circuit and the reference voltage;
The common-mode voltage detection circuit includes fifth and sixth MOS transistors connected in series between the first and second output terminals, and a constant voltage is applied to the gates of the fifth and sixth MOS transistors. And a connection node of the fifth and sixth MOS transistors is supplied to the differential amplifier. First and second input terminals to which a high-frequency signal is input, third and fourth input terminals to which a local oscillation signal is supplied, and an output signal in which the local oscillation signal is mixed with the high-frequency signal are output. A double-balanced mixer having first and second output ends;
A bias voltage generating circuit connected to the third and fourth input terminals for supplying a bias voltage to the local oscillation signal;
First and second resistors connected between the first and second output terminals and ground;
A common-mode voltage feedback circuit that amplifies the difference between the fluctuation component of the common-mode voltage output from the first and second output terminals of the mixer and the reference voltage and supplies the difference to the third and fourth input terminals;
The common-mode voltage feedback circuit includes a common-mode voltage detection circuit connected between the first and second output terminals,
A differential amplifier that amplifies the difference between the fluctuation component of the common-mode voltage detected by the common-mode voltage detection circuit and the reference voltage;
The common-mode voltage detection circuit includes seventh and eighth MOS transistors each having a gate connected to the first and second output terminals,
A current source for supplying a current to one end of a current path of each of the seventh and eighth MOS transistors;
Comprising fifth and sixth resistors connected in series between one ends of the current paths of the seventh and eighth MOS transistors;
A frequency conversion circuit, wherein a connection node of the fifth and sixth resistors is supplied to the differential amplifier. The high frequency signal is supplied to the primary winding, and the secondary winding is further connected to the first and second transformers connected between the power supply node and the first and second input ends of the mixer, respectively. The frequency conversion circuit according to any one of claims 1 to 3, further comprising:

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