JP4550039B2 - Manufacturing method of semiconductor integrated circuit device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor integrated circuit device (semiconductor device or the like), and more particularly to a technique effective when applied to the formation of a gate oxide film (insulating film) such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

  In the early semiconductor industry, bubbling in which a carrier gas such as oxygen passes through water in a bubbler has been widely applied. Although this method has the advantage of covering a wide moisture range, it does not avoid the problem of contamination, and has recently been hardly used. Therefore, the oxyhydrogen combustion method, that is, the Pyrogenic system is widely used here to avoid the drawbacks of this bubbler.

(Disclosure of prior art documents, etc.)
The following prior arts are known for the improvement of thermal oxidation and the water generation method therefor that are the subject of the present application.
(1) Japanese Patent Laid-Open No. 6-163517 (patent document 1) of Oomi discloses a low-temperature oxidation technique for reducing the temperature of a semiconductor process. In Example 1, hydrogen was added from 100 ppm to 1% in a gas atmosphere consisting of about 99% argon and about 1% oxygen, and the action of the stainless steel catalyst was performed at a hydrogen combustion temperature of 700 degrees centigrade or less, that is, 450 degrees centigrade or less. Shows how to obtain water vapor. Further, Example 2 shows thermal oxidation of silicon at an oxidation temperature of 600 degrees Celsius under atmospheric pressure or high pressure in an atmosphere composed of 99% oxygen and 1% water vapor generated by a catalyst.
(2) Japanese Patent Laid-Open No. 7-321102 (Yoshikoshi) (Patent Document 2) discloses an extremely low moisture concentration, that is, an extremely low moisture region of about 0.5 ppm or dry in order to avoid various problems caused by moisture. High temperature thermal oxidation of a silicon surface with an oxidation temperature of 850 degrees Celsius in the region is shown.
(3) In Honma et al., Japanese Patent Laid-Open No. 60-107840 (Patent Document 3), in order to reduce the variation in the amount of water due to the environmental moisture of dry oxidation, a small amount of water of about several tens of ppm produced by a conventional method is used. A method for thermal oxidation of intentionally added silicon is shown.
(4) Japanese Patent Laid-Open No. 5-152282 (Omi I) (Patent Document 4) discloses that the inner surface of a hydrogen gas introduction tube is made of Ni (nickel) or in order to prevent generation of particles from the tip of the quartz tube. A thermal oxidation apparatus comprising a Ni-containing material and provided with means for heating a hydrogen gas introduction pipe is disclosed. In this thermal oxidation apparatus, hydrogen is brought into contact with Ni (or Ni-containing material) in a hydrogen gas introduction pipe heated to 300 ° C. or more to generate hydrogen active species, and this hydrogen active species and oxygen (or a gas containing oxygen) To produce water. That is, since water is generated by a catalytic method without combustion, the tip of the hydrogen-introduced quartz tube is not melted to generate particles.
(5) Japanese Laid-Open Patent Publication No. 6-115903 (Omi II) (Patent Document 5) discloses a mixed gas preparation step in which oxygen, hydrogen and an inert gas are mixed to create a first mixed gas, and hydrogen and oxygen. The first mixed gas is introduced into a reaction furnace tube made of a material having a catalytic action that can be radicalized, and the reaction furnace tube is heated to react hydrogen and oxygen contained in the first mixed gas. A catalyst-type water generation method comprising a water generation step for generating water is disclosed.

  According to this method, since the catalyst material for lowering the reaction is used in the reaction tube for reacting hydrogen and oxygen, the reaction temperature is lowered, and as a result, water can be generated at a low temperature. Therefore, when a mixed gas of hydrogen, oxygen, and inert gas is supplied to a heated reaction tube, hydrogen and oxygen completely react at a temperature of 500 ° C. or lower in the reaction tube, so that water is contained at a lower temperature than the combustion method. Gas is obtained.

Also, at this time, if the plastic material is completely removed from the gas contact part and only the metal material is used, and the metal surface is passivated, the gas released from the surface (moisture, hydrocarbon, etc.) ) Is extremely small, it is possible to generate highly clean water with higher accuracy and in a wide range (from ppb to%). The passivation treatment is performed by heat-treating stainless steel subjected to electrolytic polishing or electrolytic composite polishing in an oxidizing or weakly oxidizing atmosphere having an impurity concentration of several ppb or less.
(6) Japanese Patent Application Laid-Open No. 5-141871 (Omi III) (Patent Document 6) discloses an openable and closable opening for carrying in and out an object to be processed, and a gas inlet for introducing gas into the interior. A furnace core tube, a core tube heating means for heating the inside of the core tube, a gas introduction pipe connected in communication with the gas introduction port, and a heating means for heating the gas introduction pipe Discloses a heat treatment apparatus in which at least an inner surface of a gas introduction pipe is made of Ni (or a Ni-containing material).

This thermal oxidizer generates hydrogen active species to generate hydrogen active species without plasma from hydrogen gas or a gas containing hydrogen upstream of the position of the workpiece placed inside the core tube. Means are provided, and hydrogen active species are generated by introducing hydrogen gas or a gas containing hydrogen into the hydrogen active species generating means. Therefore, if a silicon substrate on which an oxide film is formed, for example, is placed in the furnace core tube, hydrogen active species diffuse in the oxide film, and dangling bonds at the oxide film and at the oxide film / silicon interface are formed. Since it is terminated, it can be expected to obtain a highly reliable gate oxide film.
(7) Japanese Patent Application Laid-Open No. 5-144804 (Patent Document 7) of Omi discloses a heat treatment technique of a silicon oxide film by hydrogen active species generated by a nickel catalyst.
(8) On pages 128 to 133 of the 45th Symposium on Semiconductor Integrated Circuit Technology hosted by the Electrochemical Society Electronic Materials Committee held from December 1 to 2 in 1993 (Non-Patent Document 1) Shows a silicon oxidation process in a strongly reducing atmosphere mainly composed of hydrogen radicals generated by a catalyst for application to a tunnel oxide film of flash memory and hydrogen due to moisture.
(9) In Omi, Japanese Patent Laid-Open No. 6-120206 (Patent Document 8), a sintering technique using active hydrogen species generated by a nickel catalyst of an insulating film for insulating and isolating a selective epitaxial growth region is shown.
(10) Kobayashi et al., Japanese Patent Laid-Open No. 59-132136 (Patent Document 9) shows a redox process of silicon and refractory metal in a redox mixed atmosphere of water and hydrogen produced by a conventional method. Has been.
JP-A-6-163517 JP 7-321102 A Japanese Patent Laid-Open No. 60-107840 JP-A-5-152282 JP-A-6-115903 Japanese Patent Laid-Open No. 5-141871 JP-A-5-144804 JP-A-6-120206 JP 59-132136 A Proc. Of the 45th Symposium on Semiconductor Integrated Circuit Technology sponsored by the Electrochemical Society Electronic Materials Committee (pages 128 to 133)

(Considerations on prior art and the present invention)
State-of-the-art MOS devices manufactured according to deep sub-micron design rules are required to form a gate oxide film with a very thin film thickness of 10 nm or less in order to maintain the electrical characteristics of miniaturized elements. . For example, when the gate length is 0.35 μm, the required gate oxide film thickness is about 9 nm, but when the gate length is 0.25 μm, it is expected to be as thin as 4 nm.

  In general, the formation of a thermal oxide film is performed in a dry oxygen atmosphere, but in the case of forming a gate oxide film, a wet oxidation method (generally a water partial pressure ratio number) is conventionally used because the defect density in the film can be reduced. 10% or more) has been used. In this wet oxidation method, hydrogen is burned in an oxygen atmosphere to generate water, and this water is supplied together with oxygen to the surface of a semiconductor wafer (an integrated circuit manufacturing wafer or simply an integrated circuit wafer) to form an oxide film. However, since hydrogen is burned, oxygen is ignited after sufficiently flowing oxygen in advance to avoid the danger of explosion. Further, the water concentration of the water + oxygen mixed gas as the oxidizing species is increased to about 40% (the partial pressure of water in the total atmospheric pressure).

  However, the above combustion method ignites and burns the hydrogen ejected from the nozzle attached to the tip of the quartz hydrogen gas introduction pipe, so if the amount of hydrogen is reduced too much, the flame becomes too close to the nozzle. However, it has been pointed out that the nozzle melts by the heat and particles are generated, which becomes a contamination source of the semiconductor wafer. (On the contrary, if the amount of hydrogen is increased too much, the flame reaches the end of the combustion tube. There are safety problems such as melting the quartz wall of the glass and causing particles, or the flame is cooled by the wall and disappears). Further, in the above combustion method, since the water concentration of the water + oxygen mixed gas which is an oxidizing species is high, hydrogen and OH groups are taken into the gate oxide film, and Si—H is introduced into the thin film and at the interface with the silicon substrate. Structural defects such as bonds and Si—OH bonds are likely to occur. These bonds are broken by the application of voltage stress such as hot carrier injection to form a charge trap, which causes a decrease in electrical characteristics of the film, such as fluctuations in threshold voltage.

  The details of the situation and the details of the improvement of the water synthesis apparatus using the novel catalyst are described in Japanese Patent Application Laid-Open No. 9-172011 by the present inventor himself and the internationally published international application by the present inventor and Ohmi et al. PCT / JP97 / 00188 (international filing date 1997.1.27).

  According to the study of the present inventor, the conventional oxide film forming method is capable of uniformly forming an ultrathin gate oxide film having a high quality and a film thickness of 5 nm or less (the same effect can be expected even when the film thickness is 5 nm or more). It is difficult to form a thin film with good reproducibility. Needless to say, there are various unsatisfactory points even when the film thickness is larger.

  In order to form an ultrathin oxide film with a uniform thickness and good reproducibility, it is necessary to reduce the growth rate of the oxide film compared to the case of forming a relatively thick oxide film and to form the film under more stable oxidation conditions. However, for example, the oxide film forming method using the combustion method can be controlled only within a high concentration range of about 18% to 40% of the water concentration of the water + oxygen mixed gas which is an oxidizing species. Therefore, the growth rate of the oxide film is high, and in the case of a thin oxide film, the film is formed in an extremely short time. On the other hand, if the wafer temperature is lowered to 800 ° C. or lower in order to reduce the oxide film growth rate, the film quality deteriorates (even if the other parameters are appropriately adjusted even in the temperature range of 800 ° C. or lower), Needless to say that can be applied).

  In addition, in order to form a clean oxide film, it is necessary to remove the low-quality oxide film formed on the surface of the semiconductor wafer by wet cleaning in advance. The process of transporting from this wet cleaning process to the oxidation process Thus, a thin natural oxide film is inevitably formed on the surface of the wafer. Further, in the oxidation step, an undesired initial oxide film is formed on the wafer surface by contact with oxygen in the oxidizing species before the original oxidation is performed. In particular, in the case of an oxide film formation method using a combustion method, since the hydrogen is burned after sufficiently flowing oxygen in advance to avoid the danger of hydrogen explosion, the time during which the wafer surface is exposed to oxygen becomes longer. The initial oxide film is formed thickly (explosive combustion of hydrogen, that is, “explosion” occurs when there is sufficient oxygen at 560 degrees Celsius or higher and 4% or higher hydrogen under normal pressure).

  As described above, the actual oxide film includes the natural oxide film and the initial oxide film in addition to the oxide film formed by the original oxidation. The quality is lower than the intended original oxide film. Therefore, in order to obtain a high-quality oxide film, the proportion of these low-quality films in the oxide film must be as low as possible, but an ultra-thin oxide film is formed using conventional oxide film formation methods. As a result, the ratio of these low-quality films is rather increased.

  For example, when an oxide film having a thickness of 9 nm is formed by using a conventional oxide film forming method, the thicknesses of the natural oxide film and the initial oxide film in the oxide film are 0.7 nm and 0.8 nm, respectively. Then, the film thickness of the original oxide film is 9− (0.7 + 0.8) = 7.5 nm, and the ratio of the original oxide film in the oxide film is about 83.3%. However, when an oxide film having a film thickness of 4 nm is formed using this conventional method, the film thicknesses of the natural oxide film and the initial oxide film are not changed to 0.7 nm and 0.8 nm, respectively. Becomes 4- (0.7 + 0.8) = 2.5 nm, and the ratio decreases to 62.5%. That is, when an extremely thin oxide film is formed by the conventional oxide film forming method, not only the uniformity and reproducibility of the film thickness cannot be secured, but also the quality of the film is deteriorated.

  In order to solve these problems, the present inventor has paid attention to Omi et al. According to the studies by the present inventors, these studies are based on the premise that “the lifetime of hydrogen radicals is long”, and the emphasis is on the strong reduction action of hydrogen radicals. It became clear that it was not applicable to the process. In other words, in order to apply it to semiconductor processes, the necessary structure is examined on the premise that “the lifetime of radicals such as hydrogen is very short and is generated on the catalyst and returns to the compound state or ground state almost on or near it”. The need has been made clear by the inventors.

  Furthermore, according to the present inventor, the water partial pressure ratio of 0 to 10 ppm belongs to the dry region, shows the so-called dry oxidation property, and obtains the required film quality such as a gate oxide film in a future fine process. It was clarified that it does not reach so-called wet oxidation.

Similarly, the present inventors clearly show that an ultra-low moisture region having a moisture partial pressure ratio of 10 ppm or more and 1.0 × 10 ³ ppm or less (0.1% or less) basically exhibits the same properties as dry oxidation. It was made.

  Similarly, thermal oxidation in a low moisture region having a moisture partial pressure ratio of 0.1% to 10% (particularly, a low moisture region having a moisture partial pressure ratio of 0.5% to 5%) is performed in other regions ( The present invention shows that it exhibits a relatively good property compared to a dry region, a region widely used in a combustion method of 10% or more, and a high moisture region having a water concentration of several tens of percent or more by a bubbler or the like). Revealed by the

(Objectives of the present invention)
An object of the present invention is to provide a technique capable of forming a high-quality ultrathin oxide film with a uniform film thickness with good reproducibility.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

The manufacturing method of the semiconductor integrated circuit device of the present invention includes the following steps.
(A) a step of synthesizing water vapor from oxygen and hydrogen using a catalyst at a first temperature in a moisture synthesis unit;
(B) a step of diluting the synthesized water vapor with a diluting gas in a connecting portion provided downstream from the moisture synthesis portion;
(C) a step of transferring the diluted water vapor through a gas introduction pipe into a vertical processing chamber provided in a vertical batch processing thermal oxidation furnace while maintaining a gaseous state;
(D) In the thermal oxidation furnace, heating the plurality of wafers accommodated in the processing chamber to a second temperature higher than the first temperature in a wet oxidation atmosphere containing the transferred water vapor. A step of performing a thermal oxidation process on a silicon member provided on or above each first main surface of the plurality of wafers,
Here, the wet oxidation atmosphere is integrated so as to share the outer wall surface along the outer wall surface of the processing chamber from the lower end to the upper end of the processing chamber so as to flow from top to bottom in the processing chamber. Provided in the process chamber by the gas introduction pipe having an outlet at the upper end of the process chamber,
Further, the plurality of wafers are arranged in a vertical direction in the processing chamber,
Further, the thermal oxidation process is performed while supplying the wet oxidation atmosphere into the processing chamber.

The manufacturing method of the semiconductor integrated circuit device of the present invention includes the following steps.
(A) introducing a semiconductor wafer into a heat treatment chamber of an oxidation furnace;
(B) replacing the gas atmosphere in the heat treatment chamber with nitrogen;
(C) synthesizing moisture from oxygen and hydrogen using a catalyst at a first temperature;
(D) introducing the synthesized moisture into a heat treatment chamber of the oxidation furnace and forming an oxidizing atmosphere containing moisture on the first main surface of the semiconductor wafer in the chamber while maintaining a vaporized state; ,
(E) The main surface of the semiconductor wafer is heated by lamp heating to a second temperature higher than the first temperature in the moisture-containing oxidizing atmosphere in the heat treatment chamber. Forming an insulating film by thermally oxidizing the upper silicon surface;
(F) After the step (e), replacing the oxidizing atmosphere containing moisture in the heat treatment chamber with nitrogen.

The method for manufacturing a semiconductor integrated circuit device of the present invention includes the following steps (a) and (b).
(A) a step of generating water by catalytic action from hydrogen and oxygen;
(B) Oxygen containing a low concentration of water is supplied to or near the main surface of a semiconductor wafer heated to a predetermined temperature, so that at least reproducibility of oxide film formation and uniformity of oxide film thickness can be ensured. Forming an oxide film having a thickness of 5 nm or less at an oxide film growth rate of about

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the oxide film is a gate oxide film of a MOSFET.

  In the method for manufacturing a semiconductor integrated circuit device of the present invention, the oxide film has a thickness of 3 nm or less.

  In the method for manufacturing a semiconductor integrated circuit device of the present invention, the heating temperature of the semiconductor wafer is 800 to 900 ° C.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, after the step (b), the main surface of the semiconductor wafer is subjected to an oxynitriding treatment to segregate nitrogen at the interface between the oxide film and the substrate.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the oxide film is formed by single wafer processing.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the oxide film is formed by batch processing.

The method for manufacturing a semiconductor integrated circuit device of the present invention includes the following steps (a) and (b).
(A) a step of generating water by catalytic action from hydrogen and oxygen;
(B) a main surface of a semiconductor wafer in which oxygen containing water having a concentration that provides an initial withstand pressure superior to an oxide film formed in a dry oxygen atmosphere containing at least water is heated to a predetermined temperature, or the surface thereof A step of forming an oxide film having a thickness of 5 nm or less by supplying it in the vicinity.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the concentration of water is 40% or less.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the concentration of water is 0.5 to 5%.

The method for manufacturing a semiconductor integrated circuit device of the present invention includes the following steps (a) to (c).
(A) a step of transporting a semiconductor wafer having a first oxide film formed on a main surface thereof to a cleaning unit, and removing the first oxide film by wet cleaning;
(B) a step of transporting the semiconductor wafer from the cleaning unit to an oxidation processing unit in an inert gas atmosphere without bringing the semiconductor wafer into contact with the atmosphere;
(C) supplying oxygen produced at a low concentration of water produced from hydrogen and oxygen by a catalytic action to the main surface of the semiconductor wafer heated to a predetermined temperature or in the vicinity thereof, and at least the reproducibility of oxide film formation and the oxide film Forming a second oxide film having a film thickness of 5 nm or less at an oxide film growth rate sufficient to ensure thickness uniformity;

  According to the method of manufacturing a semiconductor integrated circuit device of the present invention, the second oxide film is formed on the surface of the semiconductor wafer between the time when the first oxide film is removed and the second oxide film is formed. A natural oxide film formed undesirably and an initial oxide film formed undesirably on the surface of the semiconductor wafer by contact with oxygen are included in a part thereof, and the natural oxide film and the initial oxide film The total film thickness is less than or equal to half the total film thickness of the second oxide film.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the total film thickness of the natural oxide film and the initial oxide film is not more than one third of the film thickness of the entire second oxide film.

  According to the method of manufacturing a semiconductor integrated circuit device of the present invention, the first oxide film formed in the first region of the semiconductor wafer after the first oxide film is formed in the first region and the second region of the semiconductor wafer. And a step of forming a second oxide film on the first insulating film remaining in the first region and the second region of the semiconductor wafer, and the first and second oxide films At least one of the above is formed by the method described above.

Furthermore, the main outline of the present invention can be divided into sections as follows.
1. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture from oxygen and hydrogen using a catalyst at 500 degrees Celsius or lower,
(B) The silicon surface on the wafer in an oxidizing atmosphere in which the ratio of the partial pressure of the synthesized water occupying the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5% and hydrogen is not dominant Forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface by thermal oxidation under the condition that is heated to 800 degrees Celsius or higher. (As is generally well-known, “dominant” here means that the component is the most in the atmosphere when referring to a gas.)
2. 2. The method for manufacturing a semiconductor integrated circuit device according to the item 1, wherein the oxidizing atmosphere contains oxygen gas as a main component.
3. 3. The method for manufacturing a semiconductor integrated circuit device according to the item 1 or 2, wherein the synthesis of the moisture is performed by causing the catalyst to act on a mixed gas of oxygen and hydrogen.
4). 4. The method of manufacturing a semiconductor integrated circuit device according to any one of items 1 to 3, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
5). A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture from oxygen and hydrogen using a catalyst at 500 degrees Celsius or lower,
(B) The ratio of the partial pressure of the synthesized moisture occupying the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and the silicon surface on the wafer is in an oxidizing atmosphere containing oxygen gas. Forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface under the condition of being heated to 800 degrees Celsius or more.
6). 6. The method of manufacturing a semiconductor integrated circuit device as described in 5 above, wherein the thermal oxidation is performed using a hot wall furnace.
7). 6. The method of manufacturing a semiconductor integrated circuit device as described in 5 above, wherein the thermal oxidation is performed using a lamp heating furnace.
8). 8. The method for manufacturing a semiconductor integrated circuit device according to any one of 5 to 7, wherein the synthesized water-containing gas is supplied as the oxidizing atmosphere after being diluted with a gas other than water.
9. 9. In any one of 5 to 8 above, the method for manufacturing a semiconductor integrated circuit device further includes the following steps;
(C) A step of performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere.
10. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating moisture using a catalyst at 500 degrees centigrade or less;
(B) The partial pressure ratio of the synthesized water occupying the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and the silicon surface on the wafer is 800 degrees Celsius in an oxidizing atmosphere containing oxygen gas. Forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface under the condition of being heated at a temperature higher than that.
11. 12. The method for manufacturing a semiconductor integrated circuit device according to the item 10, wherein the oxidizing atmosphere contains oxygen gas as a main component.
12 12. The method for manufacturing a semiconductor integrated circuit device according to the item 10 or 11, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
13. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture from oxygen and hydrogen using a catalyst at 500 degrees Celsius or lower,
(B) The ratio of the partial pressure of the synthesized water occupying the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and an oxidizing atmosphere containing oxygen gas is used so that the silicon surface is 800 degrees Celsius or higher. Forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface by thermal oxidation while supplying the heated wafer periphery.
14 14. The method for manufacturing a semiconductor integrated circuit device as described above in 13, wherein the oxidizing atmosphere contains oxygen gas as a main component.
15. 14. The method for manufacturing a semiconductor integrated circuit device according to the item 13 or 14, wherein the synthesis of the moisture is performed by causing the catalyst to act on a mixed gas of oxygen and hydrogen.
16. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture from oxygen and hydrogen using a catalyst at a temperature of 500 degrees Celsius or less in the moisture synthesis unit;
(B) The ratio of the partial pressure of the synthesized water occupying the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and an oxidizing atmosphere containing oxygen gas is used so that the silicon surface is 800 degrees Celsius or higher. The silicon oxide film to be the gate insulating film of the field effect transistor is thermally oxidized on the silicon surface in the oxidation process part while supplying the wafer periphery through the narrow part provided between the moisture synthesis part and the oxidation process part. The process of forming by.
17. 16. The method for manufacturing a semiconductor integrated circuit device as described above in 16, wherein the oxidizing atmosphere contains oxygen gas as a main component.
18. 16. The method for manufacturing a semiconductor integrated circuit device according to 16 or 17, wherein the synthesis of the water is performed by causing the catalyst to act on a mixed gas of oxygen and hydrogen.
19. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture from oxygen and hydrogen using a catalyst;
(B) diluting the synthesized first gas containing moisture with a second gas other than moisture,
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface on the wafer in the introduced first gas atmosphere in the processing region;
20. 20. The manufacturing method of a semiconductor integrated circuit device as described above in 19, wherein the oxidizing atmosphere contains oxygen gas as a main component.
21. 24. The method of manufacturing a semiconductor integrated circuit device as described above in 19 or 20, wherein the thermal oxidation is performed at 800 degrees Celsius or higher.
22. 24. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 19 to 21, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
23. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating a first gas containing moisture by causing a moisture synthesis catalyst to act on a mixed gas of oxygen and hydrogen;
(B) diluting the first gas with a second gas other than moisture;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface on the wafer in the introduced first gas atmosphere in the processing region;
24. 24. The method for manufacturing a semiconductor integrated circuit device as described above in 23, wherein the oxidizing atmosphere contains oxygen gas as a main component.
25. 24. The method for manufacturing a semiconductor integrated circuit device as described above in 23 or 24, wherein the thermal oxidation is performed at 800 degrees Celsius or more.
26. 26. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 23 to 25, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
27. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating a first gas containing moisture by acting a catalyst;
(B) diluting the first gas with a second gas other than moisture;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface on the wafer in the introduced first gas atmosphere in the processing region;
28. 28. The method for manufacturing a semiconductor integrated circuit device as described above in 27, wherein the oxidizing atmosphere contains oxygen gas as a main component.
29. 28. The method for manufacturing a semiconductor integrated circuit device as described above in 27 or 28, wherein the thermal oxidation is performed at 800 degrees Celsius or higher.
30. 30. The method for manufacturing a semiconductor integrated circuit device as described above in any one of 27 to 29, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
31. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating a first gas containing moisture by causing a moisture synthesis catalyst to act on a mixed gas of oxygen and hydrogen;
(B) diluting the first gas with a second gas containing oxygen as a main component;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface on the wafer in the introduced first gas atmosphere in the processing region;
32. 32. The method of manufacturing a semiconductor integrated circuit device as described above in 31, wherein the oxidizing atmosphere contains oxygen gas as a main component.
33. 33. The method for manufacturing a semiconductor integrated circuit device as described above in 31 or 32, wherein the thermal oxidation is performed at 800 degrees Celsius or higher.
34. 34. The method of manufacturing a semiconductor integrated circuit device as described above in any one of 31 to 33, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
35. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) performing a surface treatment on the silicon surface on the wafer in order to clean the surface or remove the surface film;
(B) After the step, the step of transferring the wafer to the oxidation processing unit without being substantially exposed to an oxidizing atmosphere;
(C) synthesizing moisture from oxygen and hydrogen using a catalyst;
(D) A step of forming a silicon oxide film on the silicon surface by thermal oxidation in an atmosphere containing the synthesized moisture.
36. 36. The method for manufacturing a semiconductor integrated circuit device as described above in 35, wherein the silicon oxide film is to be a gate electrode of a MOS transistor.
37. 36. The method for manufacturing a semiconductor integrated circuit device according to the item 36, further comprising the following steps;
(E) A step of performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film has been formed to the outside air or another oxidizing atmosphere.
38. 38. The method for manufacturing a semiconductor integrated circuit device as described above in 37, further comprises the following steps;
(F) A step of forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer subjected to the surface treatment to the outside air or other oxidizing atmosphere.
39. 36. The method for manufacturing a semiconductor integrated circuit device according to the item 36, further comprising the following steps;
(F) A step of forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer on which the oxide film is formed to the outside air or other oxidizing atmosphere.
40. 40. The method for manufacturing a semiconductor integrated circuit device according to any one of 35 to 39 above, wherein the oxidation step is performed by lamp heating.
41. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) performing a surface treatment on the silicon surface on the wafer in order to clean the surface or remove the surface film;
(B) After the step, the step of transferring the wafer to the oxidation processing unit without being substantially exposed to an oxidizing atmosphere;
(C) a step of generating moisture using a catalyst;
(D) A step of forming a silicon oxide film on the silicon surface by thermal oxidation in an atmosphere containing the synthesized moisture.
42. 44. A method of manufacturing a semiconductor integrated circuit device as described above in 41, wherein the silicon oxide film is to be a gate electrode of a MOS transistor.
43. 44. The method for manufacturing a semiconductor integrated circuit device according to the item 42, further comprising the following steps;
(E) A step of performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film has been formed to the outside air or another oxidizing atmosphere.
44. 44. The method for manufacturing a semiconductor integrated circuit device according to the item 43, further includes the following steps;
(F) A step of forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer subjected to the surface treatment to the outside air or other oxidizing atmosphere.
45. 44. The method for manufacturing a semiconductor integrated circuit device according to the item 42, further comprising the following steps;
(F) A step of forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer on which the oxide film is formed to the outside air or other oxidizing atmosphere.
46. 46. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 41 to 45, wherein the oxidation step is performed by lamp heating.
47. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture from oxygen and hydrogen using a catalyst;
(B) forming a silicon oxide film to be a gate insulating film of a field effect transistor on a silicon surface on a wafer in a synthesized atmosphere containing moisture by thermal oxidation;
(C) A step of performing a surface treatment in a gas atmosphere containing nitrogen oxides on the wafer on which the silicon oxide film is formed without being exposed to outside air after the step.
48. 48. A manufacturing method of a semiconductor integrated circuit device as described above in 47, wherein the silicon oxide film is to be a gate electrode of a MOS transistor.
49. 48. The method for manufacturing a semiconductor integrated circuit device according to the item 48, further comprising the following steps;
(E) A step of performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film has been formed to the outside air or another oxidizing atmosphere.
50. 49. The method for manufacturing a semiconductor integrated circuit device as described above in 49, further comprises the following steps;
(F) A step of forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer subjected to the surface treatment to the outside air or other oxidizing atmosphere.
51. 48. The method for manufacturing a semiconductor integrated circuit device according to the item 48, further comprising the following steps;
(F) A step of forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer on which the oxide film is formed to the outside air or other oxidizing atmosphere.
52. 52. The method for manufacturing a semiconductor integrated circuit device according to any one of 47 to 51, wherein the oxidation step is performed by lamp heating.
53. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) forming an element isolation groove on the silicon surface on the wafer;
(B) forming an insulating film from the outside in the element isolation trench;
(C) planarizing the silicon surface to expose a portion of the silicon surface where a thermal oxide film is to be formed;
(D) A step of synthesizing moisture with a catalyst and forming a thermal oxide film to be a gate insulating film of a field effect transistor in the exposed portion in an atmosphere containing the catalyst.
54. 54. A method of manufacturing a semiconductor integrated circuit device as described above in 53, wherein the planarization is performed by a chemical mechanical method.
55. 55. A method for manufacturing a semiconductor integrated circuit device as described above in 53 or 54, wherein the planarization is performed by chemical mechanical polishing.
56. 56. A manufacturing method of a semiconductor integrated circuit device as described above in any one of 53 to 55, wherein the external insulating film is formed by CVD (Chemical Vapor Deposition).
57. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) forming an element isolation groove on the silicon surface on the wafer;
(B) forming an insulating film by deposition in the element isolation trench;
(C) synthesizing moisture with a catalyst and forming a thermal oxide film to be a gate insulating film of a field effect transistor on a silicon surface surrounded by the element isolation trench in an atmosphere containing the catalyst.
58. 58. The method for manufacturing a semiconductor integrated circuit device according to the item 57, further comprising the following steps;
(D) A step of planarizing the silicon surface after the step (b) to expose a portion of the silicon surface where a thermal oxide film is to be formed.
59. 58. A method for manufacturing a semiconductor integrated circuit device as described above in 57 or 58, wherein the planarization is performed by a chemical mechanical method.
60. 60. The manufacturing method of a semiconductor integrated circuit device as described above in any one of 57 to 59, wherein the planarization is performed by chemical mechanical polishing.
61. 60. The manufacturing method of a semiconductor integrated circuit device as described above in any one of 57 to 60, wherein the external insulating film is formed by CVD (Chemical Vapor Deposition).
62. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
The gate of the field effect transistor is formed on the silicon surface by heating the silicon surface on the wafer with a lamp in an oxidizing atmosphere in which the ratio of the partial pressure of moisture to the atmospheric pressure is in the range of 0.5% to 5%. A step of forming a silicon oxide film to be an insulating film by thermal oxidation.
63. 62. A method for manufacturing a semiconductor integrated circuit device as described above in 62, wherein the oxidizing atmosphere contains oxygen gas as a main component.
64. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating a first gas containing moisture by causing a catalyst to act on a mixed gas of oxygen and hydrogen;
(B) diluting the first gas with a second gas other than moisture;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer in the introduced first gas atmosphere by thermal oxidation by lamp heating in the processing region;
65. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of introducing a non-processed wafer into an oxidation processing part that has been preheated to a degree that moisture does not condense and is maintained in a substantially non-oxidizing atmosphere;
(B) In the oxidation treatment section, the silicon surface on the introduced wafer is heated by a lamp in an oxidizing atmosphere in which the ratio of the partial pressure of moisture to the atmospheric pressure of the whole atmosphere is 0.1% or more. Forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface by thermal oxidation.
66. 66. A method of manufacturing a semiconductor integrated circuit device as described above in 65, wherein the non-oxidizing atmosphere is obtained by adding nitrogen gas and mainly a small amount of oxygen gas.
67. 68. A method for manufacturing a semiconductor integrated circuit device as described above in 65 or 66, wherein the preheating temperature is not less than 100 degrees Celsius and not more than 500 degrees Celsius.
68. 68. A manufacturing method of a semiconductor integrated circuit device as described above in any one of 65 to 67, wherein a surface temperature of the wafer during the oxidation treatment is 700 degrees Celsius or more.
69. 65. The method for manufacturing a semiconductor integrated circuit device as described above in any one of 65 to 68, wherein the non-oxidizing atmosphere is preheated to such an extent that moisture is not dewed and then introduced into the oxidation processing unit.
70. 68. The method for manufacturing a semiconductor integrated circuit device as described above in any one of 65 to 69, wherein the wafer is preheated to such an extent that moisture does not condense and then introduced into the oxidation processing unit.
71. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
The ratio of the partial pressure of moisture to the total atmospheric pressure is in the range of 0.5% to 5%, and the silicon surface on the wafer is heated to 800 degrees Celsius or higher in an oxidizing atmosphere containing oxygen gas. Forming a silicon oxide film having a thickness of 5 nm or less to be a gate insulating film of a field effect transistor on the silicon surface under thermal conditions by thermal oxidation.
72. 72. A manufacturing method of a semiconductor integrated circuit device as described above in 71, wherein the oxidizing atmosphere contains oxygen gas as a main component.
73. 72. A manufacturing method of a semiconductor integrated circuit device according to the item 71 or 72, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
74. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
The ratio of the partial pressure of moisture to the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and becomes a tunnel insulating film of flash memory on the silicon surface on the wafer in an oxidizing atmosphere containing oxygen gas. Forming a silicon oxide film to be thermally oxidized.
75. 74. The method for manufacturing a semiconductor integrated circuit device as described above in 74, wherein the oxidizing atmosphere contains oxygen gas as a main component.
76. 76. A method for manufacturing a semiconductor integrated circuit device as described above in 74 or 75, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
77. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating moisture with a catalyst;
(B) A first thermal oxide film is formed on the first silicon surface region on the wafer in the first oxidation treatment unit while supplying the first oxidation treatment unit with an atmospheric gas containing moisture generated by the catalyst. The process of
(C) a step of generating moisture by burning oxygen and hydrogen before the step (a) or after the step (b);
(D) While supplying an atmospheric gas containing moisture generated by combustion to the first or second oxidation treatment unit, the second oxidation treatment unit applies a second heat to the second silicon surface region on the wafer. Forming an oxide film;
78. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
On the wafer, in a state where the main surface of the wafer is held substantially horizontal in an oxidizing atmosphere in which the ratio of the partial pressure of water to the atmospheric pressure in the entire atmosphere is in the range of 0.5% to 5%. Forming a silicon oxide film to be a gate insulating film of a MOS transistor on the silicon surface on the main surface by thermal oxidation.
79. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing moisture using a catalyst from a non-stoichiometric mixed gas of oxygen and hydrogen richer in oxygen than a stoichiometric ratio corresponding to water under a temperature condition in which no explosion occurs;
(B) A step of forming a silicon oxide film on the silicon surface on the wafer by thermal oxidation in the synthesized oxidizing atmosphere containing the moisture.
80. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of introducing a wafer to be processed into a high-temperature oxidation processing section of 700 degrees Celsius or higher maintained in a non-oxidizing atmosphere containing a small amount of oxygen that does not substantially oxidize;
(B) a step of synthesizing moisture from oxygen and hydrogen using a catalyst at 500 degrees Celsius or lower,
(C) In the oxidation treatment section, the synthesized partial pressure of moisture in the atmospheric pressure is 0.5% to 5% in an oxidizing atmosphere, and the silicon surface on the wafer is 700 degrees Celsius. Forming a silicon oxide film to be a gate insulating film of a field effect transistor by thermal oxidation on the silicon surface under the above-described heating condition;

(Other outlines of the present invention)
The above and other outlines of the present invention can be divided into items as follows.

A. A method of manufacturing a semiconductor integrated circuit device comprising the following steps (a) and (b):
(A) a step of generating water by catalytic action from hydrogen and oxygen;
(B) Oxygen containing a low concentration of water is supplied to or near the main surface of a semiconductor wafer heated to a predetermined temperature, so that at least reproducibility of oxide film formation and uniformity of oxide film thickness can be ensured. Forming an oxide film having a thickness of 5 nm or less on the main surface of the semiconductor wafer at an oxide film growth rate of the order of magnitude;

    B. A manufacturing method of a semiconductor integrated circuit device according to the item A, wherein the oxide film is a gate oxide film of a MOSFET.

    C. A method for manufacturing a semiconductor integrated circuit device according to Item A, wherein the oxide film has a thickness of 3 nm or less.

    D. The method for manufacturing a semiconductor integrated circuit device according to Item A, wherein the heating temperature of the semiconductor wafer is 800 to 900 ° C.

    E. The method for manufacturing a semiconductor integrated circuit device according to Item A, wherein after the step (b), the main surface of the semiconductor wafer is subjected to an oxynitridation treatment to thereby form nitrogen at the interface between the oxide film and the substrate. A method for manufacturing a semiconductor integrated circuit device, comprising segregation.

    F. A method for manufacturing a semiconductor integrated circuit device according to Item A, wherein the oxide film is formed by single wafer processing.

    G. A method for manufacturing a semiconductor integrated circuit device according to Item A, wherein the oxide film is formed by batch processing.

H. A method of manufacturing a semiconductor integrated circuit device comprising the following steps (a) and (b):
(A) a step of generating water by catalytic action from hydrogen and oxygen;
(B) a main surface of a semiconductor wafer in which oxygen containing water having a concentration that provides an initial withstand pressure superior to an oxide film formed in a dry oxygen atmosphere containing at least water is heated to a predetermined temperature, or the surface thereof Forming an oxide film having a film thickness of 5 nm or less on the main surface of the semiconductor wafer by supplying it in the vicinity;

    I. The method of manufacturing a semiconductor integrated circuit device according to Item H, wherein the concentration of the water is 40% or less.

    J. et al. The method for manufacturing a semiconductor integrated circuit device according to Item H, wherein the concentration of the water is 0.5 to 5%.

    K. The method for manufacturing a semiconductor integrated circuit device according to Item H, wherein the oxide film has a thickness of 3 nm or less.

L. A method of manufacturing a semiconductor integrated circuit device comprising the following steps (a) to (c):
(A) a step of transporting a semiconductor wafer having a first oxide film formed on a main surface thereof to a cleaning unit, and removing the first oxide film by wet cleaning;
(B) a step of transporting the semiconductor wafer from the cleaning unit to an oxidation processing unit in an inert gas atmosphere without bringing the semiconductor wafer into contact with the atmosphere;
(C) supplying oxygen produced at a low concentration of water produced from hydrogen and oxygen by a catalytic action to the main surface of the semiconductor wafer heated to a predetermined temperature or in the vicinity thereof, and at least the reproducibility of oxide film formation and the oxide film Forming a second oxide film having a thickness of 5 nm or less on the main surface of the semiconductor wafer at an oxide film growth rate capable of ensuring uniformity of thickness;

    M.M. The method for manufacturing a semiconductor integrated circuit device according to Item L, wherein the oxide film has a thickness of 3 nm or less.

    N. The method of manufacturing a semiconductor integrated circuit device according to Item L, wherein the second oxide film is formed between the removal of the first oxide film and the formation of the second oxide film. A natural oxide film that is undesirably formed on the surface of the wafer, and an initial oxide film that is undesirably formed on the surface of the semiconductor wafer by contact with the oxygen. A method of manufacturing a semiconductor integrated circuit device, wherein a total film thickness of the initial oxide film is less than or equal to a half of a film thickness of the entire second oxide film.

    O. The method for manufacturing a semiconductor integrated circuit device according to Item L, wherein the total thickness of the natural oxide film and the initial oxide film is not more than one third of the total thickness of the second oxide film. A method of manufacturing a semiconductor integrated circuit device.

    P. Forming a first oxide film on the first region and the second region of the semiconductor wafer, and then removing the first oxide film formed on the first region of the semiconductor wafer; A step of forming a second oxide film on the first insulating film remaining in the region and the second region, wherein at least one of the first and second oxide films is a step (a) ), (B), and a method for manufacturing a semiconductor integrated circuit device.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  According to the present invention, a high-quality ultra-thin gate oxide film having a film thickness of 5 nm or less and a uniform film thickness can be formed with good reproducibility, so that a fine MOSFET having a gate length of 0.25 μm or less can be formed. The reliability and manufacturing yield of the semiconductor integrated circuit device having the above can be improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.

  In addition, for convenience of explanation, the description will be divided into some examples or items, but these embodiments or items are not different from each other, and some other modified examples, some of each other. Needless to say, there are relationships between the details of the process and the devices used for some processes. That is, individual devices or unit processes described in the series of embodiments will not be repeated one by one when they can be applied almost directly to other examples. Conversely, individual devices or unit processes described independently will not be repeated one by one when they can be applied almost directly to other embodiments.

(Semiconductor process A)
A manufacturing method of a CMOSFET (Complementary Metal Oxide Semiconductor Field Effect Transistor) of this embodiment will be described with reference to FIGS. 1 to 26 (mainly FIGS. 1 to 8, 10, 16, and 22 to 26).

  First, as shown in FIG. 1, a semiconductor substrate 1 made of single crystal silicon having a specific resistance of about 10 Ωcm is heat-treated to form a thin silicon oxide film 2 having a thickness of about 10 nm on the main surface (thermal oxidation process A1). Thereafter, a silicon nitride film 3 having a thickness of about 100 nm is deposited on the silicon oxide film 2 by a CVD method. Next, as shown in FIG. 2, a photoresist 4 having an element isolation region opened is formed on the silicon nitride film 3, and the silicon nitride film 3 is patterned using the photoresist 4 as a mask.

  Next, after removing the photoresist 4, as shown in FIG. 3, the silicon oxide film 2 and the semiconductor substrate 1 are sequentially etched using the silicon nitride film 3 as a mask to form a trench having a depth of about 350 nm in the semiconductor substrate 1. 5a is formed, followed by thermal oxidation at 900 to 1150 ° C. to form a silicon oxide film 6 on the inner wall of the trench 5a (thermal oxidation process A2).

Next, as shown in FIG. 4, for example, a film thickness of about 800 nm is formed on the semiconductor substrate 1 by a CVD method using ozone (O ₃ ) and tetraethoxysilane ((C ₂ H ₅ O) ₄ Si) as a source gas. After the silicon oxide film 7 is deposited, as shown in FIG. 5, the silicon oxide film 7 is polished by a chemical mechanical polishing (CMP) method, and the silicon nitride film 3 is used as a polishing stopper to form a groove. The element isolation trench 5 is formed by leaving the silicon oxide film 7 only inside 5a. Subsequently, a heat treatment at about 1000 ° C. is performed to densify the silicon oxide film 7 inside the element isolation trench 5.

Next, after removing the silicon nitride film 3 by wet etching using hot phosphoric acid, as shown in FIG. 6, a photoresist 8 having a p-channel MOSFET formation region (left side in the figure) opened is used as a mask. Then, an impurity for forming an n-type well is ion-implanted in the semiconductor substrate 1, and further an impurity for adjusting the threshold voltage of the p-channel MOSFET is ion-implanted. As an impurity for forming the n-type well, for example, P (phosphorus) is used, and ion implantation is performed with an energy = 360 keV and a dose = 1.5 × 10 ¹³ / cm ² . Further, for example, P is used as the threshold voltage adjusting impurity, and ion implantation is performed with energy = 40 keV and dose = 2 × 10 ¹² / cm ² .

Next, after removing the photoresist 8, as shown in FIG. 7, a p-type well is formed in the semiconductor substrate 1 using the photoresist 9 having a hole formed in the n-channel MOSFET formation region (right side in the figure) as a mask. Impurities to be ion-implanted and further impurities to adjust the threshold voltage of the n-channel MOSFET are ion-implanted. As an impurity for forming the p-type well, for example, B (boron) is used, and ion implantation is performed with an energy = 200 keV and a dose = 1.0 × 10 ¹³ / cm ² . Further, for example, boron fluoride (BF ₂ ) is used as the threshold voltage adjusting impurity, and ion implantation is performed with energy = 40 keV and dose = 2 × 10 ¹² / cm ² .

  Next, after removing the photoresist 9, as shown in FIG. 8, the semiconductor substrate 1 is heat-treated at 950 ° C. for about 1 minute to stretch and diffuse the n-type impurity and the p-type impurity, whereby a p-channel MOSFET is obtained. An n-type well 10 is formed in the semiconductor substrate 1 in the formation region, and a p-type channel region 12 is formed in the vicinity of the surface. At the same time, a p-type well 11 is formed in the semiconductor substrate 1 in the n-channel MOSFET formation region, and an n-type channel region 13 is formed in the vicinity of the surface.

  Next, a gate oxide film is formed on each surface of the n-type well 10 and the p-type well 11 by the following method (thermal oxidation process A3).

  FIG. 9 is a schematic view of a single wafer oxide film forming apparatus used for forming a gate oxide film. As shown in the figure, the oxide film forming apparatus 100 is connected to the subsequent stage of the cleaning apparatus 101 that removes the oxide film on the surface of the semiconductor wafer 1A by the wet cleaning method prior to the formation of the gate oxide film. By adopting such a cleaning-oxidation integrated processing system, the semiconductor wafer 1A subjected to the cleaning process in the cleaning apparatus 101 can be transferred to the oxide film forming apparatus 100 in a short time without being brought into contact with the atmosphere. The formation of a natural oxide film on the surface of the semiconductor wafer 1A between the removal of the oxide film and the formation of the gate oxide film can be suppressed as much as possible.

The semiconductor wafer 1A loaded on the loader 102 of the cleaning apparatus 101 is first transferred to the cleaning chamber 103 and subjected to a cleaning process using a cleaning liquid such as NH ₄ OH + H ₂ O ₂ + H ₂ O, and then a hydrofluoric acid cleaning chamber 104. And is subjected to a cleaning treatment with dilute hydrofluoric acid (HF + H ₂ O) to remove the silicon oxide film on the surface (FIG. 10). Thereafter, the semiconductor wafer 1A is transported to the drying chamber 105 and subjected to a drying process, and moisture on the surface is removed. Moisture remaining on the surface of the semiconductor wafer 1A is sufficiently removed because it causes structural defects such as Si—H and Si—OH in the gate oxide film and the gate oxide film / silicon interface to form charge traps. It is necessary to keep it.

  The semiconductor wafer 1A after the drying process is immediately transferred to the oxide film forming apparatus 100 through the buffer 106.

  The oxide film forming apparatus 100 is configured by a multi-chamber system including, for example, an oxide film forming chamber 107, an oxynitride film forming chamber 108, a cooling stage 109, a loader / unloader 110, and the like. A robot hand 113 is provided for loading (unloading) the semiconductor wafer 1A into and out of the processing chambers. The inside of the transfer system 112 is kept in an inert gas atmosphere such as nitrogen in order to suppress as much as possible the formation of a natural oxide film on the surface of the semiconductor wafer 1A due to air contamination. Further, the inside of the transfer system 112 is kept in an ultra-low moisture atmosphere of ppb level in order to suppress the moisture from adhering to the surface of the semiconductor wafer 1A as much as possible. The semiconductor wafer 1A carried into the oxide film forming apparatus 100 is first transferred to the oxide film forming chamber 107 in units of one or two through the robot hand 113.

  11A is a schematic plan view showing an example of a specific configuration of the oxide film forming chamber 107, and FIG. 11B is a cross-sectional view taken along the line BB ′ of FIG. 11A. .

  The oxide film forming chamber 107 includes a chamber 120 formed of a multi-walled quartz tube, and heaters 121a and 121b for heating the semiconductor wafer 1A are installed at the upper and lower portions thereof. Housed in the chamber 120 is a disc-shaped heat equalizing ring 122 that uniformly distributes the heat supplied from the heaters 121a and 121b over the entire surface of the semiconductor wafer 1A, and holds the semiconductor wafer 1A horizontally on the upper portion thereof. A susceptor 123 is placed. The soaking ring 122 is made of a heat-resistant material such as quartz or SiC (silicon carbide), and is supported by a support arm 124 extending from the wall surface of the chamber 120. A thermocouple 125 that measures the temperature of the semiconductor wafer 1 </ b> A held on the susceptor 123 is installed near the soaking ring 122. For heating the semiconductor wafer 1A, for example, a heating method using a lamp 130 as shown in FIG. 12 may be adopted in addition to the heating method using the heaters 121a and 121b.

  One end of a gas introduction pipe 126 for introducing water, oxygen and purge gas into the chamber 120 is connected to a part of the wall surface of the chamber 120. The other end of the gas introduction pipe 126 is connected to a catalyst-type moisture generation device described later. A partition wall 128 having a large number of through holes 127 is provided in the vicinity of the gas introduction pipe 126, and the gas introduced into the chamber 120 passes through the through holes 127 of the partition wall 128 and enters the chamber 120. Spread evenly. One end of an exhaust pipe 129 for discharging the gas introduced into the chamber 120 is connected to the other part of the wall surface of the chamber 120.

  FIGS. 13 and 14 are schematic views showing a catalyst-type moisture generating apparatus connected to the chamber 120. The moisture generator 140 includes a reactor 141 made of a heat-resistant and corrosion-resistant alloy (for example, Ni alloy known as a trade name “Hastelloy”), and contains Pt (platinum), Ni ( A coil 142 made of a catalytic metal such as nickel) or Pd (palladium) and a heater 143 for heating the coil 142 are accommodated.

  A process gas composed of hydrogen and oxygen and a purge gas composed of an inert gas such as nitrogen or Ar (argon) are introduced into the reactor 141 from a gas storage tank 144a, 144b, 144c through a pipe 145. In the middle of the pipe 145, mass flow controllers 146 a, 146 b, 146 c for adjusting the amount of gas and open / close valves 147 a, 147 b, 147 c for opening and closing the gas flow path are installed, and the gas introduced into the reactor 141 The amount and component ratio of these are precisely controlled by these.

The process gas (hydrogen and oxygen) introduced into the reactor 141 is excited in contact with the coil 142 heated to about 350 to 450 ° C., and hydrogen radicals are generated from the hydrogen molecules (H ₂ → 2H ⁺ ), Oxygen radicals are generated from oxygen molecules (O ₂ → 2O ⁻ ). Since these two radicals are chemically very active, they react rapidly to produce water (2H ⁺ + O ⁻ → H ₂ O). This water is mixed with oxygen in the connection portion 148 and diluted to a low concentration, and is introduced into the chamber 120 of the oxide film forming chamber 107 through the gas introduction pipe 126.

  Since the catalytic moisture generator 140 can control the amount of hydrogen and oxygen involved in water generation with high accuracy, the concentration of water introduced into the chamber 120 of the oxide film formation chamber 107 together with oxygen can be controlled. It can be controlled over a wide range and with high accuracy from an ultra-low concentration of less than ppt to a high concentration of several tens of percent. In addition, when process gas is introduced into the reactor 141, water is instantly generated, so that a desired water concentration can be obtained in real time. Therefore, hydrogen and oxygen can be introduced into the reactor 141 at the same time, and it is not necessary to introduce oxygen prior to the introduction of hydrogen as in a conventional moisture generation system employing a combustion method. The catalyst metal in the reactor 141 may be made of a material other than the metal described above as long as it can radicalize hydrogen or oxygen. Further, the catalyst metal may be processed into a coil shape and used, for example, may be processed into a hollow tube or a fine fiber filter and the process gas may be passed through the inside.

  An example of a sequence of gate oxide film formation using the oxide film forming apparatus 100 will be described with reference to FIG.

  First, the chamber 120 of the oxide film forming chamber 107 is opened, and the semiconductor wafer 1A is loaded on the susceptor 123 while introducing a purge gas (nitrogen) into the chamber 120. The time from loading the semiconductor wafer 1A into the chamber 120 to loading it onto the susceptor 123 is 55 seconds. Thereafter, the chamber 120 is closed, and subsequently purge gas is introduced for 30 seconds to sufficiently exchange the gas in the chamber 120. The susceptor 123 is heated in advance by the heaters 121a and 121b so that the semiconductor wafer 1A is quickly heated. The heating temperature of the semiconductor wafer 1A is set in the range of 800 to 900 ° C., for example, 850 ° C. When the wafer temperature is 800 ° C. or lower, the quality of the gate oxide film is degraded. On the other hand, when the temperature is 900 ° C. or higher, surface roughness of the wafer tends to occur.

  Next, oxygen and hydrogen are introduced into the reactor 141 of the moisture generating apparatus 140 for 15 seconds, and the generated water is introduced into the chamber 120 together with oxygen to oxidize the surface of the semiconductor wafer 1A for 5 minutes, thereby reducing the film thickness to 5 nm or less. For example, a gate oxide film 14 of 4 nm is formed (FIG. 16).

  When oxygen and hydrogen are introduced into the reactor 141, hydrogen is not introduced before oxygen. If hydrogen is introduced before oxygen, it is dangerous because unreacted hydrogen flows into the hot chamber 120. On the other hand, when oxygen is introduced before hydrogen, this oxygen flows into the chamber 120, and a low quality oxide film (initial oxide film) is formed on the surface of the semiconductor wafer 1A on standby. Accordingly, hydrogen is introduced at the same time as oxygen, or is introduced at a slightly later timing (within 0 to 5 seconds) than oxygen in consideration of work safety. In this way, it is possible to minimize the thickness of the initial oxide film that is undesirably formed on the surface of the semiconductor wafer 1A.

  FIG. 17 is a graph showing the dependence of the moisture concentration on the oxide film growth rate, where the horizontal axis represents the oxidation time and the vertical axis represents the oxide film thickness. As shown in the figure, the growth rate of the oxide film is the slowest when the water concentration is 0 (dry oxidation), and increases as the water concentration increases. Therefore, in order to form an ultra-thin gate oxide film with a film thickness of about 5 nm or less with good reproducibility and a uniform film thickness, the oxide film growth rate is slowed down by reducing the moisture concentration and stable oxidation conditions. It is effective to form a film with

FIG. 18 is a graph showing the dependence of the moisture concentration on the initial oxide breakdown voltage of a MOS diode composed of a semiconductor substrate, a gate oxide film, and a gate electrode, and the horizontal axis represents one electrode (gate electrode) of the MOS diode. The applied voltage, the vertical axis, indicates the defect density in the gate oxide film. Here, in order to make the influence of the moisture concentration obvious, a gate oxide film having a film thickness = 9 nm and an area = 0.19 cm ² is (1) oxidation temperature = 850 ° C., moisture concentration = 0, and (2) oxidation temperature = 850 ° C., moisture concentration = 0.8%, (3) A vertical diffusion furnace was used, and a MOS diode formed under the conditions of oxidation temperature = 800 ° C. and moisture concentration = 40% was used. As shown in the figure, a gate oxide film formed under a low moisture condition with a moisture concentration of 0.8% is formed under a gate oxide film formed with a moisture concentration = 0 (dry oxidation) and a high moisture condition with a moisture concentration of 40%. The initial breakdown voltage was better than any of the gate oxide films.

  FIG. 19 is a graph showing the dependence of the moisture concentration on the amount of voltage change when a constant current (Is) is passed between the electrodes of the MOS diode. As shown in the figure, the MOS diode using the gate oxide film formed with the moisture concentration = 0 (dry oxidation) has a large voltage change amount due to the high defect density in the oxide film.

  FIG. 20 shows the film thickness distribution in the wafer surface of the gate oxide film formed by using the oxide film forming apparatus 100. Here, the case where the wafer temperature is set to 850 ° C. and the moisture concentration is 0.8% and the oxidation is performed for 2 minutes and 30 seconds is shown. As shown in the figure, the maximum value of the film thickness = 2.881 nm and the minimum value = 2.814 nm, and a good in-plane uniformity with a film thickness variation of ± 1.18% was obtained.

  From the above, the preferable concentration (water / water + oxygen) of water introduced into the chamber 120 of the oxide film forming chamber 107 can obtain an initial withstand voltage superior to that formed by dry oxidation (water concentration = 0). The concentration should be the lower limit and be within the range of about 40% which is the upper limit when the conventional combustion method is adopted. Especially, an ultra-thin gate oxide film having a uniform thickness is about 5 nm or less. It can be concluded that the concentration of water is preferably in the range of 0.5% to 5% in order to form it with good reproducibility and high quality.

  FIG. 21 shows the breakdown of the components of the gate oxide film obtained by thermal oxidation. The graph on the right side of the figure shows the gate oxide film having a thickness of 4 nm formed by the method of the present embodiment described above, and the center graph. Is a gate oxide film having a thickness of 4 nm formed by a conventional method using a combustion method, and the left graph is a gate oxide film having a thickness of 9 nm formed by the same conventional method.

  As shown in the figure, in the present embodiment, as a result of adopting an integrated cleaning-oxidation processing system and avoiding contact with oxygen in the atmosphere between pre-cleaning and oxide film formation as much as possible, oxide film formation is achieved. Prior to the formation of a controllable oxide film in the apparatus, the film thickness of this natural oxide film is changed from 0.7 nm (17.5% of the total film thickness) of the conventional method to 0.3 nm (total film thickness). 7.5%). In addition, as a result of adopting a moisture generation system using a catalyst and immediately introducing the oxidized species into the oxide film forming apparatus, the contact with oxygen in the oxidized species prior to the formation of the intended original oxide film. The thickness of the initial oxide film formed undesirably could be reduced from 0.8 nm (20% of the total film thickness) of the conventional method to 0.3 nm (7.5% of the total film thickness). As a result, it was possible to form a high quality ultra-thin gate oxide film in which the intended originally controllable oxide film accounts for 85% of the total film thickness. Furthermore, as described above, the moisture concentration of the oxidizing species is optimized, and the film growth rate is lowered and the film is formed under stable oxidation conditions. As a result, a high-quality ultra-thin gate oxide film is uniformly formed. The film thickness could be formed with good reproducibility.

  Next, a CMOS process after the gate oxide film is formed will be briefly described.

  As shown in FIG. 14, after the formation of the gate oxide film 14 is completed, a purge gas is first introduced into the chamber 120 of the oxide film forming chamber 107 for 2 minutes and 20 seconds, and the oxidizing species remaining in the chamber 120 are exhausted. Subsequently, the semiconductor wafer 1A is unloaded from the susceptor 123 in 55 seconds and unloaded from the chamber 120.

Next, the semiconductor wafer 1A is transferred to the oxynitride film forming chamber 108 shown in FIG. 9, and the semiconductor wafer 1A is heat-treated in an NO (nitrogen oxide) or N ₂ O (nitrous oxide) atmosphere, thereby performing gate oxidation. Nitrogen is segregated at the interface between the film 14 and the semiconductor substrate 1.

When the gate oxide film 14 is thinned to about 5 nm, distortion generated at the interface between the two due to the difference in thermal expansion coefficient from the semiconductor substrate 1 becomes obvious, and the generation of hot carriers is induced. Since nitrogen segregated at the interface with the semiconductor substrate 1 relaxes this distortion, the above-described oxynitriding treatment can improve the reliability of the ultrathin gate oxide film 14. Incidentally, when performing oxynitriding using N 2 _O, so also proceeds oxidation by oxygen generated by the decomposition of N 2 _O, the thickness of the gate oxide film 14 is thicker about 1 nm. In this case, the gate oxide film thickness can be set to 4 nm by forming the gate oxide film having a thickness of 3 nm in the oxide film formation chamber 107 and then performing oxynitriding treatment. On the other hand, when NO is used, the gate oxide film is hardly increased by the oxynitriding process.

  Next, the semiconductor wafer 1A that has been subjected to the oxynitriding process is cooled to room temperature by the cooling stage 109, and then is carried out of the oxide film forming apparatus 100 through the loader / unloader 110 to deposit a conductive film for the gate electrode. To a CVD apparatus (not shown). At this time, this CVD apparatus is connected to the subsequent stage of the oxide film forming apparatus 100, and the process from the formation of the gate oxide film to the deposition of the conductive film for the gate electrode is continuously processed to effectively contaminate the gate oxide film 14. Can be prevented.

  Next, as shown in FIG. 22, a gate electrode 15 having a gate length of 0.25 μm is formed on the gate oxide film 14. The gate electrode 15 is formed by sequentially depositing an n-type polycrystalline silicon film having a thickness of 150 nm and a non-doped polycrystalline silicon film having a thickness of 150 nm on the semiconductor substrate 1 by CVD, followed by dry etching using a photoresist as a mask. The film is formed by patterning.

Next, as shown in FIG. 23, a p-type impurity, for example, B (boron) is ion-implanted into the formation region of the p-channel MOSFET from the vertical direction and the oblique direction, and the n-type well 10 on both sides of the gate electrode 14 is implanted. A p ⁻ type semiconductor region 16 and a p type semiconductor region 17 are formed. Further, an n-type impurity, for example, P (phosphorus) is ion-implanted from the vertical direction and the oblique direction into the formation region of the n-channel MOSFET, and the n ⁻ -type semiconductor region 18 and n A type semiconductor region 19 is formed.

Next, as shown in FIG. 24, the silicon oxide film deposited on the semiconductor substrate 1 by the CVD method is anisotropically etched to form a sidewall spacer 20 having a thickness of about 0.15 μm on the sidewall of the gate electrode 14. . At this time, the gate oxide film 14 above the p-type semiconductor region 17 and the gate oxide film 14 above the n-type semiconductor region 19 are removed. Subsequently, a p-type impurity, for example, B (boron) is ion-implanted into the formation region of the p-channel MOSFET to form the p ⁺ -type semiconductor region 21 in the n-type well 10 on both sides of the gate electrode 14. Further, an n-type impurity, for example, P (phosphorus) is ion-implanted into the formation region of the n-channel MOSFET to form an n ⁺ -type semiconductor region 22 in the p-type well 11 on both sides of the gate electrode 14.

Next, as shown in FIG. 25, the gate electrode 14 of the p-channel MOSFET, the p ⁺ -type semiconductor region 21 (source region and drain region), the gate electrode 14 of the n-channel MOSFET, and the n ⁺ -type semiconductor region 22 (source) TiSi ₂ (titanium silicide) layer 23 is formed on the surface of each of the regions and drain regions. The TiSi ₂ layer 23 is formed by heat-treating a Ti film deposited on the semiconductor substrate 1 by a sputtering method to react with the semiconductor substrate 1 and the gate electrode 14, and then removing the unreacted Ti film by etching. Through the above steps, a p-channel MOSFET (Qp) and an n-channel MISFET (Qn) are completed.

  Thereafter, as shown in FIG. 26, the connection holes 25 to 28 are formed in the silicon oxide film 24 deposited on the semiconductor substrate 1 by the plasma CVD method, and then the Al alloy film deposited on the silicon oxide film 24 by the sputtering method. The wirings 29 to 31 are formed by patterning to complete the CMOS process of the present embodiment.

(Semiconductor process B)
A MOSFET manufacturing method (LOCOS isolation process) according to the present embodiment will be described with reference to FIGS. In this process, conventional isolation is used instead of shallow trench isolation (STI). In this case, there is a limit to miniaturization, but there is an advantage that a conventional process can be used as it is. In both the STI or SGI (Shallow Groove Isolation) of the semiconductor process 1 and the LOCOS isolation of this embodiment, the MOSFET is basically surrounded by an isolation region unless it shares a source or drain with other transistors. .

  First, as shown in FIG. 27, the semiconductor substrate 1 is heat-treated to form a thin silicon oxide film 2 having a thickness of about 10 nm on its main surface (thermal oxidation process B1), and then the film thickness is formed on the silicon oxide film 2. A silicon nitride film 3 of about 100 nm is deposited by CVD. Next, as shown in FIG. 28, a photoresist 4 having an element isolation region opened is formed on the silicon nitride film 3, and the silicon nitride film 3 is patterned using the photoresist 4 as a mask.

  Next, after removing the photoresist 4, as shown in FIG. 29, the semiconductor substrate 1 is heat-treated to form a field oxide film 40 in the element isolation region (thermal oxidation process B2).

  Next, the silicon nitride film 3 is removed by wet etching using hot phosphoric acid, the surface of the semiconductor substrate 1 is cleaned by wet cleaning, and then the surface of the active region of the semiconductor substrate 1 is the same as in the first embodiment. An ultrathin gate oxide film 14 having a film thickness of 5 nm or less is formed by this method (thermal oxidation process B3) (FIG. 32).

  An ultra-thin gate oxide film having a thickness of 5 nm or less is applied to a batch-type vertical oxide film forming apparatus 150 (oxidation apparatus 3; vertical batch oxidation furnace) as shown in FIG. Can also be formed. An example of the sequence of gate oxide film formation using this vertical oxide film forming apparatus 150 is shown in FIG. The sequence in this case is almost the same as in FIG. 15, but there is a slight time difference between loading and unloading of the wafer. In addition, as described above, in this case, since the hot wall system is generally used, it is relatively important to add a small amount of oxygen gas that does not substantially oxidize the purge gas.

  Thereafter, a MOSFET is formed on the main surface of the semiconductor substrate 1 by the same method as in the first embodiment.

(Common matters regarding oxidation processes, etc.)
Hereinafter, details of a processing apparatus and a processing process that can be commonly applied to each semiconductor process disclosed in the present application will be described.

  As described above, FIG. 9 is a schematic view of a single wafer oxide film forming apparatus (multi-chamber system) used for forming a gate oxide film. As shown in the figure, this oxide film forming apparatus 100 includes a cleaning apparatus 101 that removes an oxide film (generally a surface film) on the surface of the semiconductor wafer 1A by a wet cleaning method (or a dry method) prior to the formation of the gate oxide film. It is connected to the latter stage. By adopting such a cleaning-oxidation integrated processing system, the semiconductor wafer 1A subjected to the cleaning process in the cleaning apparatus 101 is put into the atmosphere (an atmosphere that deteriorates other surface conditions such as an undesired oxidizing atmosphere). Since it can be transported to the oxide film forming apparatus 100 in a short time without contact, a natural oxide film is formed on the surface of the semiconductor wafer 1A between the removal of the oxide film and the formation of the gate oxide film. Can be suppressed as much as possible.

  The semiconductor wafer 1A after the drying process is immediately transferred to the oxide film forming apparatus 100 through the buffer 106.

  The oxide film forming apparatus 100 is configured by a multi-chamber system including, for example, an oxide film forming chamber 107, an oxynitride film forming chamber 108, a cooling stage 109, a loader / unloader 110, and the like. A robot hand 113 is provided for loading (unloading) the semiconductor wafer 1A into and out of the processing chambers. The inside of the transfer system 112 can be evacuated to an inert gas atmosphere such as nitrogen (although it can be evacuated) in order to suppress the formation of a natural oxide film on the surface of the semiconductor wafer 1A due to air contamination. When positive pressure is applied with an inert gas or the like, there is an effect of preventing unwanted gas contamination from the outside and each processing chamber. In addition, the inside of the transfer system 112 has an extremely low moisture atmosphere at a ppb level (in general, the moisture contained in the well-developed vacuum system degassing is to suppress moisture from adhering to the surface of the semiconductor wafer 1A. (A few ppm or less). The semiconductor wafer 1A carried into the oxide film forming apparatus 100 is first transferred to the oxide film forming chamber 107 through the robot hand 113 in units of one or two sheets (generally, when referring to single wafers, one or two units are used). When specifying one sheet unit or two sheet units, they are conveyed as single sheets and two sheets, respectively).

  As described above, FIG. 11A is a schematic plan view showing an example of a specific configuration of the oxide film forming chamber 107 (the single wafer apparatus of FIG. 9), and FIG. 11B is a diagram of B in FIG. It is sectional drawing (oxidization apparatus 1; hot wall type single wafer oxidation furnace) along line -B '.

  The oxide film forming chamber 107 includes a chamber 120 formed of a multi-walled quartz tube, and heaters 121a and 121b (in the case of a hot wall type) for heating the semiconductor wafer 1A are installed at the upper and lower portions thereof. Yes. Inside the chamber 120 is accommodated a disc-shaped heat equalizing ring 122 that evenly distributes the heat supplied from the heaters 121a and 121b over the entire surface of the semiconductor wafer 1A, and holds the semiconductor wafer 1A horizontally on the top ( The effect of eliminating the influence of the concentration distribution of the mixed gas by arranging the wafer surface almost horizontally with respect to the vertical gravity is particularly important in increasing the diameter of a 300φ wafer or the like. It is placed. The soaking ring 122 is made of a heat-resistant material such as quartz or SiC (silicon carbide), and is supported by a support arm 124 extending from the wall surface of the chamber 120. A thermocouple 125 that measures the temperature of the semiconductor wafer 1 </ b> A held on the susceptor 123 is installed near the soaking ring 122. For heating the semiconductor wafer 1A, in addition to the heating method using the heaters 121a and 121b, for example, a heating method using a lamp 130 as shown in FIG. 12 (oxidizing apparatus 2; lamp heating type single wafer oxidation furnace) may be employed. In this case, the lamp heating can be started after the wafer is placed in a predetermined position, and when the lamp is turned off, the temperature of the wafer surface rapidly decreases. The initial oxide film can be reduced to a level that can be almost ignored. In addition, when adding moisture with a lamp, it is effective to prevent condensation by preheating not only the moisture introduction part but also the oxidation furnace itself to about 140 degrees Celsius.

  One end of a gas introduction pipe 126 for introducing water, oxygen and purge gas into the chamber 120 is connected to a part of the wall surface of the chamber 120. The other end of the gas introduction pipe 126 is connected to a catalytic moisture generator. A partition wall 128 having a large number of through holes 127 is provided in the vicinity of the gas introduction pipe 126, and the gas introduced into the chamber 120 passes through the through holes 127 of the partition wall 128 and enters the chamber 120. Spread evenly. One end of an exhaust pipe 129 for discharging the gas introduced into the chamber 120 is connected to the other part of the wall surface of the chamber 120.

  As described above, FIGS. 13 and 14 are schematic views showing a catalyst-type moisture generator connected to the chamber 120. The moisture generator 140 includes a reactor 141 made of a heat-resistant and corrosion-resistant alloy (for example, Ni alloy known as a trade name “Hastelloy”), and contains Pt (platinum), Ni ( A coil 142 made of a catalytic metal such as nickel) or Pd (palladium) and a heater 143 for heating the coil 142 are accommodated.

  A process gas composed of hydrogen and oxygen and a purge gas composed of an inert gas such as nitrogen or Ar (argon) are introduced into the reactor 141 from a gas storage tank 144a, 144b, 144c through a pipe 145. In the middle of the pipe 145, mass flow controllers 146 a, 146 b, 146 c for adjusting the amount of gas and open / close valves 147 a, 147 b, 147 c for opening and closing the gas flow path are installed, and the gas introduced into the reactor 141 The amount and component ratio of these are precisely controlled by these.

The process gas (hydrogen and oxygen) introduced into the reactor 141 is about 350 to 450 ° C. (for example, hydrogen explosive combustion occurs at a hydrogen concentration of 4% or more in the presence of sufficient oxygen under normal pressure). In consideration of the safety of the mass production apparatus, it is desirable to introduce an oxygen-rich oxygen-hydrogen mixed gas into the reactor so that hydrogen does not remain). Hydrogen radicals are generated from the molecules (H ₂ → 2H ⁺ ), and oxygen radicals are generated from the oxygen molecules (O ₂ → 2O ⁻ ). Since these two radicals are chemically very active, they react rapidly to produce water (2H ⁺ + O ⁻ → H ₂ O). This water is mixed with oxygen in the connection portion 148 and diluted to a low concentration, and is introduced into the chamber 120 of the oxide film forming chamber 107 through the gas introduction pipe 126. In this case, it is also possible to dilute with argon instead of oxygen. That is, the atmosphere supplied to the oxidation furnace is 1% moisture and 99% argon.

  Since the catalytic moisture generator 140 can control the amount of hydrogen and oxygen involved in water generation with high accuracy, the concentration of water introduced into the chamber 120 of the oxide film formation chamber 107 together with oxygen can be controlled. It can be controlled over a wide range and with high accuracy from an ultra-low concentration of less than ppt to a high concentration of several tens of percent. In addition, when process gas is introduced into the reactor 141, water is instantly generated, so that a desired water concentration can be obtained in real time. Accordingly, hydrogen and oxygen can be simultaneously introduced into the reactor 141 (in general, oxygen is introduced slightly earlier for safety), and hydrogen is released as in a conventional moisture generation system employing a combustion method. It is not necessary to introduce oxygen prior to the introduction of. The catalyst metal in the reactor 141 may be made of a material other than the metal described above as long as it can radicalize hydrogen or oxygen. Further, the catalyst metal may be processed into a coil shape and used, for example, may be processed into a hollow tube or a fine fiber filter and the process gas may be passed through the inside.

  In FIG. 14, the moisture generation furnace 140, hydrogen sensor, filter, dilution section, purge gas or dilution gas supply section, and oxidation furnace connection section are temperature-controlled or heated to about 140 degrees Celsius to prevent condensation. Yes. Here, the hydrogen sensor is for detecting hydrogen remaining without being synthesized. The filter is a gas filter inserted so as to act as a kind of orifice so that in the unlikely event that hydrogen combustion or the like occurs on the oxidation furnace side, it is not transmitted to the synthesis furnace side. Purge gas, dilution gas, and moisture are preheated to a temperature that does not condense (generally about 100 to 200 degrees Celsius) and supplied to the oxidation furnace, but the dilution gas is also preheated and mixed with the synthesized moisture In the lamp heating furnace as shown in FIG. 12, it is necessary to consider the preheating of the furnace body itself or the processed wafer itself. In this case, the wafer in the oxidation furnace can be preheated with the purge gas. In the case of a lamp heating furnace, it is necessary to pay attention also to a preheating mechanism for preventing condensation at the wafer introduction part. In either case, it is relatively effective to heat or adjust the temperature to about 140 degrees Celsius. In general, the oxidation process is performed in a steady state while supplying a predetermined atmospheric gas at a constant flow rate to the oxidation processing unit and always supplementing the consumed components with a new atmospheric gas.

  An example of a gate oxide film formation sequence using the oxide film forming apparatus 100 (FIG. 9) will be further described with reference to FIG.

  First, the chamber 120 (FIG. 11) of the oxide film forming chamber 107 (FIG. 9) is opened, and a purge gas (nitrogen) is introduced into the chamber (as shown in FIG. (Some oxygen or the like may be added to prevent surface roughness) The semiconductor wafer 1A is loaded on the susceptor 123. The time from loading the semiconductor wafer 1A into the chamber 120 to loading it onto the susceptor 123 is 55 seconds. Thereafter, the chamber 120 is closed, and subsequently purge gas is introduced for 30 seconds to sufficiently exchange the gas in the chamber 120. The susceptor 123 is heated in advance by the heaters 121a and 121b so that the semiconductor wafer 1A is quickly heated. The heating temperature of the semiconductor wafer 1A is set in the range of 800 to 900 ° C., for example, 850 ° C. When the wafer temperature is 800 ° C. or lower, the quality of the gate oxide film is degraded. On the other hand, when the temperature is 900 ° C. or higher, surface roughness of the wafer tends to occur.

  When oxygen and hydrogen are introduced into the reactor 141, hydrogen is not introduced before oxygen. If hydrogen is introduced before oxygen, it is dangerous because unreacted hydrogen flows into the hot chamber 120. On the other hand, when oxygen is introduced before hydrogen, this oxygen flows into the chamber 120, and a low quality oxide film (initial oxide film) is formed on the surface of the semiconductor wafer 1A on standby. Accordingly, hydrogen is introduced at the same time as oxygen, or is introduced at a slightly later timing (within 0 to 5 seconds) than oxygen in consideration of work safety. In this way, it is possible to minimize the thickness of the initial oxide film that is undesirably formed on the surface of the semiconductor wafer 1A.

  Ultra-thin gate oxide films with a film thickness of 5 nm or less (also of course effective to a certain extent for gates and other oxide films with a thickness greater than that) are formed as single-wafer or batch-type oxide films. An apparatus (oxidation furnaces 1 to 3) may be formed by attaching a moisture generation apparatus 160 of a combustion type as shown in FIG. 33 (oxidation apparatus 4; oxyhydrogen combustion type or hydrogen combustion type oxidation furnace).

  In this case, the moisture generation device 160 generates an oxidized species containing a relatively high concentration of water, and then adds oxygen to the oxidized species to obtain an oxidized species having a low moisture concentration. At that time, the valve (Vvent) is set to open and the valve (Vprocess) is set to be closed in advance so that the oxidizing species are not sent to the oxide film forming apparatus until the water concentration is lowered to a desired concentration. Then, after the water concentration is sufficiently lowered, the valve (Vvent) is closed and the valve (Vprocess) is switched to open to send the oxidized species to the oxide film forming apparatus.

  Although the above method has disadvantages compared to the above-described catalyst method, such as the presence of a dust generation source such as a valve immediately before the oxide film forming apparatus, and the creation of a valve, a dead space is produced, but the oxidation species Therefore, it is possible to realize a low water concentration and suppression of the initial oxide film.

(Semiconductor process C)
As shown in FIG. 34, the oxide film forming method according to the present invention includes a tunnel oxide film 43 (thermal oxidation process C1) and a second gate oxide film 44 (thermal oxidation process C2) of a flash memory having a floating gate 44 and a control gate 42. ) Can be applied to a thin film thickness of 5 nm or less.

(Semiconductor process D)
In the oxide film forming method of the present invention, when two or more types of gate oxide films having different film thicknesses are formed on the same semiconductor chip, for example, an LSI in which a memory LSI and a logic LSI are mixedly mounted on the same semiconductor chip. It can also be applied to. In this case, it goes without saying that a thin gate oxide film (thermal oxidation process D1) having a thickness of 5 nm or less and a relatively thick gate oxide film (thermal oxidation process D2) having a thickness of 5 nm or more can be formed by the method of the present invention. However, a thin gate oxide film may be formed by the method of the present invention, and a thick gate oxide film may be formed by a conventional method.

(Applicability of various oxidation methods of this application)
The applicability of the catalyst moisture generation thermal oxidation method, the low moisture oxidation method (including some by the hydrogen combustion method) and the high water oxidation method by the conventional hydrogen combustion method shown in the present application will be summarized below.

  That is, oxidation processes A3, B3, C1, C2, D1, etc. (first type) are examples of processes that are most effective when the catalytic moisture generation thermal oxidation method and the low moisture oxidation method are applied.

  Although high moisture oxidation can be applied by the conventional hydrogen combustion method, the oxidation process A1, A2, B1, B2, D2 is effective as a process that produces an effect by applying the catalytic moisture generation thermal oxidation method and the low moisture oxidation method. Etc. (second type).

  In particular, in a line where an oxidation furnace and a catalytic oxidation furnace are mixed in the hydrogen combustion method, it is also practically useful to mix both methods depending on the properties, thickness, etc. of the oxide film.

(Applicability of various oxidation devices of this application)
The applicability of the various oxidation apparatuses shown in the present application will be summarized below. Basically, any of the oxidation apparatuses 1 to 4 shown in the present application can be applied to the first and second oxidation processes. However, when it is necessary to precisely control the atmosphere using a multi-chamber or the like, it is desirable to use the oxidation apparatus 1 or 2.
The operating pressure during oxidation of each oxidation treatment apparatus is generally performed at normal pressure (from 600 Torr to 900 Torr), but can also be performed at reduced pressure. In this case, there are additional effects such as easy setting of the oxidation rate and reduction of the possibility of hydrogen explosion. It is also possible to perform high pressure oxidation. In this case, there is an advantage that a high oxidation rate can be realized at a relatively low temperature.

(Notes regarding disclosure)
As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention is useful when applied to the manufacture of a semiconductor integrated circuit device having a fine MOSFET having a gate length of 0.25 μm or less.

It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is the schematic of the single wafer type oxide film formation apparatus used for formation of a gate oxide film. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. (A) is a schematic plan view which shows an example of a structure of an oxide film formation chamber, (b) is sectional drawing along the B-B 'line of (a). (A) is a schematic plan view which shows the other example of a structure of an oxide film formation chamber, (b) is sectional drawing along the B-B 'line of (a). It is the schematic which shows the moisture production apparatus of the catalyst system connected to the chamber of the oxide film formation chamber. It is the schematic which expands and shows a part of FIG. It is explanatory drawing which shows an example of the sequence of gate oxide film formation. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is a graph which shows the dependence of the water concentration with respect to the oxide film growth rate. It is a graph which shows the dependence of the moisture concentration with respect to the oxide-film initial stage proof pressure of a MOS diode. It is a graph which shows the dependence of the moisture concentration with respect to the amount of voltage changes when a constant current is sent between the electrodes of a MOS diode. It is explanatory drawing which shows the film thickness distribution in the wafer surface of a gate oxide film. It is a graph which shows the breakdown of the component of a gate oxide film. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 2 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 2 of this invention. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 2 of this invention. It is sectional drawing which shows the other example of a structure of an oxide film formation chamber. It is explanatory drawing which shows an example of the sequence of gate oxide film formation. It is principal part sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device by Embodiment 2 of this invention. It is the schematic which shows the other example of the oxide film formation method by this invention. It is principal part sectional drawing which shows the other example of the manufacturing method of the semiconductor integrated circuit device by this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 1A Semiconductor wafer 2 Silicon oxide film 3 Silicon nitride film 4 Photoresist 5 Element isolation groove 5a Groove 6 Silicon oxide film 7 Silicon oxide film (TEOS)
8 Photoresist 9 Photoresist 10 n-type well 11 p-type well 12 p-type channel region 13 n-type channel region 14 gate oxide film 15 gate electrode 16 p ⁻ type semiconductor region 17 p type semiconductor region 18 n ⁻ type semiconductor region 19 n Type semiconductor region 20 side wall spacer 21 p ⁺ type semiconductor region 22 n ⁺ type semiconductor region 23 TiSi ₂ layer 24 silicon oxide film 25 to 28 connection hole 29 to 31 wiring 40 field oxide film 41 floating gate 42 control gate 43 tunnel oxide film 44 Second gate oxide film 100 Oxide film forming device 101 Cleaning device 102 Loader 103 Cleaning chamber 104 Hydrofluoric acid cleaning chamber 105 Drying chamber 106 Buffer 107 Oxide film forming chamber 108 Oxynitride film forming chamber 109 Cooling stage 110 Loader / Unloader 112 Transport 113 Robot hand 120 Heat treatment chamber 121a Heater 121b Heater 122 Soaking ring 123 Susceptor 124 Support arm 125 Thermocouple 126 Gas introduction pipe 127 Through hole 128 Bulkhead 129 Exhaust pipe 130 Lamp 140 Moisture generator 141 Reactor 142 Coil 143 Heaters 144a to 144c Gas storage tank 145 Piping 146a to 146c Mass flow controllers 147a to 147c Open / close valve 148 Connection unit 150 Vertical oxide film forming device 160 Moisture generating device Qn n-channel MOSFET
Qp p-channel MOSFET

Claims (3)

A method of manufacturing a semiconductor integrated circuit device including the following steps:
(A) a step of synthesizing water vapor from oxygen and hydrogen using a catalyst at a first temperature in a moisture synthesis unit;
(B) a step of diluting the synthesized water vapor with a diluting gas in a connecting portion provided downstream from the moisture synthesis portion;
(C) a step of transferring the diluted water vapor through a gas introduction pipe into a vertical processing chamber provided in a vertical batch processing thermal oxidation furnace while maintaining a gaseous state;
(D) In the thermal oxidation furnace, heating the plurality of wafers accommodated in the processing chamber to a second temperature higher than the first temperature in a wet oxidation atmosphere containing the transferred water vapor. A step of performing a thermal oxidation process on a silicon member provided on or above each first main surface of the plurality of wafers,
Here, the wet oxidation atmosphere is integrated so as to share the outer wall surface along the outer wall surface of the processing chamber from the lower end to the upper end of the processing chamber so as to flow from top to bottom in the processing chamber. Provided in the process chamber by the gas introduction pipe having an outlet at the upper end of the process chamber,
Further, the plurality of wafers are arranged in a vertical direction in the processing chamber,
Further, the thermal oxidation process is performed while supplying the wet oxidation atmosphere into the processing chamber.   The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the silicon member is the first main surface itself.   The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the silicon member is provided on the first main surface with another intervening layer interposed therebetween.

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