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JP4597236B2 - Circuit board inspection method and circuit board inspection apparatus - Google Patents

Circuit board inspection method and circuit board inspection apparatus Download PDF

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JP4597236B2
JP4597236B2 JP2008275050A JP2008275050A JP4597236B2 JP 4597236 B2 JP4597236 B2 JP 4597236B2 JP 2008275050 A JP2008275050 A JP 2008275050A JP 2008275050 A JP2008275050 A JP 2008275050A JP 4597236 B2 JP4597236 B2 JP 4597236B2
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circuit board
capacitance
conductor pattern
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insulation
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JP2009080121A (en
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敏彦 金井
善之 西城
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Hioki EE Corp
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Description

本発明は、検査対象の回路基板における複数の導体パターンについて導通検査や絶縁検査を行うことにより回路基板の良否を検査する回路基板検査方法および回路基板検査装置に関するものである。 The present invention relates to a circuit board inspection method and a circuit board inspection apparatus for inspecting the quality of a circuit board by conducting continuity inspection and insulation inspection on a plurality of conductor patterns on a circuit board to be inspected.

近年、回路基板における導体パターンの高密度化が進んでおり、このような高密度回路基板を量産時に自動検査するためには、検査用データを良品回路基板から吸収する必要がある。このため、その量産当初において、数多くの回路基板から良品回路基板を選別しなければならない。この際に、従来は、以下に述べる導通絶縁検査方法に従って回路基板を選別している。   In recent years, the density of conductor patterns on circuit boards has been increasing, and in order to automatically inspect such high-density circuit boards during mass production, it is necessary to absorb inspection data from non-defective circuit boards. For this reason, in the initial stage of mass production, it is necessary to select a good circuit board from a large number of circuit boards. At this time, conventionally, circuit boards are selected according to a conduction insulation inspection method described below.

この従来の絶縁導通検査方法では、まず最初に、導通検査によって回路基板の良否を検査する。この際には、図6に示すように、例えば、互いに絶縁された導体パターンP1 〜P5 (以下、区別しないときには、「導体パターンP」という)が回路基板PCに形成されているとした場合、各導体パターンPの各終端部間の導通状態を検査する。具体的には、導体パターンP1 については、終端部P11,P12にそれぞれ接触型プローブを接触させ、両接触型プローブ間の導通抵抗を測定する。この際に、導通抵抗が所定抵抗値未満のときには、両終端部P11,P12が断線することなく正常に導通していると判別し、所定抵抗値以上のときには、両終端部P11,P12間が断線していると判別する。同様にして、導体パターンP1 の各終端部P11〜P14におけるすべての2点間の組み合わせ(P11−P13間,P11−P14間,P12−P13間,P12−P14間,P13−P14間)について導通検査を実行する。次いで、他の導体パターンP2 の終端部P21,P22間、導体パターンP3 の終端部P31,P32間、導体パターンP4 の終端部P41〜P44相互間、および導体パターンP5 の終端部P51,P52間について、上記した導通検査を実行する。すべての導体パターンPについての導通検査において正常と判別したときに、導体パターンPの断線が生じていないと判別する。この場合、導体パターンPの数を値Aとし、終端部の数を値Bとした場合、測定回数N1は、下記の(1)式で表される。
N1=(B−A)・・・・・(1)式
In this conventional insulation continuity inspection method, first, the quality of the circuit board is inspected by a continuity inspection. In this case, as shown in FIG. 6, for example, when conductor patterns P1 to P5 (hereinafter referred to as “conductor pattern P” when not distinguished from each other) insulated from each other are formed on the circuit board PC, The conduction state between the terminal portions of each conductor pattern P is inspected. Specifically, for the conductor pattern P1, contact probes are brought into contact with the terminal portions P11 and P12, respectively, and the conduction resistance between both contact probes is measured. At this time, when the conduction resistance is less than the predetermined resistance value, it is determined that both terminal portions P11 and P12 are normally connected without disconnection, and when the resistance value is equal to or higher than the predetermined resistance value, there is a gap between both terminal portions P11 and P12. Judge that it is disconnected. In the same manner, the connection between all the two points (each between P11 and P13, between P11 and P14, between P12 and P13, between P12 and P14, and between P13 and P14) in each end portion P11 to P14 of the conductor pattern P1 is conducted. Perform inspection. Next, between the end portions P21 and P22 of the other conductor pattern P2, between the end portions P31 and P32 of the conductor pattern P3, between the end portions P41 to P44 of the conductor pattern P4, and between the end portions P51 and P52 of the conductor pattern P5. The above-described continuity test is executed. When it is determined that the conductor pattern P is normal in the continuity test for all the conductor patterns P, it is determined that the conductor pattern P is not disconnected. In this case, when the number of conductor patterns P is a value A and the number of terminal portions is a value B, the number of times of measurement N1 is expressed by the following equation (1).
N1 = (BA) (1) formula

次いで、絶縁検査によって回路基板の良否を検査する。この際には、各導体パターンP,Pにおける任意の部位に接触型プローブを接触させ、両導体パターンP間の導通抵抗を測定する。この際に、導通抵抗が所定抵抗値以上のときには、両導体パターンP,P間が半田ブリッジなどによって短絡することなく正常に絶縁されていると判別し、所定抵抗値未満のときには、両導体パターンP,P間が短絡していると判別する。すべての導体パターンP,P間の組み合わせ(P1 −P2 間,P1 −P3 間,P1 −P4 間,P1 −P5 間,P2 −P3 間,P2 −P4 間,P2 −P5 間,P3 −P4 間,P3 −P5 間,P4 −P5 間)について導通検査を実行する。すべての導体パターンP,P間についての絶縁検査において正常と判別し、かつ断線が生じていないと判別したときに、その回路基板PCを良品と判別する。この場合、測定回数N2は、下記の(2)式で表される。
N2=A(A−1)/2・・(2)式
Next, the quality of the circuit board is inspected by an insulation inspection. At this time, a contact-type probe is brought into contact with an arbitrary portion of each conductor pattern P, P, and the conduction resistance between both conductor patterns P is measured. At this time, when the conduction resistance is equal to or greater than the predetermined resistance value, it is determined that the two conductor patterns P are normally insulated without being short-circuited by a solder bridge or the like. It is determined that P and P are short-circuited. Combinations of all conductor patterns P and P (between P1 and P2, between P1 and P3, between P1 and P4, between P1 and P5, between P2 and P3, between P2 and P4, between P2 and P5, between P3 and P4 , P3-P5, P4-P5). When it is determined that the insulation inspection between all the conductor patterns P and P is normal and no disconnection occurs, the circuit board PC is determined to be a non-defective product. In this case, the number of times of measurement N2 is expressed by the following equation (2).
N2 = A (A-1) / 2 ... (2) formula

ところが、量産開始時においては、高密度の回路基板PCの歩留まりが極めて低く、良品回路基板PCが例えば1000枚当たりで数枚のことが少なくない。一方、従来の回路基板検査方法では、例えば、1枚の回路基板PCに1000個の独立した導体パターンPが形成され、かつ導体パターンPの各々に3つの終端部がそれぞれ平均的に形成されているとした場合、導通検査の測定回数N1と絶縁検査の測定回数N2との総測定回数Nは、約50万回と膨大な回数となる。したがって、接触型プローブの移動に約0.1秒必要とした場合、検査時間は、約13.9時間となる。この結果、従来の回路基板検査方法には、検査時間の長時間化を招いているという問題がある。   However, at the start of mass production, the yield of high-density circuit board PC is extremely low, and there are many cases where, for example, 1000 non-defective circuit board PCs are provided. On the other hand, in the conventional circuit board inspection method, for example, 1000 independent conductor patterns P are formed on one circuit board PC, and three terminal portions are formed on each of the conductor patterns P on average. In this case, the total number of measurements N of the continuity test measurement number N1 and the insulation test measurement number N2 is an enormous number of about 500,000 times. Therefore, when about 0.1 second is required for the movement of the contact probe, the inspection time is about 13.9 hours. As a result, the conventional circuit board inspection method has a problem that the inspection time is prolonged.

本発明は、かかる問題点に鑑みてなされたものであり、検査時間の短縮を図ることが可能な回路基板検査方法および回路基板検査装置を提供することを主目的とする。   The present invention has been made in view of such problems, and a main object of the present invention is to provide a circuit board inspection method and a circuit board inspection apparatus capable of reducing the inspection time.

上記目的を達成すべく請求項1記載の回路基板検査方法は、検査対象の回路基板に形成された導体パターンの各終端部と、回路基板に対して所定位置に配設した容量測定手段との間の容量を測定し、同一の導体パターンにおける任意の1つの終端部についての測定容量に対する他の終端部についての測定容量の割合が所定の許容割合範囲外のときに、その導体パターンに対して、終端部同士間の導通状態に基づいて導通検査を行うことにより回路基板の良否を検査することを特徴とする。 In order to achieve the above object, a circuit board inspection method according to claim 1 includes: each terminal portion of a conductor pattern formed on a circuit board to be inspected; and capacitance measuring means disposed at a predetermined position with respect to the circuit board. When the ratio of the measured capacitance for the other terminal portion to the measured capacity for any one terminal portion in the same conductor pattern is outside the predetermined allowable ratio range , The quality of the circuit board is inspected by conducting a continuity test based on a continuity state between the terminal portions.

請求項記載の回路基板検査方法は、請求項1記載の回路基板検査方法において、測定容量が近似する導体パターン間同士に対して、導体パターン同士の導通状態に基づいて絶縁検査を行うことを特徴とする。 Circuit board inspection method according to claim 2, wherein, in the circuit board inspection method according to claim 1 Symbol placement for between conductor patterns each other measured capacitance approximates, to perform the insulation test on the basis of the conductive state between the conductor patterns It is characterized by.

回路基板に対して所定位置に配設した容量測定手段と導体パターンとの間の容量は、その導体パターンの面積にほぼ比例する。したがって、一般的には、互いに絶縁された2つの導体パターンの測定容量が互いに近似するときには、その両導体パターンは半田ブリッジなどによって短絡している可能性があると考えることができる。この回路基板検査方法では、まず、各導体パターンと、容量測定手段との間の容量を測定し、測定容量が互いに近似する導体パターンが存在するときに、その導体パターン同士の絶縁検査を行う。この場合、各導体パターンについての容量の測定回数は、導体パターン数に等しいため、僅かな測定時間で終了する。また、測定容量が互いに近似する導体パターンを検索するための作業は、例えばパーソナルコンピュータなどを用いることによって瞬時に行うことができる。したがって、すべての導体パターン間の絶縁検査を行う場合と比較して、極めて短時間で絶縁検査を行うことが可能となる。   The capacitance between the capacitance measuring means disposed at a predetermined position with respect to the circuit board and the conductor pattern is substantially proportional to the area of the conductor pattern. Therefore, in general, when the measured capacities of two conductor patterns insulated from each other approximate each other, it can be considered that the two conductor patterns may be short-circuited by a solder bridge or the like. In this circuit board inspection method, first, the capacitance between each conductor pattern and the capacitance measuring means is measured, and when there are conductor patterns whose measured capacitances are close to each other, an insulation inspection between the conductor patterns is performed. In this case, since the number of times of measuring the capacitance for each conductor pattern is equal to the number of conductor patterns, the measurement is completed in a short measurement time. Further, the operation for searching for conductor patterns whose measurement capacities are similar to each other can be performed instantaneously by using, for example, a personal computer. Therefore, it is possible to perform the insulation test in an extremely short time compared to the case of performing the insulation test between all the conductor patterns.

請求項記載の回路基板検査方法は、請求項記載の回路基板検査方法において、終端部についての測定容量に基づいて絶縁検査の対象となる導体パターンを決定することを特徴とする。 Circuit board inspection method according to claim 3, wherein, in the circuit board inspection method according to claim 2, wherein said determining a conductor pattern to be insulation test on the basis of the measured capacitance for the termination.

請求項1〜記載の回路基板検査方法では、最初に、導体パターンの各終端部と、容量測定手段との間の容量を測定する。この場合、同一の導体パターンにおける各終端部についての測定容量は、パターンの断線が生じていないときには、ほぼ同一容量となる。したがって、同一の導体パターンにおける各終端部の測定容量が所定許容範囲外のときには、その導体パターンは、いずれかの終端部間で断線しているものと判別して、その導体パターンに対して導通検査を行う。この場合、同一の導体パターンにおける複数の終端部間の各々についての複数の測定容量のうちの1つを用いて絶縁検査の対象を決定することができる。かかる場合には、導通検査および絶縁検査の対象を決定する際の基準となる各導体パターンについての容量を共通して測定することになるため、容量測定の時間を短縮することが可能となる。 In the circuit board inspection method according to claims 1 to 3 , first, the capacitance between each terminal portion of the conductor pattern and the capacitance measuring means is measured. In this case, the measured capacities for the end portions in the same conductor pattern are substantially the same when no pattern disconnection occurs. Therefore, when the measured capacity of each terminal end in the same conductor pattern is outside the predetermined allowable range, it is determined that the conductor pattern is disconnected between any terminal ends, and the conductor pattern is electrically connected. Perform an inspection. In this case, the object of the insulation test can be determined using one of the plurality of measurement capacitors for each of the plurality of terminal portions in the same conductor pattern. In such a case, since the capacitance of each conductor pattern serving as a reference when determining the targets for the continuity test and the insulation test is measured in common, it is possible to reduce the time for measuring the capacitance.

請求項記載の回路基板検査装置は、検査対象の回路基板に形成された導体パターン同士の導通状態に基づいて導通検査を行うことによって回路基板の良否を検査する回路基板検査装置において、回路基板に対して所定位置に配設され各導体パターンとの間の容量を測定するための容量測定手段と、判別手段とを備え、判別手段は、同一の導体パターンにおける任意の1つの終端部についての測定容量に対する他の終端部についての測定容量の割合が所定の許容割合範囲外のときに、その導体パターンを導通検査の対象とすべく決定することを特徴とする。 5. The circuit board inspection apparatus according to claim 4 , wherein the circuit board inspection apparatus inspects the quality of the circuit board by performing a continuity test based on a continuity state between conductor patterns formed on the circuit board to be inspected. A capacitance measuring means for measuring the capacitance between each conductor pattern disposed at a predetermined position and a discriminating means, and the discriminating means for any one terminal portion in the same conductor pattern When the ratio of the measured capacity of the other terminal portion to the measured capacity is out of a predetermined allowable ratio range , the conductor pattern is determined to be a continuity test target.

請求項記載の回路基板検査装置は、請求項記載の回路基板検査装置において、判別手段は、測定容量が近似する導体パターン間同士に対して、導体パターン同士の導通状態に基づいて絶縁検査を行うことを特徴とする。 The circuit board inspection apparatus according to claim 5 is the circuit board inspection apparatus according to claim 4, wherein the discrimination means performs an insulation inspection based on a conduction state between the conductor patterns with respect to each other between the conductor patterns whose measurement capacities are approximated. It is characterized by performing.

請求項記載の回路基板検査装置は、請求項記載の回路基板検査装置において、判別手段は、終端部についての測定容量に基づいて絶縁検査の対象となる導体パターンを決定することを特徴とする。 The circuit board inspection apparatus according to claim 6 is characterized in that, in the circuit board inspection apparatus according to claim 5 , the discriminating means determines a conductor pattern to be subjected to insulation inspection based on a measured capacity of the terminal portion. To do.

請求項1記載の回路基板検査方法および請求項記載の回路基板検査装置によれば、同一の導体パターンにおける任意の1つの終端部についての測定容量に対する他の終端部についての測定容量の割合が所定の許容割合範囲外のときに、その導体パターンに対して、終端部同士間の導通状態に基づいて導通検査を行うことにより、導通検査時間を短縮することができる。 According to the circuit board inspection method according to claim 1 and the circuit board inspection apparatus according to claim 4 , the ratio of the measurement capacitance for the other termination portion to the measurement capacitance for any one termination portion in the same conductor pattern is When the conductor pattern is out of the predetermined allowable ratio range , the conduction inspection time can be shortened by performing the conduction inspection on the conductor pattern based on the conduction state between the terminal portions.

また、同一の導体パターンにおける任意の1つの終端部についての測定容量に対する他の終端部についての測定容量の割合が所定の許容割合範囲外のときに、その導体パターンに対して導通検査を行うことにより、導通検査対象の導体パターンを正確に特定することができる。 Further, when the ratio of the measured volume of the other end portion to measure capacitance for any one end portion in the same conductor pattern is out of the predetermined allowable ratio range, performs a continuity check on the conductor pattern As a result, the conductor pattern to be inspected for continuity can be accurately specified.

また、請求項記載の回路基板検査方法および請求項記載の回路基板検査装置によれば、各導体パターンと容量測定手段との間の容量をそれぞれ測定し、測定した測定容量が近似する導体パターン間同士に対して絶縁検査を行うことにより、すべての導体パターン間の絶縁検査を行う場合と比較して、極めて短時間で絶縁検査を行うことができる。 In addition, according to the circuit board inspection method according to claim 2 and the circuit board inspection apparatus according to claim 5 , the capacitance between each conductor pattern and the capacitance measuring means is measured, and the measured measurement capacitance approximates the conductor. By performing the insulation inspection between the patterns, the insulation inspection can be performed in a very short time compared to the case of performing the insulation inspection between all the conductor patterns.

また、請求項記載の回路基板検査方法および請求項記載の回路基板検査装置によれば、終端部についての測定容量に基づいて絶縁検査の対象となる導体パターンを決定することにより、導通検査および絶縁検査の対象を決定する際の基準となる各導体パターンについての容量を共通して測定することができる結果、容量測定の時間を短縮することができる。 Further, according to the circuit board inspection apparatus for circuit board inspection method and claim 6 according to claim 3, by determining the conductor pattern to be insulation test on the basis of the measured capacitance of the terminal end, the continuity test As a result, the capacitance of each conductor pattern serving as a reference when determining the object of the insulation inspection can be measured in common, so that the capacitance measurement time can be shortened.

以下、添付図面を参照して、本発明に係る回路基板検査方法および回路基板検査装置の好適な実施の形態について説明する。   Preferred embodiments of a circuit board inspection method and a circuit board inspection apparatus according to the present invention will be described below with reference to the accompanying drawings.

最初に、回路基板検査装置1の構成について、各図を参照して説明する。   First, the configuration of the circuit board inspection apparatus 1 will be described with reference to the drawings.

回路基板検査装置1は、図1に示すように、回路基板検査における各種の制御を実行する制御装置2と、導通絶縁検査および容量測定を行うためのプローブ3a,3b(以下、区別しないときには、「プローブ3」という)を検査対象の回路基板PCに対してX−Y方向および上下方向(Z方向)にそれぞれ移動可能なX−Y移動機構4a,4b(以下、区別しないときには、「X−Y移動機構4」という)と、容量測定用治具5とを備えている。   As shown in FIG. 1, the circuit board inspection apparatus 1 includes a control apparatus 2 that executes various controls in the circuit board inspection, and probes 3a and 3b for conducting continuity insulation inspection and capacitance measurement (hereinafter, when not distinguished from each other) XY moving mechanisms 4a and 4b (hereinafter referred to as "X-" when not distinguished from each other) that can move the "probe 3" in the XY direction and the vertical direction (Z direction) with respect to the circuit board PC to be inspected. Y movement mechanism 4 ”) and a capacitance measuring jig 5.

制御装置2は、図1に示すように、本発明における判別手段に相当する制御部11、ROM12、PROM13、およびRAM14を備えている。制御部11は、導通抵抗測定処理、静電容量測定処理、X−Y移動機構4の移動制御、測定した容量についての各種のデータ処理および演算処理、並びに回路基板PCについての良否判別処理などを実行する。ROM12は、制御部11の動作プログラムなどを記憶し、PROM13は、EEPROM(Electrically Erasable PROM)で構成され、後述する近接情報などを記憶する。また、RAM14は、制御部11の演算結果などを一時的に記憶する。 Control device 2, as shown in FIG. 1, a control section 11, ROM 12, P ROM 13, and RAM14 corresponding to determine by means that put the present invention. The control unit 11 performs conduction resistance measurement processing, capacitance measurement processing, movement control of the XY movement mechanism 4, various data processing and calculation processing for the measured capacitance, and pass / fail determination processing for the circuit board PC. Execute. The ROM 12 stores an operation program of the control unit 11 and the like, and the PROM 13 is configured by an EEPROM (Electrically Erasable PROM) and stores proximity information described later. The RAM 14 temporarily stores the calculation result of the control unit 11 and the like.

容量測定用治具5は、平板状の電極6と、例えば絶縁フィルムで構成され、電極6の上面に取り付けられた薄板状の絶縁板7とを備え、検査時時には、絶縁板7上の所定位置に回路基板PCを固定可能に構成されている。   The capacity measuring jig 5 includes a flat electrode 6 and a thin insulating plate 7 made of, for example, an insulating film and attached to the upper surface of the electrode 6. The circuit board PC can be fixed at the position.

次に、回路基板検査装置1による回路基板PCに対する検査処理について、図2を参照して説明する。   Next, an inspection process for the circuit board PC by the circuit board inspection apparatus 1 will be described with reference to FIG.

この回路基板検査装置1では、例えば、量産開始時における良品回路基板PCの選別に際しては、量産した回路基板PCのうちの良否不明の任意の1枚の回路基板PCを容量測定用治具5上に固定する。この際には、容量測定用治具5における絶縁板7の上面に回路基板PCの下面が当接することにより、回路基板PCと電極6とは互いに所定の一定距離分離間した状態を維持する。   In this circuit board inspection apparatus 1, for example, when selecting a non-defective circuit board PC at the start of mass production, any one circuit board PC of unknown quality among the mass-produced circuit board PCs is placed on the capacitance measuring jig 5. Secure to. At this time, the lower surface of the circuit board PC is brought into contact with the upper surface of the insulating plate 7 in the capacitance measuring jig 5 so that the circuit board PC and the electrode 6 are kept separated from each other by a predetermined distance.

次いで、図2に示すように、各導体パターンPの容量を測定する(ステップ21)。この際には、制御部11が、X−Y移動機構4a,4bを駆動制御することにより、例えば、図5に示す導体パターンPA の各終端部PA1,PA2,PA3の順にプローブ3a,3bを交互に接触させる。この場合、制御部11は、終端部PA1にプローブ3を接触させたときの導体パターンPA および電極6間の静電容量を測定すると共に、その測定容量を測定データDA1としてRAM14に記憶させ、同様にして、終端部PA2,PA3にプローブ3を接触させたときの測定容量をデータDA2,DA3としてそれぞれRAM14に記憶させる。続いて、制御部11は、他の導体パターンPB についても、同様にして、終端部PB1,PB2,PB3にプローブ3を接触させたときの測定容量を測定データDB1,DB2,DB3としてそれぞれRAM14に記憶させる。この後、制御部11は、同様にして他のすべての導体パターンPに対して、各々の各終端部および電極6間の静電容量を測定し、その測定データをRAM14に記憶させる。この場合、静電容量の測定回数は、終端部数に等しいため、僅かな測定時間で終了する。   Next, as shown in FIG. 2, the capacitance of each conductor pattern P is measured (step 21). At this time, the controller 11 controls the driving of the XY moving mechanisms 4a and 4b, so that, for example, the probes 3a and 3b are arranged in the order of the terminal portions PA1, PA2 and PA3 of the conductor pattern PA shown in FIG. Touch alternately. In this case, the control unit 11 measures the capacitance between the conductor pattern PA and the electrode 6 when the probe 3 is brought into contact with the terminal end PA1, and stores the measured capacitance in the RAM 14 as measurement data DA1. Thus, the measured capacities when the probe 3 is brought into contact with the terminal portions PA2 and PA3 are stored in the RAM 14 as data DA2 and DA3, respectively. Subsequently, for the other conductor pattern PB, the control unit 11 similarly stores the measurement capacitance when the probe 3 is brought into contact with the terminal portions PB1, PB2, and PB3 in the RAM 14 as measurement data DB1, DB2, and DB3, respectively. Remember me. Thereafter, the control unit 11 similarly measures the capacitance between each terminal portion and the electrode 6 for all the other conductor patterns P, and stores the measurement data in the RAM 14. In this case, since the number of times of measurement of the capacitance is equal to the number of terminal portions, the measurement is completed in a short measurement time.

次に、制御部11は、RAM14に記憶させた測定データに基づいて、各導体パターンPについての断線判定処理を実行する(ステップ22)。この判定処理は、以下に述べる原理に基づいて行われる。すなわち、同一の導体パターンPにおける各終端部についての測定容量は、導体パターンPの断線が生じていないときには、ほぼ同一容量となる。したがって、例えば導体パターンPA における各終端部PA1〜PA3についての各測定容量が、そのうちの最大容量に対して所定許容範囲(例えば95%〜100%)を外れたときには、導体パターンPA のいずれかの終端部間で断線を生じている可能性があるものと判別することができる。   Next, the control part 11 performs the disconnection determination process about each conductor pattern P based on the measurement data memorize | stored in RAM14 (step 22). This determination process is performed based on the principle described below. That is, the measured capacities at the end portions in the same conductor pattern P are substantially the same when the conductor pattern P is not disconnected. Therefore, for example, when the measured capacities of the terminal portions PA1 to PA3 in the conductor pattern PA deviate from a predetermined allowable range (for example, 95% to 100%) with respect to the maximum capacity, any of the conductor patterns PA It can be determined that there is a possibility of disconnection between the end portions.

このため、制御部11は、具体的には、図3に示すように、測定容量を各導体パターンPに対応するネット番号(導体パターン番号)毎にグループ化すると共に、ROM12に記憶されているソートプログラムに従い、そのグループ内の測定容量を大きい順に整列する。次いで、同一の導体パターンPにおける各終端部に対応する測定容量が上記した許容範囲内にあるかを判別する。これらの判別処理をすべての導体パターンPについて行った後に、断線を生じている可能性があるか否かを判定する(ステップ23)。   For this reason, specifically, the control unit 11 groups the measurement capacitances for each net number (conductor pattern number) corresponding to each conductor pattern P as shown in FIG. According to the sort program, the measurement capacities in the group are arranged in descending order. Next, it is determined whether or not the measurement capacitance corresponding to each terminal portion in the same conductor pattern P is within the allowable range described above. After performing these determination processes for all the conductor patterns P, it is determined whether or not there is a possibility of disconnection (step 23).

断線を生じている可能性があると判定したときには、制御部11は、RAM14内に導通検査用データファイルを作成する(ステップ24)。この際に、導通検査用データファイルには、許容範囲を外れた終端部番号およびネット番号が制御部11によって書き込まれる。導通検査用データファイルの作成を終了したとき、または断線を生じている可能性がないと判別したときには、絶縁不良判定処理を実行する(ステップ25)。この判定処理は、以下に述べる原理に基づいて行われる。すなわち、測定容量は、その導体パターンPの面積にほぼ比例するため、一般的には、互いに絶縁された2つの導体パターンP,Pの測定容量が互いに近似するときには、その両導体パターンP,Pは半田ブリッジなどによって短絡している可能性があると考えることができる。したがって、例えば、導体パターンPB における各終端部PB1〜PB3についての各測定容量のうちの最大容量が、導体パターンPA における各終端部PA1〜PA3についての各測定容量のうちの最大容量に対して所定範囲(例えば70%〜100%)内のときには、導体パターンPA ,PB が互いに短絡している可能性があるものと判別することができる。   When it is determined that there is a possibility of disconnection, the control unit 11 creates a data file for continuity inspection in the RAM 14 (step 24). At this time, the terminal number and net number outside the allowable range are written by the control unit 11 in the data file for continuity test. When the creation of the continuity test data file is completed, or when it is determined that there is no possibility of disconnection, insulation failure determination processing is executed (step 25). This determination process is performed based on the principle described below. That is, since the measured capacitance is substantially proportional to the area of the conductor pattern P, generally, when the measured capacitances of the two conductor patterns P, P insulated from each other approximate each other, both the conductor patterns P, P May be short-circuited by a solder bridge or the like. Therefore, for example, the maximum capacity among the measured capacities of the terminal portions PB1 to PB3 in the conductor pattern PB is predetermined with respect to the maximum capacity of the measured capacities of the terminal portions PA1 to PA3 in the conductor pattern PA. When it is within the range (for example, 70% to 100%), it can be determined that the conductor patterns PA and PB may be short-circuited with each other.

このため、制御部11は、ROM12に記憶されているソートプログラムに従い、図4に示すように、既に整列した各導体パターンPについての最大の測定容量を大きい順に整列する。次いで、制御部11は、n(nは、値1から、導体パターンPの数よりも値1分小さい値までの整数)番目に大きい測定容量に対する(n+1)番目に大きい測定容量が所定範囲内であるかを次々と判別し、その後に、短絡などによる絶縁不良を生じている可能性があるか否かを判定する(ステップ26)。また、この際には、制御部11は、PROM13に記憶されている近接情報に基づいて、測定容量が所定範囲内の導体パターンP,P同士のうち、短絡が生じ得ない導体パターンP,P同士については、絶縁不良を生じていないものと判定し、絶縁検査対象から除外する。この結果、絶縁検査対象の導体パターンPを絞り込むことができるため、この後に行われる絶縁検査時間を短縮することができる。   Therefore, according to the sort program stored in the ROM 12, the control unit 11 arranges the maximum measured capacities for the already arranged conductor patterns P in descending order as shown in FIG. Next, the control unit 11 determines that the (n + 1) th largest measurement capacity is within a predetermined range with respect to the nth (n is an integer from the value 1 to a value one minute smaller than the number of conductor patterns P). Are determined one after another, and thereafter, it is determined whether or not there is a possibility of causing an insulation failure due to a short circuit or the like (step 26). At this time, the control unit 11 determines the conductor patterns P and P that cannot cause a short circuit among the conductor patterns P and P whose measured capacitance is within a predetermined range based on the proximity information stored in the PROM 13. About each other, it determines with the thing which has not produced the insulation defect, and excludes it from an insulation test object. As a result, the conductor pattern P to be subjected to insulation inspection can be narrowed down, so that the insulation inspection time performed thereafter can be shortened.

絶縁不良を生じている可能性があると判定したときには、制御部11は、RAM14内に絶縁検査用データファイルを作成する(ステップ27)。この際に、絶縁検査用データファイルには、絶縁不良を生じている可能性のある1対のネット番号(例えば、上記の例では、1対の導体パターンPA ,PB のネット番号)が制御部11によって書き込まれる。この場合、制御部11は、パターンの断線不良および絶縁不良を生じている可能性がないと判別したしたときには、この回路基板PCを良品と判別して、この検査処理を終了する。一方、絶縁検査用データファイル作成の終了、または絶縁不良を生じている可能性がないと判別したときであって、導通検査用データファイルを作成したときには、導通検査を実行する(ステップ28)。   When it is determined that there is a possibility that an insulation failure has occurred, the control unit 11 creates an insulation inspection data file in the RAM 14 (step 27). At this time, in the data file for insulation inspection, a pair of net numbers (for example, the net numbers of the pair of conductor patterns PA and PB in the above example) that may cause an insulation failure are stored in the control unit. 11 is written. In this case, when the control unit 11 determines that there is no possibility of pattern disconnection failure or insulation failure, the control unit 11 determines that the circuit board PC is a non-defective product and ends the inspection process. On the other hand, when it is determined that there is no possibility that the insulation inspection data file has been generated or that there is a possibility that an insulation failure has occurred, the continuity test is executed (step 28).

導通検査時には、制御部11は、導通検査用データファイルのデータ内容に従い、X−Y移動機構4a,4bを駆動することにより、導通検査対象の導体パターンPにおける1対の終端部にプローブ3a,3bをそれぞれ接触させ、両終端部間の導通抵抗を測定する。同様にして、制御部11は、導通検査用データファイルに示されている他の各1対の終端部間の導通抵抗をすべて測定する。次いで、制御部11は、断線の有無を判別する(ステップ29)。この際には、制御部11は、測定したすべての導通抵抗が規定抵抗値未満のときには、断線が生じていないと判別し、導通抵抗が規定抵抗値以上の終端部間が存在したときには、不良品基板であると判定し(ステップ33)、この検査処理を終了する。   At the time of the continuity test, the control unit 11 drives the XY movement mechanisms 4a and 4b according to the data content of the data file for continuity test, so that the probe 3a, 3b is contacted, and the conduction resistance between both end portions is measured. Similarly, the control part 11 measures all the conduction | electrical_connection resistance between each other 1 pair of termination | terminus parts shown by the data file for continuity inspection. Subsequently, the control part 11 discriminate | determines the presence or absence of a disconnection (step 29). At this time, the control unit 11 determines that no disconnection has occurred when all measured conduction resistances are less than the specified resistance value, and determines that no disconnection has occurred between the terminal portions where the conduction resistance exceeds the specified resistance value. It determines with it being a non-defective board | substrate (step 33), and complete | finishes this test | inspection process.

一方、導通検査用データファイルを作成していないとき、または断線が生じていないと判別したとき(ステップ29)であって、絶縁検査用データファイルを作成しているきには、絶縁検査を実行する(ステップ30)。この絶縁検査では、制御部11は、絶縁検査用データファイルのデータ内容に従い、X−Y移動機構4a,4bを駆動することにより、絶縁検査対象の導体パターンP,Pにプローブ3a,3bをそれぞれ接触させ、両導体パターンP,P間の導通抵抗を測定する。同様にして、制御部11は、絶縁検査用データファイルに示されている他の導体パターンP,P間の導通抵抗をすべて測定する。次いで、制御部11は、絶縁不良の有無を判別する(ステップ31)。この際には、制御部11は、導通抵抗が規定抵抗値未満の導体パターンP,P間が存在したときには、不良品基板であると判定し(ステップ32)、この検査処理を終了する。一方、制御部11は、測定したすべての導通抵抗が規定抵抗値以上のときには、絶縁不良が生じていないため、良品回路基板PCであると判定する。この結果、量産時における良品の回路基板PCが選別され、その良品回路基板PCから検査用データを吸収することができる。   On the other hand, when the continuity test data file has not been created or when it is determined that no disconnection has occurred (step 29) and the insulation test data file has been created, the insulation test is executed. (Step 30). In this insulation inspection, the control unit 11 drives the XY moving mechanisms 4a and 4b according to the data contents of the insulation inspection data file, thereby attaching the probes 3a and 3b to the conductor patterns P and P to be insulated. Contact is made and the conduction resistance between the two conductor patterns P and P is measured. Similarly, the control unit 11 measures all the conduction resistances between the other conductor patterns P and P shown in the data file for insulation inspection. Next, the control unit 11 determines whether there is an insulation failure (step 31). In this case, the control unit 11 determines that the substrate is a defective substrate when there is a conductor pattern P between which the conduction resistance is less than the specified resistance value (step 32), and ends the inspection process. On the other hand, when all the measured conduction resistances are equal to or greater than the specified resistance value, the control unit 11 determines that the circuit board PC is a good product because no insulation failure has occurred. As a result, a non-defective circuit board PC at the time of mass production is selected, and inspection data can be absorbed from the non-defective circuit board PC.

このように、この回路基板検査装置1によれば、導通検査および絶縁検査に先立って、静電容量を測定し、その測定容量に基づいて導通絶縁検査対象を特定することにより、導通絶縁検査対象の導体パターンPを絞り込むことができる結果、導通検査および絶縁検査を極めて短時間で終了することができる。具体的には、上記した例(1枚の回路基板PCに1000個の独立した導体パターンPが形成され、かつ導体パターンPの各々に3つの終端部がそれぞれ平均的に形成されているとした場合)で比較すると、容量測定回数は、従来の導通検査の回数とほぼ等しい回数となる。一方、導通検査対象および絶縁検査対象がいずれも存在しないときには、その後の導通検査および絶縁検査が不要となる。このため、従来の回路基板検査方法では、良品の回路基板PCであっても約50万回と膨大な回数の絶縁検査が常に必要とされていたのに対し、この回路基板検査装置1によれば、その絶縁検査自体を不要にできる結果、極めて迅速に良品回路基板PCを選別することができる。また、導通絶縁検査が必要と判定された導体パターンPが存在する場合であっても、その導通検査および絶縁検査の検査対象が激減する結果、導通絶縁検査時間を激減することができる。   Thus, according to this circuit board inspection apparatus 1, by measuring the capacitance prior to the continuity test and the insulation test, and specifying the continuity insulation test object based on the measured capacity, the continuity insulation test object As a result of narrowing down the conductor pattern P, the continuity test and the insulation test can be completed in a very short time. Specifically, the above example (1000 independent conductor patterns P are formed on one circuit board PC, and three terminal portions are formed on each of the conductor patterns P on average, respectively. In the case of ()), the number of times of capacitance measurement is approximately equal to the number of times of the conventional continuity test. On the other hand, when neither a continuity test object nor an insulation test object exists, the subsequent continuity test and insulation test become unnecessary. For this reason, in the conventional circuit board inspection method, even for a non-defective circuit board PC, an insulation inspection of an enormous number of times of about 500,000 times is always required. As a result, it is possible to sort out the non-defective circuit board PC very quickly as a result of eliminating the need for the insulation inspection itself. Further, even when there is a conductor pattern P determined to require continuity insulation inspection, the continuity insulation inspection time can be drastically reduced as a result of the drastic decrease in inspection targets of the continuity inspection and insulation inspection.

なお、本発明は、上記した発明の実施の形態に示した構成に限定されない。例えば、本発明の実施の形態では、導通検査(ステップ28)および絶縁検査(ステップ31)において、1カ所でも断線または絶縁不良が生じている場合には検査処理を終了する例について説明したが、測定した各1対の終端部間の導通抵抗に基づいて、いずれの終端部間で断線が生じているかを制御部11に対して特定させると共に、その特定した1対の終端部番号を故障特定用ファイルとして例えばフロッピィーディスクに書き込ませることもできる。同様にして、測定した各1対の導体パターンP,P間の導通抵抗に基づいて、いずれの導体パターンP,P間で絶縁不良が生じているかを制御部11に対して特定させると共に、その特定した1対の導体パターンP,Pのネット番号を故障特定用ファイルとして例えばフロッピィーディスクに書き込ませることもできる。かかる場合には、フロッピィーディスクの内容を参照することにより、不良個所を迅速かつ容易に特定することができる。   The present invention is not limited to the configuration shown in the above-described embodiment of the invention. For example, in the embodiment of the present invention, in the continuity inspection (step 28) and the insulation inspection (step 31), the example in which the inspection process is terminated when disconnection or insulation failure has occurred even at one place has been described. Based on the measured conduction resistance between each pair of terminations, the control unit 11 is identified as to which of the terminations is broken, and the identified pair of termination numbers is specified as a failure. For example, the file can be written on a floppy disk. Similarly, based on the measured conduction resistance between each pair of conductor patterns P, P, the control unit 11 is specified which insulation pattern has occurred between which conductor patterns P, P, and The net number of the specified pair of conductor patterns P, P can be written as a failure specifying file, for example, on a floppy disk. In such a case, it is possible to quickly and easily identify the defective part by referring to the contents of the floppy disk.

また、本発明の実施の形態では、容量測定手段として平板状の電極6を用いた例について説明したが、容量測定手段は、これに限らず、XYZ方向に移動可能なプローブ状に構成することもできる。さらに、本発明の実施の形態では、回路基板PCの一面側に回路基板PCが形成されている例について説明したが、回路基板PCの両面に導体パターンPがそれぞれ形成されていたり、スルーホールを介して両面側の導体パターンP,Pが共通接続されていたりする場合には、回路基板PCの表裏を反転することにより、検査処理を同様にして行うことができるのは勿論である。   In the embodiment of the present invention, the example in which the flat electrode 6 is used as the capacity measuring means has been described. However, the capacity measuring means is not limited to this and is configured in a probe shape movable in the XYZ directions. You can also. Furthermore, in the embodiment of the present invention, the example in which the circuit board PC is formed on one surface side of the circuit board PC has been described. However, the conductor pattern P is formed on both surfaces of the circuit board PC, or through holes are formed. Of course, when the conductor patterns P, P on both sides are connected in common, the inspection process can be performed in the same manner by inverting the front and back of the circuit board PC.

本発明の実施の形態に係る回路基板検査装置1の構成を示すブロック図である。It is a block diagram which shows the structure of the circuit board inspection apparatus 1 which concerns on embodiment of this invention. 本発明の実施の形態に係る回路基板検査装置1における検査処理のフローチャートである。It is a flowchart of the test | inspection process in the circuit board test | inspection apparatus 1 which concerns on embodiment of this invention. 本発明の実施の形態に係る回路基板検査装置1において作成される導通検査対象を特定するための整列された測定データの一例を示すデータ構成図である。It is a data block diagram which shows an example of the arranged measurement data for specifying the continuity test object produced in the circuit board test | inspection apparatus 1 which concerns on embodiment of this invention. 本発明の実施の形態に係る回路基板検査装置1において作成される絶縁検査対象を特定するための整列された測定データの一例を示すデータ構成図である。It is a data block diagram which shows an example of the alignment measurement data for specifying the insulation test object produced in the circuit board inspection apparatus 1 which concerns on embodiment of this invention. 本発明の実施の形態に係る回路基板検査装置1における導通絶縁検査対象を特定する際の原理を説明するための回路基板PC上の導体パターンPの形成例を示すパターン図である。It is a pattern diagram which shows the example of formation of the conductor pattern P on the circuit board PC for demonstrating the principle at the time of specifying the conduction insulation test object in the circuit board test | inspection apparatus 1 which concerns on embodiment of this invention. 従来の回路基板検査方法を説明するための回路基板PC上の導体パターンPの形成例を示すパターン図である。It is a pattern diagram which shows the example of formation of the conductor pattern P on the circuit board PC for demonstrating the conventional circuit board inspection method.

符号の説明Explanation of symbols

1 回路基板検査装置
2 制御装置
5 容量測定用治具
6 電極
7 絶縁板
11 制御部
13 PROM
14 RAM
DESCRIPTION OF SYMBOLS 1 Circuit board inspection apparatus 2 Control apparatus 5 Capacitance measuring jig 6 Electrode 7 Insulating plate 11 Control part 13 PROM
14 RAM

Claims (6)

検査対象の回路基板に形成された導体パターンの各終端部と、前記回路基板に対して所定位置に配設した容量測定手段との間の容量を測定し、同一の前記導体パターンにおける任意の1つの前記終端部についての前記測定容量に対する他の前記終端部についての前記測定容量の割合が所定の許容割合範囲外のときに、その導体パターンに対して、前記終端部同士間の導通状態に基づいて導通検査を行うことにより当該回路基板の良否を検査することを特徴とする回路基板検査方法。 The capacitance between each terminal portion of the conductor pattern formed on the circuit board to be inspected and the capacitance measuring means disposed at a predetermined position with respect to the circuit board is measured, and any one of the same conductor pattern is measured. When the ratio of the measured capacitance for the other termination portion to the measured capacitance for one termination portion is outside a predetermined allowable ratio range , the conductive pattern is based on the conduction state between the termination portions. A circuit board inspection method for inspecting the quality of the circuit board by conducting a continuity test. 前記測定容量が近似する前記導体パターン間同士に対して、当該導体パターン同士の導通状態に基づいて絶縁検査を行うことを特徴とする請求項1記載の回路基板検査方法。 The conductor for the pattern between each other, the circuit board inspection method according to claim 1 Symbol placement and performing insulation test on the basis of the conductive state between the conductor patterns the measured capacitance approximates. 前記終端部についての前記測定容量に基づいて前記絶縁検査の対象となる前記導体パターンを決定することを特徴とする請求項記載の回路基板検査方法。 The circuit board inspection method according to claim 2, wherein the conductor pattern to be subjected to the insulation inspection is determined based on the measured capacitance of the terminal portion. 検査対象の回路基板に形成された導体パターン同士の導通状態に基づいて導通検査を行うことによって当該回路基板の良否を検査する回路基板検査装置において、
前記回路基板に対して所定位置に配設され前記各導体パターンとの間の容量を測定するための容量測定手段と、判別手段とを備え、
前記判別手段は、同一の前記導体パターンにおける任意の1つの前記終端部についての前記測定容量に対する他の前記終端部についての前記測定容量の割合が所定の許容割合範囲外のときに、その導体パターンを前記導通検査の対象とすべく決定することを特徴とする回路基板検査装置。
In a circuit board inspection apparatus that inspects the quality of the circuit board by conducting a continuity test based on the continuity state between conductor patterns formed on the circuit board to be inspected,
Capacitance measuring means for measuring the capacitance between each conductor pattern disposed at a predetermined position with respect to the circuit board, and a discriminating means,
When the ratio of the measured capacitance for the other end portion to the measured capacitance for any one end portion in the same conductor pattern is outside a predetermined allowable ratio range , the determining means Is determined to be a target of the continuity test.
前記判別手段は、前記測定容量が近似する前記導体パターン間同士に対して、当該導体パターン同士の導通状態に基づいて絶縁検査を行うことを特徴とする請求項4記載の回路基板検査装置。 Said determining means, said relative to each other between the conductor patterns measured capacitance approximates claim 4 Symbol mounting of the circuit board inspection apparatus and performing insulation test on the basis of the conductive state between the conductor patterns. 前記判別手段は、前記終端部についての前記測定容量に基づいて前記絶縁検査の対象となる前記導体パターンを決定することを特徴とする請求項記載の回路基板検査装置。 The circuit board inspection apparatus according to claim 5 , wherein the determination unit determines the conductor pattern to be subjected to the insulation inspection based on the measured capacitance of the terminal portion.
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