JP4660946B2 - Manufacturing method of circuit board with built-in electronic components - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a circuit board with a built-in electronic component in which an electronic component such as a semiconductor integrated circuit chip having an active surface on which a plurality of external connection electrodes are formed is mounted.
[0002]
[Prior art]
First, the structure of a conventional circuit board will be described.
[0003]
As electronic devices become smaller and lighter, demands for higher circuit board density and smaller mounting components have become stricter. In the circuit board, the density is increased in the direction parallel to the surface of the circuit board by reducing the wiring rule. Furthermore, by adopting a build-up method, wiring is laminated, and vias are formed between arbitrary layers, so that it is possible to increase the density in the direction perpendicular to the circuit board surface.
[0004]
In the early days of high-density mounting, a semiconductor device in which an IC chip (semiconductor integrated circuit chip, bare chip, or semiconductor element, hereinafter referred to as “IC chip”) is sealed in a package is mounted on a mother substrate. In recent years, there is a structure in which an IC chip itself is directly mounted on a mother substrate or an interposer.
[0005]
As the former semiconductor package, a surface mount type device (SMD; Surface Mount Device) such as SOP (Small Outline Package) or QFP (Quad Flat Package) having a multi-pin lead on the outer periphery of the package is conventionally used. It was often done.
[0006]
In order to further reduce the mounting structure of such a semiconductor package, an IC chip can be used barely. As shown in FIG. 3, the IC chip 1 is connected to electrode pads 2 as a plurality of connection electrodes. The formed active surface is faced upward and fixed on the mother substrate 100 with a silver paste 110, and the electrode pad 2 and the pad 101 formed on the mother substrate 100 side are connected with a gold wire 102 by a wire bonding apparatus, A structure was used in which the sealing resin 103 was sealed and mounted by printing, a dispenser or the like so as to cover the whole.
[0007]
The advantage of this surface mounting structure is that it is not affected by the pitch limit of the electrode pad 2 of the IC chip 1 because it is connected by the gold wire 102, and there is no problem in reliability because it has many achievements. However, the disadvantage is that the gold wire 102 is relatively difficult to form in a low loop, so that the height after mounting becomes higher than other mounting structures. is there. Further, since it is necessary to connect the electrode pad 2 of the IC chip 1 to the pad 101 on the mother substrate 100 side formed outside the IC chip 1, the area required for mounting becomes wider than other mounting structures. There are drawbacks such as.
[0008]
Therefore, in recent years, in order to further reduce the mounting structure of the semiconductor package, as shown in FIG. 4, the IC chip 1 is so-called a face with the active surface on which the bumps 3 are formed on the electrode pads 2 facing downward. In a down state, flip chip bonding is performed toward the surface of the mother substrate 100 or the interposer, and the bumps 3 are directly mounted on the pads 101 of the mother substrate 100 without using leads, thereby achieving a chip size package (CSP). .
[0009]
According to the above-mentioned flip chip bonding, the area where the IC chip can be mounted is only one surface of the substrate surface, and the mounting density is limited by the substrate size, so it is difficult to further improve the mounting density. is there. Therefore, a mounting structure has been proposed in which an IC chip is mounted inside a multilayer substrate to increase the mounting density and to reduce the size of the electronic device.
[0010]
An example is shown in FIG. The circuit board having the multilayer mounting structure of the invention of the prior application shown in FIG. 5 is Japanese Patent Application No. 11-248024 filed on September 1, 1999 by the present applicant, “Electronic Circuit Built-in Printed Wiring Board and Manufacturing Method Thereof” And a multi-layer mounting structure according to an embodiment of the present invention, which is shown in a schematic cross-sectional view, and has 8 electric conductor layers (hereinafter simply referred to as “conductor layers”). A circuit board 20 having a layer structure is shown.
[0011]
That is, an electrical insulation layer (hereinafter simply abbreviated as “conductor layer”) comprising 8 conductor layers of conductor layers L1 to L8 on which a circuit pattern is formed, and between each conductor layer formed by means such as printing an electrical insulation resin. The substrate structure is hard and does not bend at I1 to I7. The insulating layers I2 to I7 are made of glass cloth impregnated with, for example, a thermosetting resin such as an epoxy resin, and the insulating layer I1 is filled with a thermosetting resin such as an epoxy resin with a filler. It is designed to relieve stress during curing by mixing a large amount of. The conductor layer L1 is formed by laminating a resin-coated copper foil above the conductor layer L2 or by plating.
[0012]
In the electrical structure, a plurality of electrode pads or lands (hereinafter referred to as “pads”) 21 and a wiring circuit are formed on the conductor layer L2 by, for example, a photoresist method using the resist film R as a mask. These are formed by etching or plating copper foil. The IC chip 1 is mechanically and electrically connected to a part of the pads 21 in a face-down state via an anisotropic conductive film (ACF) (not shown) as required.
[0013]
Further, the other pad 21 formed on the conductor layer L2 is connected to the conductor layer L1 through the via H1. Similarly, the conductor layer L2 and the conductor layer L3 are connected by a via H2, the conductor layers L3, L4, L5, and L6 are via H3, the conductor layer L6 and the conductor layer L7 are via H4, and the conductor layer L7 The conductor layer L8 is connected by a via H5.
[0014]
Thus, the vias are provided to electrically connect the necessary conductor layers through the respective insulating layers. Vias are drilled by laser processing, shot blasting, etc., and the conductive method between conductor layers by these vias is mainly copper plating, but conductive such as silver, copper-silver, solder, etc. The paste is embedded or sintered by a technique such as printing to establish conduction.
[0015]
In addition, a required circuit pattern is formed in each of the conductor layers L1 to L8, and a chip-shaped required electronic component is connected to these circuit patterns as necessary. Omitted for simplicity.
[0016]
The multilayer mounting structure described above is the circuit board 20 in which the IC chip 1 is incorporated in the face-down state. However, like the circuit board 30 shown in FIG. 6, the IC chip 1 is flip-chip bonded inside in the face-up state. It is also possible to configure with a built-in structure. Since flatness is required as the substrate 31, a metal plate, a ceramic plate, a silicon wafer, or the like is used. However, at present, few are applied to actual products.
[0017]
In the mounting structure of the illustrated example, a plurality of IC chips 1 are faced up on a conductor layer L3 in which a wiring pattern is formed on the surface of the substrate 31 made of the material as described above by means used in a semiconductor process such as sputtering. Then, the insulating layer I2 is formed by applying an insulating resin, and a conductor layer L2 having a wiring pattern formed thereon is formed on the surface of the insulating layer I2. A plurality of IC chips 1 are mounted on the surface of the layer L2 by flip chip bonding in a face-up state, and then an insulating resin is applied to form an insulating layer I1, and wiring is formed on the surface of the insulating layer I1 in the same manner as described above. In this structure, a conductor layer L1 having a pattern is formed.
[0018]
Although such a mounting structure has not yet been put into practical use, it can be used for a memory module or the like because the same IC chip is laminated in multiple layers.
[0019]
[Problems to be solved by the invention]
However, in the circuit board with a built-in IC chip proposed so far, when the circuit is designed, the IC chip is mounted so that the active surface thereof faces the substrate surface (that is, face-down) or the face as described above. I had to choose whether to mount it up or not. This means that in designing a circuit board, it is necessary to sufficiently consider the connection between the IC chip to be built in and the outer layer portion and perform component placement. As a result, the number of vias for connecting the built-in IC chip and the outer layer portion increases, which places great restrictions on the number of built-in IC chips and the design of the wiring circuit.
[0020]
The present invention has been made in view of the above problems, and provides a method of manufacturing a circuit board with a built-in electronic component that facilitates circuit design without increasing the number of vias that are connected to the outside. It is intended.
[0021]
[Means for Solving the Problems]
In order to achieve the above object, according to the method for manufacturing a circuit board with a built-in electronic component of the present invention , a plurality of external connection electrodes are arranged on a substrate surface covered with an electric conductor layer on which a wiring circuit is formed. In manufacturing an electronic component-embedded circuit board having a structure in which at least two first and second electronic components having active surfaces are mounted with their active surfaces oriented in opposite directions,
The electronic component built-in circuit board is:
The first electrical insulating layer and a first electrical conductor layer on which a wiring circuit including a plurality of electrode pads is formed on the surface of the first electrical insulating layer are used as a base substrate, and the plurality of electrode pads are provided with the plurality of the plurality of electrode pads. A plurality of external connection electrodes, the first electronic component is fixed by connecting a plurality of external connection electrodes, and the back surface side of the active surface is directed to a portion of the first electrical conductor layer where the plurality of electrode pads do not exist. A first step of fixing the second electronic component without connecting the second electronic component, and applying a second insulating resin to the fixed first electronic component and the second electronic component to be slightly thicker and curing the second electronic component. A second step of forming the electrical insulating layer, a third step of covering the surface of the second electrical insulating layer with the second electrical conductor layer, and insulation having a predetermined thickness on the back surface of the base substrate At least one third electrical insulating layer is formed by applying and curing resin. Connected to the plurality of electrode pads of the first electric conductor layer, and a fourth step of forming a third electric conductor layer on the surface of the third electric insulating layer. A fifth step of forming a via for electrically connecting a plurality of electrode pads and the second electric conductor layer, and electrically connecting the first electric insulating layer and the third electric conductor layer It is manufactured by a process including a sixth process of forming a via and a seventh process of connecting the second electrical conductor layer and the external connection electrode of the second electronic component.
[0026]
Furthermore, the thickness of the second electrical insulating layer in the second step of the method of manufacturing a circuit board with a built-in electronic component is larger than the thickness of the fixed first electronic component, A second electrical insulation layer is formed by depositing and curing an insulating resin that is equal to or slightly thinner than the thickness of the plurality of external connection electrodes, and the second electrical conductor layer is used as the second electronic component. The step of directly connecting to the external connection electrode.
[0027]
By adopting a combination structure in which electronic components are mounted face-down and face-up on a single wiring board as described above, electronic components with a lot of wiring to the outer layer side of the circuit board can be relatively mounted if they are mounted face-up. Not only can a large number of wirings be processed easily, it is not necessary to increase the number of vias for connection to the outer layer. Therefore, an electronic device incorporating the circuit board of the present invention can be further reduced in size.
[0028]
Moreover, an electronic component with relatively large power consumption can be applied to the electronic component mounted face up.
[0029]
Furthermore, the heat radiation of the electronic component mounted face up can be diffused from the back surface to the inner layer portion via the connecting material, the copper land of the conductor layer, and the via.
[0030]
Furthermore, according to the method for manufacturing a circuit board with built-in electronic components of the present invention, a combination of existing technologies such as printing, film formation, etching, bonding technology, and mounting technology used in the semiconductor device manufacturing process is used. as possible out to very easily produce the electronic component built-in circuit board which is high-density mounting Te.
[0031]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a circuit board with a built-in electronic component according to an embodiment of the present invention will be described with reference to the drawings.
[0032]
FIG. 1 is a sectional side view of an electronic component built-in circuit board according to an embodiment of the present invention, and FIG. 2 is a face-up state of a plurality of IC chips built in the electronic component built-in circuit board shown in FIG. It is a cross-sectional side view of the electronic component built-in type circuit board for explaining the mounting structure of the IC chip mounted in the above.
[0033]
In FIG. 1, reference numeral 10 indicates an electronic component built-in circuit board (hereinafter simply abbreviated as “circuit board”) of the present invention as a whole. In this circuit board 10, a plurality of IC chips 1A, 1B are built in a multi-layered board with different active surfaces. The IC chips 1A and 1B are bare chips having substantially the same outer shape, and solder or gold bumps 2 are formed on a plurality of electrode pads on their active surfaces.
[0034]
The IC chip 1A is mounted on the pad 11 of the circuit pattern formed on the surface of the conductor layer L2 in the face-down state, and the IC chip 1B is mounted in the face-up state. That is, the IC chip 1A is mounted by flip-chip bonding the bump 2 to the pad 11, the IC chip 1B is face-up with the bump 2 facing upward, and the back surface is silver paste, anisotropic conductive film It is fixedly mounted on the pad 11 via a connecting material 12 such as (ACF).
[0035]
Further, this circuit board 10 is also shown as a board having an eight-layered conductor layer, similarly to the circuit board 200 shown in FIG. That is, it has eight conductor layers of conductor layers L1 to L8 on which circuit patterns are formed, and each conductor layer is finished to a hard and unbent board structure with insulating layers I1 to I7 formed by means such as printing an insulating resin. Yes. The insulating layers I2 to I7 are made of glass cloth impregnated with, for example, a thermosetting resin such as an epoxy resin, and the insulating layer I1 is filled with a thermosetting resin such as an epoxy resin with a filler. It is advisable to mix a large amount of so that stress can be relaxed during curing. The conductor layer L1 is formed by laminating a resin-coated copper foil above the conductor layer L2 or by plating.
[0036]
In the electrical structure, a plurality of pads 11 and wiring circuits are formed on the conductor layer L2. These are formed by etching or plating copper foil. Then, the IC chip 1A is flip-chip bonded in a face-down state so that the bump 2 is located on a part of the pads 11, and the IC chip 1B is electrically connected to the conductor layer L2 via the connecting material 12 in a face-up state. Mechanically connected.
[0037]
The other pads 11 formed on the conductor layer L2 are connected to the conductor layer L1 via the via H1a, and the plurality of bumps 2 of the IC chip 1B are connected to the conductor layer L1 via the via H1b. Has been.
[0038]
Similarly, the conductor layer L2 and the conductor layer L3 are connected by a via H2, the conductor layers L3, L4, L5, and L6 are vias H3, the conductor layer L6 is a via H4 to the conductor layer L7, and the conductor layer L7 is a conductor. The layer L8 is connected by a via H5.
[0039]
Therefore, the electronic components mounted on the conductor layers are connected through the vias H2, H3, and H4, and become electronic circuit components. Further, it can be connected to an external electronic circuit via vias H1a, H1b, and H5.
[0040]
The connecting material 12 functions to fix and dissipate the IC chip 1B. The connecting material 12 is generally conductive, and is obtained by mixing a metal filler into a resin that is cured by heat or ultraviolet rays.
[0041]
The heat radiation of the IC chip 1B is conducted from the back surface of the IC chip 1B via the connecting material 12 through the via H2 formed between the conductor layers L2 and L3 to the inner layer portion or the conductor layer L8 side. Heat is dissipated.
[0042]
As described above, the conduction method between the conductor layers using vias is the same as that described above, and thus the description thereof is omitted. Further, required circuit patterns are formed on the respective conductor layers L1 to L8, and required electronic components in the form of chips are connected to these circuit patterns as necessary. Is also omitted.
[0043]
Next, the manufacturing method of the circuit board 10 of this invention is demonstrated in order of a process.
[0044]
1) First, using the insulating layer I2 and the conductor layer L2 formed on the surface thereof as a base substrate, a resist film R is formed on the surface of the conductor layer L2 by, for example, a photoresist method, and the outside of the IC chip 1A. An electrode pad for fixing the connection electrode is formed, and a silver paste that is a connection material 12 for fixing the IC chip 1B is applied by printing.
[0045]
2) Next, the center of the IC chip 1B or the alignment mark of the IC chip 1B is recognized by image recognition or the like, and the IC chip 1B is bonded to the conductor layer L2 through the connecting material 12 in a face-up state.
[0046]
3) Next, the connecting material 12 is cured.
[0047]
4) Next, a conductive adhesive is applied or an anisotropic conductive film (ACF) is applied to another predetermined position of the conductor layer L2.
[0048]
5) Next, the IC chip 1A is temporarily fixed by a bonding apparatus and then finally bonded.
[0049]
6) Next, an insulating resin is printed on both of the mounted IC chips 1A and 1B slightly thicker than the thickness of the IC chips 1A and 1B and cured to form the insulating layer I1.
[0050]
7) Next, the conductor layer L1 is formed on the surface of the insulating layer I1. In this case, a laminating press method such as laminating a resin-coated copper foil or laminating a copper foil with a prepreg interposed therebetween and a plating method are used.
8) Next, the copper foil in the portion of the conductor layer L1 where the vias H1a and H1b are opened is etched and removed.
[0051]
9) Next, the vias H1a and H1b are processed using a laser device in the portion where the copper foil has been removed. As the laser, a carbon dioxide laser or an excimer laser is used, and the distance (depth) and the diameter to the bottom of the vias H1a and H1b are different with the conductor layer L1 as a reference plane, so that processing is performed by adjusting the conditions of the output and processing method. .
10) The resin residue in the laser processed part is removed (about 1 μm).
11) Fill the vias H1a and H1b with plating or conductive paste to make them conductive.
12) Next, a wiring circuit pattern is formed on the surface of the conductor layer L1 in which the vias H1a and H1b are opened.
[0052]
Since the other insulating layers I3 to I7, conductor layers L3 to L8, and vias H2 to H5 in the circuit board 10 are formed in the same manner as the prior art circuit board 200 shown in FIG. Omitted.
[0053]
FIG. 2 shows another mounting structure of the IC chip 1B mounted in the face-up state. The mounting structure of the IC chip 1B is flattened (polished) until the bumps 2 of the IC chip 1B mounted on the conductor layer L2 are exposed after the insulating layer I1 of the IC chip 1B shown in FIG. 1 is cured. After that, the via H1a is processed and the connection with the bump 2 is measured by plating.
[0054]
By adopting such a mounting structure, there is no need to perform processing in consideration of the depth and shape of the vias Hia and H1b shown in FIG.
[0055]
As described above, by adopting a combination structure in which a plurality of IC chips are mounted face-down and face-up in a single multilayer wiring board, IC chips with many wirings on the outer side of the circuit board can be mounted face-up. For example, a large number of wirings can be processed relatively easily, and it is not necessary to increase the number of vias for connection to the outer layer portion. Therefore, an electronic device incorporating the circuit board of the present invention can be further reduced in size.
[0056]
Further, an IC chip with relatively large power consumption, for example, a central processing element (CPU) can be mounted on the IC chip mounted face up.
[0057]
Furthermore, the heat radiation of the IC chip mounted face up can be diffused from the back surface to the inner layer portion via the connecting material, the copper land of the conductor layer, and the via.
[0058]
【The invention's effect】
As described above , according to the method for manufacturing a circuit board with a built-in electronic component of the present invention , existing technologies such as printing, film formation, etching, bonding technology, and mounting technology used in the semiconductor device manufacturing process are used. An electronic component built-in type circuit board that is used in combination and mounted at high density can be manufactured very easily.
[Brief description of the drawings]
FIG. 1 is a cross-sectional side view of an electronic component built-in circuit board according to an embodiment of the present invention.
2 is an electronic component built-in circuit for explaining a mounting structure of an IC chip mounted in a face-up state among a plurality of IC chips built in the electronic component built-in circuit board shown in FIG. It is a cross-sectional side view of a substrate.
FIG. 3 is a cross-sectional side view showing a mounting structure of a bare IC chip on a mother substrate according to the prior art.
FIG. 4 is a cross-sectional side view showing a mounting structure of a conventional bare IC chip mounted on a mother substrate by flip chip bonding.
FIG. 5 is a cross-sectional side view showing a mounting structure in which a bare IC chip according to the prior art is mounted on a mother substrate in a face-down state.
FIG. 6 is a cross-sectional side view of a mounting structure in which an IC chip is incorporated by flip chip bonding in a face-up state.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... IC chip, 2 ... Electrode pad, 3 ... Bump, 10 ... Electronic component built-in type circuit board of one embodiment of this invention, L1, L2, L3, L4, L5, L6, L7, L8 ... Electrical conductor layer, I1, I2, I3, I4, I5, I6, I7 ... Electrical insulating layer, H1a, H1b, H2, H3, H4, H5, H6, H7 ... Via, R ... Resist coating

Claims (2)

At least two first and second electronic components having an active surface on which a plurality of external connection electrodes are disposed on a substrate surface covered with an electric conductor layer on which a wiring circuit is formed, In manufacturing a circuit board with a built-in electronic component that is mounted with the active surfaces facing in opposite directions,
The electronic component built-in circuit board is:
The first electrical insulating layer and a first electrical conductor layer on which a wiring circuit including a plurality of electrode pads is formed on the surface of the first electrical insulating layer are used as a base substrate, and the plurality of electrode pads are provided with the plurality of the plurality of electrode pads. A plurality of external connection electrodes, the first electronic component is fixed by connecting a plurality of external connection electrodes, and the back surface side of the active surface is directed to a portion of the first electrical conductor layer where the plurality of electrode pads do not exist. A first step of fixing the second electronic component without connecting
A second step of forming a second electrical insulating layer by depositing and curing an insulating resin on the first electronic component and the second electronic component fixed to be slightly thicker than their thicknesses;
A third step of covering the surface of the second electrical insulation layer with a second electrical conductor layer;
A third step of depositing and curing an insulating resin of a predetermined thickness on the back surface of the base substrate to form at least one third electrical insulating layer;
A fourth step of forming a third electrical conductor layer on the surface of the third electrical insulation layer;
A fifth step of forming vias for electrically connecting the plurality of electrode pads connected to the plurality of electrode pads of the first electric conductor layer and the second electric conductor layer;
A sixth step of forming a via for electrically connecting the first electrical insulating layer and the third electrical conductor layer;
A method for manufacturing a circuit board with a built-in electronic component, comprising: a step including a seventh step of connecting the second electrical conductor layer and the external connection electrode of the second electronic component. The thickness of the second electrical insulating layer in the second step is greater than the thickness of the fixed first electronic component and is equal to or more than the thickness of the second electronic component to the plurality of external connection electrodes. An insulating resin is applied and cured a little thinly to form a second electrical insulation layer, and the second electrical conductor layer is directly connected to the external connection electrode of the second electronic component. Item 2. A method for manufacturing an electronic component built-in circuit board according to Item 1.

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