JP5246235B2 - Group III nitride semiconductor light emitting device manufacturing method - Google Patents

Description

  The present invention relates to a method for manufacturing a group III nitride semiconductor light-emitting device in which light extraction efficiency is improved by using a sapphire substrate that has been processed to be uneven.

  In recent years, group III nitride semiconductor light-emitting devices have begun to be used for general lighting applications, and improvement in light extraction efficiency is strongly demanded. As one of the methods for improving the light extraction efficiency, there is known a method of performing uneven processing on a c-plane sapphire substrate (Patent Documents 1 and 2). When flattened without unevenness, the light propagating in the horizontal direction to the sapphire substrate inside the element was confined in the semiconductor layer and attenuated by repeated multiple reflections. By providing the light, the light propagating in the horizontal direction can be reflected and scattered in the vertical direction and extracted to the outside, and the light extraction efficiency can be improved.

JP 2003-318441 A JP2007-19318

  In order to sufficiently increase the light extraction efficiency, the depth of the unevenness of the sapphire substrate is increased, and the inclination angle of the uneven side surface (the angle formed by the concave side surface or the convex side surface with respect to the main surface of the sapphire substrate) is 40-80. It should be °. However, if the depth of the unevenness is increased and the uneven side surface is inclined as described above, the sapphire substrate is increased in the area that is not the c-plane, resulting in pits on the crystal surface and unevenness in crystallinity. As a result, the electrical characteristics of the element such as a decrease in electrostatic withstand voltage are deteriorated.

  When the inventors examined the cause, it was found that the cause was the mass transport of the buffer layer. After the buffer layer is formed on the sapphire substrate, when the temperature is raised to the n contact layer formation temperature, the buffer layer is mass transported and moves onto the c-plane of the sapphire substrate, and there is no buffer layer on the sapphire substrate. An area will be created. Then, the existence of a region with and without a buffer layer that is the nucleus of crystal growth causes local concentration of crystal defects, resulting in the formation of pits in that region, and the reduction of electrostatic withstand voltage. The characteristic will be deteriorated.

  The present invention has been completed by solving the above-mentioned problems, and its object is to provide a method for manufacturing a group III nitride semiconductor light-emitting device using an unevenly processed c-plane sapphire substrate. Is to suppress the generation of pits in the crystal.

In the first invention, an n-type layer made of a group III nitride semiconductor, a light emitting layer, and a p-type layer are sequentially laminated on a sapphire substrate having a concavo-convex processed c-plane as a main surface through a buffer layer. In the method for manufacturing a nitride semiconductor light emitting device, the unevenness of the sapphire substrate is a protrusion formed on the main surface, the height is 1 to 2 μm, the side surface inclination angle is 40 to 80 °, and the interval is 2 to 2. A buffer layer is formed at a temperature of 300 to 600 ° C. along the irregularities formed on the sapphire substrate, having dot-shaped convex portions periodically arranged at 8 μm, and the buffer layer is formed on the buffer layer. A prevention layer having a thickness of 20 to 1000 nm made of GaN for preventing mass transport of the layer is formed so as to cover the entire surface of the buffer layer along the unevenness at a temperature of 600 to 1050 ° C., and then on the prevention layer N-type layer at 1050-120 ℃ to formation temperature, it is a manufacturing method of a group III nitride semiconductor light emitting device characterized.

Here, the group III nitride semiconductor is a semiconductor represented by the general formula Al _x Ga _y In _z N (x + y + z = 1, 0 ≦ x, y, z ≦ 1), and a part of Al, Ga, and In Are substituted with other group 13 elements B and Tl, and part of N is substituted with other group 15 elements P, As, Sb, Bi. More generally, GaN, InGaN, AlGaN, or AlGaInN containing at least Ga is shown. Usually, Si is used as an n-type impurity and Mg is used as a p-type impurity.

The concavo-convex pattern provided on the sapphire substrate is a pattern in which dot-shaped convex portions are periodically arranged such as a matrix . Dot-like protrusions, for example, truncated pyramids, truncated cones, pyramids, a circle cone of any shape. The reason why the height of the convex portion is 1 to 2 μm is that if it is lower than 1 μm, the effect of improving the light extraction efficiency is not sufficient, and if it is higher than 2 μm, it is difficult to flatten by the buried layer. More desirably, the thickness is 1.4 to 1.8 μm. In addition, the reason why the inclination angle of the uneven side surface (the angle formed by the side surface of the convex portion with respect to the main surface of the sapphire substrate) is 40 to 80 ° is that light extraction efficiency can be further improved within this range. is there. More desirable is 50 to 70 °.

The reason why the prevention layer is grown at a temperature of 600 to 1050 ° C. is that it is necessary to cover the entire surface of the buffer layer so that the buffer layer does not mass transport. The thickness of the prevention layer is 20 to 1000 nm . If it is thinner than 20 nm, the effect of suppressing the mass transport of the buffer layer when forming the n-type layer is not sufficient, and if it is thicker than 1000 nm, the crystallinity is deteriorated. A more desirable prevention layer thickness is 50 to 500 nm. Further, the prevention layer may or may not be doped with Si.

  AlN is preferably used for the buffer layer. Compared with the case of using GaN, the generation of pits can be suppressed and the crystallinity can be improved. When AlN is used as the buffer layer, the growth temperature of the prevention layer is desirably 900 to 1050 ° C. It is possible to more effectively suppress the buffer layer from being mass transported when the prevention layer is formed. Further, when GaN is used as the buffer layer, nitrogen is preferably used as a carrier gas when the temperature is increased to form the n-type layer. It is possible to effectively suppress the mass transport of the buffer layer when the temperature is increased.

  A second invention is a method for producing a group III nitride semiconductor light emitting device according to the first invention, wherein the buffer layer is made of AlN and the prevention layer is formed at 900 to 1050 ° C.

  A third invention is a group III nitride semiconductor according to the first invention, wherein the buffer layer is GaN, and nitrogen is used as a carrier gas when the temperature is increased to form an n-type layer. It is a manufacturing method of a light emitting element.

Apart from the present invention, the following features are described in the specification.
The concavo-convex pattern provided on the sapphire substrate is a pattern in which dot-like convex portions or concave portions are periodically arranged such as a matrix, or a stripe-like pattern. The dot-like convex part or concave part has a shape such as a truncated pyramid, a truncated cone, a truncated pyramid, a cone, or a hemisphere. However, in the case of a hemispherical shape, the angle of the tangent of the portion that contacts the sapphire substrate is set to 40 to 80 °. The depth of the unevenness (the depth of the concave portion or the height of the convex portion) is set to 1 to 2 μm. If the depth is less than 1 μm, the effect of improving the light extraction efficiency is not sufficient. This is because it becomes difficult to make it. More desirably, the thickness is 1.4 to 1.8 μm. Further, the inclination angle of the uneven side surface (the angle formed by the side surface of the concave portion or the side surface of the convex portion with respect to the main surface of the sapphire substrate) is set to 40 to 80 °, so that the light extraction efficiency is further improved within this range. It is because it can do. More desirable is 50 to 70 °.

  According to the first invention, by providing the prevention layer covering the entire surface of the buffer layer, it is possible to prevent the buffer layer from being mass transported due to the temperature rise during the formation of the n-type layer. As a result, the generation of pits can be suppressed, and the light extraction efficiency can be improved without reducing the electrostatic withstand voltage of the element.

  According to the second invention, it is possible to more effectively suppress the buffer layer from being mass transported when the prevention layer is formed. In addition, the use of AlN as the buffer layer can further suppress the generation of pits.

  Further, according to the third invention, when GaN is used as the buffer layer, it is possible to effectively suppress the mass transport of the buffer layer at the time of the temperature rise during the formation of the n-type layer. .

Further, since the thickness of the prevention layer is 20 to 1000 nm, it is possible to more effectively suppress the mass transport of the buffer layer when forming the n-type layer.

The figure shown about the manufacturing process of the group III nitride semiconductor light-emitting device of Example 1. FIG. 3 is a diagram showing a configuration of a group III nitride semiconductor light-emitting element of Example 1.

  Hereinafter, specific examples of the present invention will be described with reference to the drawings. However, the present invention is not limited to the examples.

  FIG. 2 is a diagram showing the configuration of the group III nitride semiconductor light emitting device of Example 1. The group III nitride semiconductor light-emitting device of Example 1 has a structure in which light extraction efficiency is improved by using a sapphire substrate 10 that has been processed to be uneven. The sapphire substrate 10 has a c-plane main surface, and a prevention layer 12 made of GaN is formed on the sapphire substrate 10 via a buffer layer 11. The unevenness provided on the sapphire substrate 10 is a pattern in which convex portions 19 having a height of 1.6 μm and a diameter of 3 μm are arranged periodically at intervals of 5 μm. The inclination angle θ of the protrusion 19 side surface 19a with respect to the main surface of the sapphire substrate 10 is 40 to 80 °. Within this range, the light extraction efficiency can be further improved.

  Although any group III nitride semiconductor such as AlN or GaN can be used for the buffer layer 11, it is desirable to use AlN in order to suppress the generation of pits in the crystal.

  The prevention layer 12 is formed so as to cover the entire surface of the buffer layer 11 along the unevenness. The thickness of the prevention layer 12 is desirably 20 to 1000 nm. If it is thinner than 20 nm, the effect of suppressing the mass transport of the buffer layer when forming the n-type layer is not sufficient, and if it is thicker than 1000 nm, the crystallinity is deteriorated. A more desirable prevention layer thickness is 50 to 500 nm. Further, the prevention layer may or may not be doped with Si.

  The concavo-convex pattern provided on the sapphire substrate 10 is not limited to the pattern in which the dot-shaped convex portions 19 are periodically arranged as described above, and the depth of the concavo-convex (the depth of the concave portion or the height of the convex portion). Any pattern may be used as long as it is 1 to 2 μm and the inclination angle of the uneven side surface (the angle formed by the concave side surface or the convex side surface with respect to the main surface of the sapphire substrate) θ is 40 to 80 °. For example, a pattern in which dot-shaped concave portions are periodically arranged, or a pattern in which concave portions or convex portions are arranged in a stripe shape may be used. Moreover, it is not necessarily a periodic pattern. The dot-like convex part or concave part is a truncated pyramid, a truncated cone, a truncated pyramid, a cone, a hemisphere, or the like. However, in the case of a hemispherical shape, the angle of the tangent of the portion that contacts the sapphire substrate is 40 to 80 °. The unevenness depth is 1 to 2 μm. If the unevenness depth is less than 1 μm, the effect of improving the light extraction efficiency due to the unevenness is not sufficient. This is because it becomes difficult to flatten. A more preferable depth of the unevenness is 1.4 to 2 μm. The interval between the convex portions is preferably 8 μm or less for improving light extraction efficiency and 2 μm or more for easy embedding.

  On the prevention layer 12, an n-type layer 13 made of a group III nitride semiconductor, a light emitting layer 14, and a p-type layer 15 are laminated in order, and a transparent electrode 16 made of ITO is formed in a partial region on the p-type layer 15. Is formed. Further, part of the light emitting layer 14 and the p-type layer 15 is removed, and the n-type layer 13 is exposed. An n electrode 17 is formed on the exposed n-type layer 13, and a p electrode 18 is formed on the transparent electrode 16.

The n-type layer 13, the light emitting layer 14, and the p-type layer 15 may have an arbitrary structure conventionally known. For example, the n-type layer 13 has a structure in which an n-type contact layer made of GaN and doped with Si at a high concentration and an n-clad layer made of GaN are sequentially laminated from the prevention layer 12 side. For example, the light emitting layer 14 has an MQW structure in which a barrier layer made of GaN and a well layer made of InGaN are repeatedly stacked. For example, the p-type layer 15 has a structure in which a p-clad layer doped with Mg made of AlGaN and a p-contact layer doped with Mg made of GaN are stacked in this order from the light emitting layer 14 side.

  Further, a buried layer for embedding irregularities and planarizing the crystal surface may be provided between the prevention layer 12 and the n-type layer 13. When forming the buried layer made of GaN, the growth temperature is preferably 30 to 70 ° C. lower than the growth temperature (1050 to 1200 ° C.) of the n-type layer 13. Generation of pits can be suppressed. Further, by embedding Si in the buried layer, it becomes easier to bury the unevenness.

  Next, the manufacturing process of the group III nitride semiconductor light emitting device of Example 1 will be described with reference to FIG.

  First, a concavo-convex pattern having a predetermined pattern is applied to the surface of the sapphire substrate 10 by photolithography and dry etching (FIG. 1A). The unevenness is a pattern in which the dot-shaped protrusions 19 are periodically arranged as described above, the height of the protrusions 19 is 1.6 μm, and the inclination angle θ of the side surface 19a of the protrusions 19 is 40 to 80 °. . The height of the convex portion 19 can be controlled by the etching time, and the inclination angle θ of the side surface 19a of the convex portion 19 can be controlled by the shape of the resist mask.

  Next, the buffer layer 11 is formed on the sapphire substrate 10 that has been subjected to the unevenness process by MOCVD at 300 to 600 ° C. along the unevenness (FIG. 1B).

  Before forming the buffer layer 11, it is desirable to perform thermal cleaning of the surface of the sapphire substrate 10 to remove impurities. Thermal cleaning is performed at a temperature of 1000 to 1200 ° C. in a hydrogen atmosphere, for example.

  Next, the prevention layer 12 made of GaN is formed on the buffer layer 11 along the unevenness by the MOCVD method at 600 to 1050 ° C. to cover the entire surface of the buffer layer 11 (FIG. 1C). The reason why the prevention layer 12 is grown at a temperature of 600 to 1050 ° C. is because it is necessary to cover the entire surface of the buffer layer 11 so that the buffer layer 11 is not mass transported. When AlN is used as the buffer layer 11, the growth temperature of the prevention layer 12 is desirably 900 to 1050 ° C. The mass transport of the buffer layer 11 when forming the prevention layer 12 can be more effectively suppressed.

  The prevention layer is preferably GaN, but a group III nitride semiconductor such as AlGaN, InGaN, or AlGaInN in which a part of Ga is replaced with Al or In can also be used.

  Next, the n-type layer 13 is formed on the prevention layer 12 at 1050 to 1200 ° C. by the MOCVD method. At this time, since the entire surface of the buffer layer 11 is covered with the prevention layer 12, mass transport of the buffer layer 11 is suppressed. When GaN is used as the buffer layer 11, it is desirable to use nitrogen as a carrier gas when raising the temperature for forming the n-type layer 13. It is possible to effectively suppress the mass transport of the buffer layer 11 during the temperature increase. Subsequently, the light emitting layer 14 and the p-type layer 15 are sequentially formed on the n-type layer 13 by MOCVD (FIG. 1D).

  Next, a transparent electrode 16 made of ITO is formed in a partial region on the p-type layer 15. Then, the light emitting layer 14 and the p-type layer 15 are partially etched to expose the n-type layer 13. An n electrode 17 is formed on the exposed n-type layer 13, and a p electrode 18 is formed on the transparent electrode 16.

  According to the group III nitride semiconductor light-emitting device manufacturing method of Example 1 described above, the mass transport of the buffer layer 11 is suppressed by the prevention layer 12. Therefore, even if the unevenness of the sapphire substrate 10 is deepened to 1 to 2 μm and the inclination angle of the uneven surface is 40 to 80 ° to further improve the light extraction efficiency, the generation of pits in the crystal is suppressed. It is possible to suppress deterioration of the electrical characteristics of the element such as a decrease in electrostatic withstand voltage.

  The group III nitride semiconductor light emitting device of Example 1 is a face-up type, but the present invention can also be applied to a flip chip type.

  The group III nitride semiconductor light-emitting device according to the present invention can be used in lighting devices and the like.

10: sapphire substrate 11: buffer layer 12: prevention layer 13: n-type layer 14: light-emitting layer 15: p-type layer 16: transparent electrode 17: n-electrode 18: p-electrode 19: convex portion

Claims (3)

An III-type nitride semiconductor light-emitting device in which an n-type layer, a light-emitting layer, and a p-type layer made of a group III nitride semiconductor are sequentially stacked on a sapphire substrate having an irregularly-processed c-plane as a main surface through a buffer layer In the manufacturing method,
The unevenness of the sapphire substrate is a convex portion formed on the main surface, and is periodically arranged with a height of 1 to 2 μm, a side surface inclination angle of 40 to 80 °, and an interval of 2 to 8 μm. Having a dot-shaped convex part,
The buffer layer is formed at a temperature of 300 to 600 ° C. along the irregularities formed on the sapphire substrate,
On the buffer layer, a 20-1000 nm thick prevention layer made of GaN that prevents mass transport of the buffer layer is coated on the entire surface of the buffer layer along the irregularities at a temperature of 600-1050 ° C. Formed as
Thereafter, the n-type layer is formed on the prevention layer at a temperature of 1050 to 1200 ° C.
A method for producing a Group III nitride semiconductor light-emitting device.   2. The method of manufacturing a group III nitride semiconductor light emitting device according to claim 1, wherein the buffer layer is made of AlN, and the prevention layer is formed at 900 to 1050 ° C. 3.   2. The group III nitride semiconductor light emitting device according to claim 1, wherein the buffer layer is made of GaN, and nitrogen is used as a carrier gas when the temperature is increased to form the n-type layer. 3. Method.

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