JP5233758B2 - Oscillator - Google Patents

Description

  The present invention relates to a piezoelectric oscillator.

  In recent years, mobile phones are required to have high call quality, and piezoelectric oscillators are also required to have better noise performance, particularly good phase noise performance in a high detuning frequency band of 100 kHz or higher. It has been demanded. In the conventional piezoelectric oscillator, the phase noise performance is dominated by the voltage noise of the output voltage generated in the power supply circuit. For the oscillation circuit and buffer circuit that use the output voltage as the power supply, the power supply circuit with low voltage noise is designed. However, in order to amplify it with high sensitivity, there is a problem that 1 / f noise of the phase noise is greatly influenced in the crystal oscillation circuit, and floor noise of the phase noise is greatly influenced in the buffer circuit.

  In order to solve this problem, for example, Patent Document 1 includes a power supply circuit, an inverter oscillation circuit in which the power supply circuit is connected as a power supply, an output of the power supply circuit, and a resistor and a fixed capacitor having a cutoff frequency of about 100 kHz. A crystal oscillator method comprising a buffer circuit connected via a low-pass filter is described. The output noise of the power supply circuit is reduced by 3 dB with respect to the noise floor at the cutoff frequency, for example, 100 kHz, by the low-pass filter, so that the voltage noise can be greatly reduced in the high detuning frequency band (<100 kHz). As a result, the phase noise floor generated at the output terminal of the buffer circuit can be greatly reduced.

Japanese Patent Laying-Open No. 2008-103808 (FIG. 2)

  However, in the conventional method, when the buffer circuit is driven, current is drawn from the power supply circuit to the buffer circuit, so that a voltage drop is caused by the resistor constituting the low-pass filter, and as a result, the output voltage amplitude is sufficiently increased. For example, due to the temperature characteristics of the transistors constituting the buffer circuit, for example, the driving capability increases at high temperatures, the current consumption of the entire oscillator varies greatly with temperature, and the voltage amplitude level of the output OUT also There is a problem that it fluctuates with it.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

[Application Example 1]
A power supply circuit that generates a second power supply voltage based on the first power supply voltage, a piezoelectric vibrator, an oscillation circuit that operates at the second power supply voltage, oscillates the piezoelectric vibrator, and outputs an oscillation signal; a noise filter circuit for outputting a filter voltage obtained by attenuating the noise component of the second power supply voltage, a MOS transistor in which the filter voltage are entered into the gate terminal, the via between the source and the drain of the MOS transistor first 1. A piezoelectric oscillator comprising: a power supply terminal connected to a terminal from which a power supply voltage of 1 is output; and a buffer circuit to which the oscillation signal is input.

  According to this configuration, since the second power supply voltage generated by the power supply circuit can be applied to the buffer circuit via the noise filter circuit, the phase noise of the piezoelectric oscillator can be reduced, and the voltage amplitude of the output signal can be increased sufficiently. can do.

[Application Example 2]
In the oscillator according to the above, the MOS transistors, the oscillator it is a depletion type.

  According to this configuration, since the second power supply voltage generated by the power supply circuit can be applied to the buffer circuit via the noise filter circuit, the phase noise of the piezoelectric oscillator can be reduced, and the depletion type MOS transistor has a gate-source connection. Since the voltage is smaller than that of the enhanced type, the voltage amplitude of the output signal can be sufficiently increased.

1 is a circuit diagram showing a configuration of a piezoelectric oscillator according to a first embodiment. The graph which shows operation | movement of a piezoelectric oscillator.

  Hereinafter, embodiments of a piezoelectric oscillator will be described with reference to the drawings.

(First embodiment)
<Configuration of piezoelectric oscillator>
First, the configuration of the piezoelectric oscillator according to the first embodiment will be described with reference to FIG. FIG. 1 is a circuit diagram showing the configuration of the piezoelectric oscillator according to the first embodiment.

  As shown in FIG. 1, the piezoelectric oscillator 1 includes a power supply circuit 5, a piezoelectric vibrator 10, an oscillation circuit 20, a noise filter circuit 40, a depletion type MOS transistor Mnd1, a buffer circuit 30, a capacitor C3, It is composed of

  The power supply circuit 5 generates a voltage Vreg that is a second power supply voltage from the power supply voltage Vcc that is the first power supply voltage.

  The oscillation circuit 20 includes an inverter 21, a resistor R1, and capacitors C1 and C2. The piezoelectric vibrator 10 and the resistor R1 are connected to the inverter 21 in parallel. The capacitor C1 is connected between the input terminal of the inverter 21 and the ground potential Gnd. The capacitor C2 is connected between the output terminal of the inverter 21 and the ground potential Gnd. The inverter 21 operates at the voltage Vreg. The oscillation circuit 20 oscillates the piezoelectric vibrator 10 and outputs an oscillation signal a.

  The noise filter circuit 40 is configured by a low-pass filter or the like, and generates a filter voltage b from which noise components generated in the power supply circuit 5 included in the voltage Vreg are removed.

  In the depletion type MOS transistor Mnd1, the power supply voltage Vcc is input to the source terminal, the filter voltage b is input to the gate terminal, and the voltage c is output from the drain terminal.

  The buffer circuit 30 operates with the voltage c output from the drain terminal of the depletion type MOS transistor Mnd1, receives the oscillation signal a, and outputs the output signal OUT via the capacitor C3.

<Operation of piezoelectric oscillator>
Next, the operation of the piezoelectric oscillator will be described with reference to FIG. FIG. 2 is a graph showing the operation of the piezoelectric oscillator.

  In FIG. 2, a graph G1 shows the phase modulation noise when the noise filter circuit 40 is not inserted, and a graph G2 shows the phase modulation noise when the noise filter circuit 40 whose cut-off frequency is set to about 1 kHz is inserted. . As shown in FIG. 2, phase modulation noise can be suppressed by inserting a noise filter circuit 40. Since the power supply voltage Vcc can be applied to the buffer circuit 30 without going through the noise filter circuit 40, the voltage amplitude of the output signal OUT can be made sufficiently large.

  According to the present embodiment described above, the following effects can be obtained.

  In the present embodiment, since the voltage Vreg generated by the power supply circuit 5 can be applied to the buffer circuit 30 via the noise filter circuit 40, the phase noise of the piezoelectric oscillator 1 can be reduced, and the depletion type MOS transistor Mnd1 is a gate-source. Since the inter-voltage is smaller than that of the enhanced type, the voltage amplitude of the output signal OUT can be sufficiently increased.

  While the embodiments of the piezoelectric oscillator have been described above, the present invention is not limited to these embodiments, and can be implemented in various forms without departing from the scope of the invention. Hereinafter, a modification will be described.

  (Modification 1) Modification 1 of the piezoelectric oscillator will be described. Although the depletion type MOS transistor Mnd1 is used in the first embodiment, an enhanced type MOS transistor may be used.

  DESCRIPTION OF SYMBOLS 1 ... Piezoelectric oscillator, 5 ... Power supply circuit, 10 ... Piezoelectric vibrator, 20 ... Oscillation circuit, 21 ... Inverter, 30 ... Buffer circuit, 40 ... Noise filter circuit

Claims (2)

A power supply circuit that generates a second power supply voltage based on the first power supply voltage;
A piezoelectric vibrator;
An oscillation circuit that operates with the second power supply voltage and oscillates the piezoelectric vibrator and outputs an oscillation signal;
A noise filter circuit for outputting a filter voltage obtained by attenuating a noise component of the second power supply voltage;
A MOS transistor in which the filter voltage are entered the gate terminal,
A buffer circuit having a power supply terminal connected to a terminal from which the first power supply voltage is output via a source and a drain of the MOS transistor , and to which the oscillation signal is input;
including,
A piezoelectric oscillator characterized by that.   2. The piezoelectric oscillator according to claim 1, wherein the MOS transistor is a depletion type.

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