JP5892770B2 - High frequency semiconductor device - Google Patents

Description

  Embodiments described herein relate generally to a high-frequency semiconductor device.

  A cavity (Cavity) of a high frequency package device has a resonance frequency depending on the cavity width, and a high frequency circuit provided in the cavity is usually used in a frequency band different from the resonance frequency depending on the cavity width. For example, the resonance frequency depending on the cavity width is set higher than the use frequency band of the high frequency circuit.

  By the way, in recent years, high-frequency package devices have increased in output. As the output increases, the number of circuit elements accommodated in the cavity increases, and the cavity width tends to increase. As the cavity width increases, the resonance frequency decreases. As a result, the resonance frequency depending on the cavity width and the operating frequency of the high frequency circuit are close to each other, and the electrical characteristics of the high frequency circuit are deteriorated.

  In the conventional high-frequency semiconductor device, there is an upper limit on the width of the cavity of the package in order to keep the cavity resonance frequency above the operating frequency. There is an upper limit to the size of chips arranged in a limited width. Because of this upper limit, the temperature rises due to the upper limit of output power and the density of chips.

  If the number of electrodes is increased in order to obtain a larger output power, the size (width) of the chip is limited, so that the electrode interval is reduced. When the distance between the electrodes is reduced, the heat generation density increases, and it becomes difficult to dissipate heat, resulting in an increase in the chip temperature.

Japanese Patent Laid-Open No. 10-327031 Japanese Patent No. 4575247 JP 2001-185966 A

  In the conventional high-frequency semiconductor device, the terminals of the package are arranged at the center of the opposing surface, the wiring is spread while distributing from one terminal, the signal is supplied to the semiconductor chip, and the wiring is bundled while being synthesized. Because it is connected to the terminal, the area near both sides of the terminal is not used effectively.

  The present embodiment provides a high-frequency semiconductor device that increases the width in which a semiconductor chip can be mounted and can be used effectively on a mounting substrate.

The high-frequency semiconductor device according to the present embodiment includes a conductor base plate, a semiconductor chip having a multi-cell configuration, a metal wall, and a through hole. A semiconductor chip having a multi-cell configuration is disposed on a conductor base plate. The metal wall is disposed on the conductor base plate and forms a rectangular cavity containing the semiconductor chip. The through hole is provided in the input / output part of the metal wall. Here, in the rectangular cavity surrounded by the metal wall, the semiconductor chip is longer than 0 degree and smaller than 90 degrees in the longitudinal direction of the semiconductor chip from the extending direction of the metal wall where no through hole is provided. Arrange at a predetermined angle. The length in the arrangement direction from one end to the other end of the semiconductor chip arranged on the conductor base plate is longer than at least one side of the cavity along the inner wall of the metal wall.

The typical plane pattern block diagram of the high frequency semiconductor device which concerns on 1st Embodiment. FIG. 2 is a schematic cross-sectional structure diagram taken along line II in FIG. 1. FIG. 2 is a schematic cross-sectional structure diagram taken along line II-II in FIG. 1. FIG. 3 is a schematic sectional view taken along line III-III in FIG. 1. FIG. 4 is a schematic sectional view taken along line IV-IV in FIG. 1. The typical plane pattern block diagram of the high frequency semiconductor device which concerns on a comparative example. It is a typical bird's-eye view of the package which accommodates the high frequency semiconductor device concerning a 1st embodiment, (a) metal cap 10, (b) metal seal ring 10a, (c) metal wall 16, (d) conductor base plate 200, a schematic configuration diagram of strip lines 19a and 19b arranged on the feedthrough lower layer portion 20, the feedthrough upper layer portion 22 and the feedthrough lower layer portion 20. FIG. (A) The enlarged view of the typical plane pattern structure of the semiconductor chip which comprises the high frequency semiconductor device which concerns on 1st Embodiment, (b) The enlarged view of J part of Fig.8 (a). It is a structural example of the semiconductor chip mounted in the high frequency semiconductor device which concerns on 1st Embodiment, Comprising: The typical cross-section figure which follows the VV line of FIG.8 (b). (A) In the high-frequency semiconductor device according to the first embodiment in which the semiconductor chip is arranged substantially on the diagonal line of the rectangular cavity, an arrangement example of the input terminal Pi and the output terminal Po, (b) almost the rectangular cavity. Another arrangement example of an input terminal Pi and an output terminal Po in the high-frequency semiconductor device according to the first embodiment in which semiconductor chips are arranged on a diagonal line. The typical plane pattern block diagram of the high frequency semiconductor device which concerns on 2nd Embodiment. The typical plane pattern block diagram of the high frequency semiconductor device which concerns on the modification 1 of 2nd Embodiment. The typical plane pattern block diagram of the high frequency semiconductor device which concerns on the modification 2 of 2nd Embodiment.

  Next, embodiments will be described with reference to the drawings. In the following, the same elements are denoted by the same reference numerals to avoid duplication of explanation and to simplify the explanation. It should be noted that the drawings are schematic and different from the actual ones. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  The embodiment described below exemplifies an apparatus and a method for embodying the technical idea, and the embodiment does not specify the arrangement of each component as described below. This embodiment can be modified in various ways within the scope of the claims.

[First embodiment]
(High-frequency semiconductor device)
A schematic planar pattern configuration of the high-frequency semiconductor device 1 according to the first embodiment is expressed as shown in FIG. 1, and a schematic cross-sectional structure taken along line II in FIG. 1 is shown in FIG. 1 is represented as shown in FIG. 3, and the schematic sectional structure along the line III-III in FIG. 1 is represented as shown in FIG. A schematic cross-sectional structure taken along the line IV-IV in FIG. 1 is expressed as shown in FIG.

  Further, a schematic bird's-eye view configuration of the package that houses the high-frequency semiconductor device 1 according to the first embodiment is expressed as shown in FIG. 7A shows the metal cap 10, FIG. 7B shows the metal seal ring 10a, FIG. 7C shows the metal wall 16, FIG. 7D shows the conductor base plate 200, the feedthrough lower layer 20, the feed. The schematic configurations of the strip lines 19a and 19b arranged on the through upper layer portion 22 and the feedthrough lower layer portion 20 are respectively shown.

  As shown in FIGS. 1 to 5 and FIG. 7, the high-frequency semiconductor device 1 according to the first embodiment includes a conductor base plate 200 and multi-cell semiconductor chips 24 a and 24 b arranged on the conductor base plate 200. The metal wall 16 is disposed on the conductor base plate 200 and forms a rectangular cavity containing the semiconductor chips 24a and 24b, and the through hole 34 provided in the input / output portion of the metal wall 16. Here, the semiconductor chips 24a and 24b are placed in a rectangular cavity surrounded by the metal wall 16, and the longitudinal direction of the semiconductor chips 24a and 24b is more than 0 degrees from the extending direction of the metal wall where the through hole 34 is not provided. It is arranged at a predetermined angle which is large and smaller than 90 degrees.

  Further, as shown in FIGS. 1 to 5 and 7, the high-frequency semiconductor device 1 according to the first embodiment includes a metal seal ring 10 a disposed on the metal wall 16, and a metal seal ring 10 a. A rectangular cavity is formed by the conductor base plate 200, the metal wall 16 disposed on the conductor base plate 200, and the metal cap 10 disposed on the metal wall 16.

  Further, the high-frequency semiconductor device 1 according to the first embodiment is adjacent to the semiconductor chips 24a and 24b on the conductor base plate 200 surrounded by the metal wall 16, as shown in FIGS. 1 to 5 and FIG. The input circuit board 26 and the output circuit board 28 arranged on the input circuit board 26, the input matching circuits 17a, 17b, the input distribution circuit 17c, the strip line 17d arranged on the input circuit board 26, and the output circuit board 28. Output matching circuits 18a, 18b, output combining circuit 18c, strip line 18d, semiconductor chips 24a, 24b, input matching circuits 17a, 17b, output matching circuits 18a, 18b, and a plurality of input bonding wires 12a, 12b, a plurality Output bonding wires 14a and 14b.

  Here, as shown in FIG. 1, the input bonding wires 12a and 12b and the output bonding wires 14a and 14b have an angle of 90 ° on a plane with respect to the semiconductor chips 24a and 24b.

  Moreover, the high-frequency semiconductor device 1 according to the first embodiment includes a feedthrough lower layer portion that is fitted into the through hole 34 and disposed on the conductor base plate 200 as shown in FIGS. 1 to 5 and 7. 20, a feedthrough upper layer portion 22 fitted into the through hole 34 and disposed on the feedthrough lower layer portion 20, an input strip line 19 a disposed between the feedthrough lower layer portion 20 and the feedthrough upper layer portion 22, and The output strip line 19b includes an input terminal electrode 21a and an output terminal electrode 21b arranged on the input strip line 19a and the output strip line 19b, respectively.

  In the high-frequency semiconductor device 1 according to the first embodiment, as shown in FIG. 1, a plurality of chips of semiconductor chips 24a and 24b are arranged. Here, although an example of a two-chip configuration is shown in FIG. 1, the configuration can be similarly made even if there are three or more chips.

  Further, in the high-frequency semiconductor device 1 according to the first embodiment, as shown in FIG. 1, an example of two synthesized circuit patterns is shown. Is equally applicable.

  In the high-frequency semiconductor device 1 according to the first embodiment, as shown in FIG. 1, the semiconductor chips 24 a and 24 b are arranged substantially parallel to one diagonal line of a rectangular cavity surrounded by the metal wall 16. ing.

  In the high-frequency semiconductor device 1 according to the first embodiment, as shown in FIG. 1, the input circuit board 26 and the output circuit board 28 may be arranged on a line substantially orthogonal to the diagonal line. good.

  In the high-frequency semiconductor device 1 according to the first embodiment, as shown in FIG. 1, the input terminal electrode 21a and the output terminal electrode 21b may be arranged in a direction substantially orthogonal to the diagonal line. good.

  In the high-frequency semiconductor device 1 according to the first embodiment, as shown in FIG. 1, the input circuit board and the output circuit board may have a triangular shape.

  The conductor base plate 200 is made of, for example, a conductive metal such as copper, molybdenum, or copper molybdenum alloy. Furthermore, a plated conductor such as Au, Ni, Ag, Ag—Pt alloy, or Ag—Pd alloy may be formed on the surface of the conductor base plate 200.

  The metal wall 16 is formed of a conductive metal such as Fe—Ni—Co, aluminum, molybdenum, copper molybdenum alloy, for example.

  A solder metal layer (not shown) for soldering is formed on the upper surface of the metal wall 16 via a metal seal ring 10a. The solder metal layer can be formed from, for example, a gold germanium alloy, a gold tin alloy, or the like.

  As shown in FIG. 1, the metal cap 10 has a flat plate shape. The metal cap 10 is formed of a conductive metal such as Fe—Ni—Co, aluminum, molybdenum, or copper molybdenum alloy, for example.

Further, the feedthrough lower layer portion 20 and the feedthrough upper layer portion 22 may be formed of ceramic, for example. As a ceramic material, for example, alumina (Al ₂ O ₃ ), aluminum nitride (AlN), or the like can be used.

  The terminal electrodes 21a and 21b are fixed on the strip lines 19a and 19b by silver brazing or the like.

  On the other hand, a schematic planar pattern configuration of the high-frequency semiconductor device 1a according to the comparative example is expressed as shown in FIG. In the high frequency semiconductor device 1a according to the comparative example, the semiconductor chips 24a and 24b are arranged in parallel to the metal wall 16 in which the longitudinal direction of the semiconductor chips 24a and 24b is arranged with the through holes 34. In the high-frequency semiconductor device 1a according to the comparative example, since the semiconductor chips 24a and 24b are arranged in parallel with the sides in the rectangular cavity, the width in which the semiconductor chips 24a and 24b chips can be arranged is the length of the side of the cavity. Less than or equal to

  In the high-frequency semiconductor device 1 according to the first embodiment, since the semiconductor chips 24a and 24b are arranged to be rotated at a predetermined angle, the conductor base plate in the cavity can be effectively used. For example, when the semiconductor chips 24a and 24b are arranged by being rotated by 45 °, the width in which the semiconductor chips 24a and 24b can be mounted is about 1.4 times that of the comparative example.

  In the high-frequency semiconductor device 1 according to the first embodiment, the input-side feedthrough configuration (20, 19a, 22) and the output-side feedthrough configuration (20, 19b, 22) are as shown in FIG. On the opposite sides of the conductor base plate 200, they are shifted so that the input terminal electrode 21a and the output terminal electrode 21b are also shifted.

(Semiconductor element structure)
An enlarged view of a schematic planar pattern configuration of the semiconductor chip 24 mounted on the high-frequency semiconductor device 1 according to the first embodiment is expressed as shown in FIG. 8A, and a portion J in FIG. An enlarged view of is shown as shown in FIG. 9 is a configuration example of the semiconductor chip 24 mounted on the high-frequency semiconductor device according to the embodiment, and a schematic cross-sectional configuration example along the line VV in FIG. 8B is shown in FIG. Is done.

  In the semiconductor chip 24 mounted on the high-frequency semiconductor device 1 according to the first embodiment, the plurality of FET cells FET1 to FET8 are provided on the semiconductor substrate 110 and the first surface of the semiconductor substrate 110 as shown in FIG. The gate finger electrode 124, the source finger electrode 120, and the drain finger electrode 122 that are arranged and each have a plurality of fingers, and the gate finger electrode 124, the source finger electrode 120, and the drain finger electrode 122 that are arranged on the first surface of the semiconductor substrate 110. A plurality of gate terminal electrodes G1, G2,..., G8, a plurality of source terminal electrodes S1, S2,..., S9 and drain terminal electrodes D1, D2,. Located under the terminal electrodes S1, S2, ..., S9 , SC9 and IA holes SC1, SC2,..., SC9 and the second surface opposite to the first surface of the semiconductor substrate 110, and VIA holes SC1, SC2,. A ground electrode (not shown) connected via SC9.

  The source terminal electrode S1 is formed on the barrier metal layer (not shown) formed on the inner wall of the VIA holes SC1, SC2,..., SC9 and the filling metal layer (not shown) formed on the barrier metal layer and filling the VIA hole. , S2,..., S9 are connected to a ground electrode (not shown).

  A bonding wire 12 is connected to the gate terminal electrodes G1, G2,..., G8, and a bonding wire 14 is connected to the drain terminal electrodes D1, D2,.

  The semiconductor substrate 110 is a GaAs substrate, a SiC substrate, a GaN substrate, a substrate in which a GaN epitaxial layer is formed on the SiC substrate, a substrate in which a heterojunction epitaxial layer made of GaN / AlGaN is formed on the SiC substrate, a sapphire substrate, or a diamond substrate. One of them.

(Example structure)
As shown in FIG. 9, the configuration example of the FET cell of the semiconductor chip 24 mounted on the high-frequency semiconductor device 1 according to the first embodiment includes a semiconductor substrate 110 and a nitride system disposed on the semiconductor substrate 110. The compound semiconductor layer 112, the aluminum gallium nitride layer (Al _x Ga _1-x N) (0.1 ≦ x ≦ 1) 118 disposed on the nitride-based compound semiconductor layer 112, and the aluminum gallium nitride layer (Al _x A source finger electrode (S) 120, a gate finger electrode (G) 124, and a drain finger electrode (D) 122 disposed on Ga _1-x N) (0.1 ≦ x ≦ 1) 118. A two-dimensional electron gas (2DEG) layer is formed at the interface between the nitride-based compound semiconductor layer 112 and the aluminum gallium nitride layer (Al _x Ga _1-x N) (0.1 ≦ x ≦ 1) 118. 116 is formed. In the configuration example shown in FIG. 9, a high electron mobility transistor (HEMT) is shown.

  The source finger electrode 120 and the drain finger electrode 122 are made of, for example, Ti / Al. The gate finger electrode 124 can be formed of, for example, Ni / Au.

  In the semiconductor chip 24 mounted on the high-frequency semiconductor device according to the embodiment, the longitudinal pattern lengths of the gate finger electrode 124, the source finger electrode 120, and the drain finger electrode 122 are microwave / millimeter wave / submillimeter wave. As the operating frequency increases, it is set shorter. For example, in the millimeter wave band, the pattern length is about 25 μm to 50 μm.

  Further, the width of the source finger electrode 120 is, for example, about 40 μm, and the width of the source terminal electrodes S1, S2,..., S9 is, for example, about 100 μm. The formation width of the VIA holes SC1, SC2,..., SC9 is, for example, about 10 μm to 40 μm.

  In the high-frequency semiconductor device 1 according to the first embodiment in which the semiconductor chips 24a and 24b are arranged substantially on the diagonal line of the rectangular cavity, an arrangement example of the input terminal Pi and the output terminal Po is shown in FIG. It is expressed as shown in FIG. In FIG. 10A, the input terminal Pi and the output terminal Po are arranged on opposite sides of the metal wall 16. On the other hand, in FIG. 10B, the input terminal Pi and the output terminal Po are arranged on adjacent sides of the metal wall 16.

  According to the first embodiment, the semiconductor chips 24 a and 24 b are placed in the rectangular cavity surrounded by the metal wall 16, and the longitudinal direction of the semiconductor chips 24 a and 24 b is not provided with the through hole 34. The conductor base plate region in the rectangular cavity surrounded by the metal wall 16 can be effectively used by disposing at a predetermined angle θ that is larger than 0 degree and smaller than 90 degrees from the extending direction of 16.

  According to the first embodiment, in a high-frequency semiconductor device in which a high-frequency circuit used in a high-frequency band such as a microwave or a millimeter wave is accommodated in a cavity, the width on which a semiconductor chip can be mounted is increased, and the mounting substrate is effectively A usable high-frequency semiconductor device can be provided.

[Second Embodiment]
A schematic planar pattern configuration of the high-frequency semiconductor device according to the second embodiment is expressed as shown in FIG. Moreover, the schematic planar pattern configuration of the high-frequency semiconductor device according to Modification 1 and Modification 2 of the second embodiment is expressed as shown in FIGS.

  In the high-frequency semiconductor device 1 according to the second embodiment and the first to second modifications thereof, as shown in FIGS. 11 to 13, the semiconductor chips 24 a and 24 b of a plurality of chips are arranged substantially on a diagonal line of a rectangular cavity. In addition, the output bonding wires 14a and 14b are arranged obliquely at a predetermined angle of 90 ° or less on the plane with respect to the semiconductor chips 24a and 24b. Here, in FIGS. 11 to 13, an example of a two-chip configuration is shown, but three or more chips may be used.

  In the high-frequency semiconductor device 1 according to the second embodiment, as shown in FIG. 11, the longitudinal directions of the semiconductor chips 24a and 24b are arranged so as to be substantially parallel to the two diagonal lines of the metal wall 16, respectively. Yes.

The output bonding wires 14a and 14b have an angle of about + 45 ° on a plane with respect to the semiconductor chips 24a and 24b. The input bonding wires 12a and 12b are disposed so as to be substantially 90 ° on a plane with respect to the semiconductor chips 24a and 24b.

  In the high-frequency semiconductor device 1 according to the first modification of the second embodiment, the semiconductor chips 24 a and 24 b are arranged substantially parallel to the diagonal of the metal wall 16 as shown in FIG. At the same time, the output bonding wires 14a and 14b have an angle of about −45 ° on the plane with respect to the semiconductor chips 24a and 24b. The input bonding wires 12a and 12b are disposed so as to be substantially 90 ° on a plane with respect to the semiconductor chips 24a and 24b.

  In the high-frequency semiconductor device 1 according to the second modification of the second embodiment, the semiconductor chips 24 a and 24 b are arranged substantially parallel to the diagonal of the metal wall 16 as shown in FIG. At the same time, the output bonding wires 14a and 14b have an angle of about + 45 ° on the plane with respect to the semiconductor chips 24a and 24b. The input bonding wires 12a and 12b are disposed so as to be substantially 90 ° on a plane with respect to the semiconductor chips 24a and 24b.

  As shown in FIGS. 11 to 13, the high-frequency semiconductor device 1 according to the second embodiment and its modifications 1 to 2 includes a conductor base plate 200 and a multi-cell having a plurality of chips arranged on the conductor base plate 200. The semiconductor chips 24a and 24b, the semiconductor chips 24a and 24b, and the metal wall 16 disposed on the conductor base plate 200 and the conductor base plate 200 surrounded by the metal wall 16 are adjacent to the semiconductor chips 24a and 24b. The input circuit board 26 and the output circuit board 28 arranged in this manner, the input matching circuits 17a and 17b, the input distribution circuit 17c, the strip line 17d arranged on the input circuit board 26, and the output circuit board 28. Output matching circuits 18a and 18b, output synthesis circuit 18c, stripline 18d, and semiconductor chip 2 And an output bonding wire 14a · 14b of the plurality of input bonding wire 12a · 12b · plurality of connecting a a · 24b and the input matching circuit 17a · 17b and the output matching circuit 18a · 18b. Here, the output bonding wires 14a and 14b have a predetermined angle of 90 ° or less on the plane with respect to the semiconductor chips 24a and 24b. The input bonding wires 12a and 12b are arranged so as to be substantially 90 ° on a plane with respect to the semiconductor chips 24a and 24b. However, like the output bonding wires 14a and 14b, the semiconductor chips 24a and 12b are arranged. You may have a predetermined angle of 90 degrees or less on a plane with respect to 24b. The other configuration is the same as that of the first embodiment, and a duplicate description is omitted.

[Other embodiments]
Although this embodiment has been described, this embodiment is presented as an example and is not intended to limit the scope of the invention. The novel embodiment can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. This embodiment and its modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  Semiconductor chips mounted on the high-frequency semiconductor device according to the embodiment are not limited to FETs and HEMTs, but are LDMOS (Laterally Diffused Metal-Oxide-Semiconductor Field Effect Transistors) and heterojunction bipolar transistors (HBTs). Needless to say, an amplifying element such as a bipolar transistor is also applicable.

  As described above, various embodiments that are not described herein are included.

DESCRIPTION OF SYMBOLS 1 ... High frequency semiconductor device 10 ... Metal cap 10a ... Metal seal ring 11, 12a, 12b, 14a, 14b, 15 ... Bonding wire 16 ... Package outer wall (metal wall)
17a, 17b ... input matching circuit 17c ... input distribution circuit 18a, 18b ... output matching circuit 18c ... output synthesis circuit 17d, 18d, 19a, 19b ... stripline 20 ... feedthrough lower layer 21, 21a, 21b ... terminal electrode 22 ... Feedthrough upper layer portions 24, 24a, 24b ... semiconductor chip 26 ... input circuit board 28 ... output circuit board 34 ... through hole 110 ... semiconductor substrate 112 ... nitride compound semiconductor layer (GaN epitaxial growth layer)
116: Two-dimensional electron gas (2DEG) layer 118: Aluminum gallium nitride layer (Al _x Ga _1-x N) (0.1 ≦ x ≦ 1)
DESCRIPTION OF SYMBOLS 120 ... Source finger electrode 122 ... Drain finger electrode 124 ... Gate finger electrode 200 ... Conductor baseplate G, G1, G2, ..., G8 ... Gate terminal electrode S, S1, S1, ..., S9 ... Source terminal electrode D, D1, D2 , ..., D8 ... Drain terminal electrodes SC1, SC2, ..., SC9 ... VIA holes

Claims (15)

A conductor base plate;
A semiconductor chip having a multi-cell configuration disposed on the conductor base plate;
A metal wall disposed on the conductor base plate and forming a rectangular cavity containing the semiconductor chip;
A through hole provided in the input / output portion of the metal wall, and the semiconductor chip is provided in a rectangular cavity surrounded by the metal wall, the longitudinal direction of the semiconductor chip being provided with the through hole. Arranged at a predetermined angle greater than 0 degrees and less than 90 degrees from the stretching direction of the metal wall not
The length of the arrangement direction from one end to the other end of the semiconductor chip arranged on the conductor base plate is longer than at least one side of the cavity along the inner wall of the metal wall. . An input circuit board and an output circuit board disposed adjacent to the semiconductor chip on the conductor base plate surrounded by the metal wall;
An input matching circuit and an input distribution circuit disposed on the input circuit board;
An output matching circuit and an output synthesis circuit arranged on the output circuit board;
The high-frequency semiconductor device according to claim 1, further comprising: a plurality of input bonding wires and a plurality of output bonding wires that connect the semiconductor chip to the input matching circuit and the output matching circuit. A feedthrough lower layer portion fitted in the through hole and disposed on the conductor base plate;
A feedthrough upper layer part fitted into the through-hole and disposed on the feedthrough lower layer part;
An input stripline and an output stripline disposed between the feedthrough lower layer and the feedthrough upper layer,
The high-frequency semiconductor device according to claim 1, further comprising: an input terminal electrode and an output terminal electrode that are respectively disposed on the input strip line and the output strip line .   The high-frequency semiconductor device according to claim 1, wherein a plurality of the semiconductor chips are arranged.   5. The high-frequency semiconductor device according to claim 1, wherein the semiconductor chip is disposed substantially parallel to a diagonal line of a rectangular cavity surrounded by the metal wall. The semiconductor chip is
A semiconductor substrate;
A gate finger electrode, a source finger electrode and a drain finger electrode, each disposed on the first surface of the semiconductor substrate, each having a plurality of fingers;
A plurality of gate terminal electrodes, a plurality of source terminal electrodes, and a plurality of source terminal electrodes, which are disposed on the first surface of the semiconductor substrate and formed by bundling a plurality of fingers for each of the gate finger electrode, the source finger electrode, and the drain finger electrode. A drain terminal electrode ;
A VIA hole disposed under the source terminal electrode;
The ground electrode disposed on the second surface opposite to the first surface of the semiconductor substrate and connected to the source terminal electrode via the VIA hole. The high-frequency semiconductor device according to any one of the above.   The semiconductor substrate is a GaAs substrate, SiC substrate, GaN substrate, SiC, Si, or sapphire substrate with a GaN epitaxial layer formed thereon, SiC, Si, or sapphire substrate heterojunction epitaxial layer made of GaN / AlGaN. The high-frequency semiconductor device according to claim 6, wherein the high-frequency semiconductor device is a formed substrate or a diamond substrate.   A length in the arrangement direction of a region where the semiconductor chip can be arranged between the input circuit board and the output circuit board is longer than at least one side of the cavity along the inner wall of the metal wall. The high-frequency semiconductor device according to claim 2.   3. The length of each side of the input circuit board and the output circuit board facing the semiconductor chip is longer than at least one side of the cavity along the inner wall of the metal wall. A high-frequency semiconductor device according to 1. A conductor base plate;
A semiconductor chip having a multi-cell configuration disposed on the conductor base plate;
A metal wall disposed on the conductor base plate and forming a rectangular cavity containing the semiconductor chip;
A through hole provided in the input / output part of the metal wall,
The semiconductor chip is placed in a rectangular cavity surrounded by the metal wall, and the longitudinal direction of the semiconductor chip is greater than 0 degree from the extending direction of the metal wall where the through hole is not provided, and more than 90 degrees. The high-frequency semiconductor device is arranged at a small predetermined angle, and is arranged so that the longitudinal direction of the semiconductor chip is substantially parallel to two diagonal lines of the rectangular cavity surrounded by the metal wall, respectively. apparatus. A conductor base plate;
A semiconductor chip having a multi-cell configuration disposed on the conductor base plate;
A metal wall disposed on the conductor base plate and forming a rectangular cavity containing the semiconductor chip;
A through hole provided in the input / output part of the metal wall ;
An input circuit board and an output circuit board disposed adjacent to the semiconductor chip on the conductor base plate surrounded by the metal wall ;
An input matching circuit and an input distribution circuit disposed on the input circuit board;
An output matching circuit and an output synthesis circuit arranged on the output circuit board;
A plurality of input bonding wires and a plurality of output bonding wires for connecting the semiconductor chip to the input matching circuit and the output matching circuit ;
The semiconductor chip is placed in a rectangular cavity surrounded by the metal wall, and the longitudinal direction of the semiconductor chip is greater than 0 degree from the extending direction of the metal wall where the through hole is not provided, and more than 90 degrees. The semiconductor chip is disposed at a small predetermined angle, and the semiconductor chip is disposed substantially parallel to a diagonal line of a rectangular cavity surrounded by the metal wall ,
The high-frequency semiconductor device according to claim 1, wherein the input circuit board and the output circuit board are arranged on a line substantially orthogonal to the diagonal line.   The high-frequency semiconductor device according to claim 11, wherein the input circuit board and the output circuit board have a triangular shape. An input circuit board and an output circuit board disposed adjacent to the semiconductor chip on the conductor base plate surrounded by the metal wall;
An input matching circuit and an input distribution circuit disposed on the input circuit board;
An output matching circuit and an output synthesis circuit arranged on the output circuit board;
The high-frequency semiconductor device according to claim 10 , further comprising: a plurality of input bonding wires and a plurality of output bonding wires that connect the semiconductor chip to the input matching circuit and the output matching circuit. A feedthrough lower layer portion fitted in the through hole and disposed on the conductor base plate;
A feedthrough upper layer part fitted into the through-hole and disposed on the feedthrough lower layer part;
An input stripline and an output stripline disposed between the feedthrough lower layer and the feedthrough upper layer,
14. The high-frequency semiconductor device according to claim 10, further comprising: an input terminal electrode and an output terminal electrode disposed on the input strip line and the output strip line , respectively.   The high-frequency semiconductor device according to claim 10, wherein a plurality of the semiconductor chips are arranged.