JP6722070B2 - DC/DC converter and its control circuit, electronic device - Google Patents

Description

The present invention relates to a DC/DC converter (switching regulator).

Various circuit components having different required power supply voltages are used inside electronic devices. A DC/DC converter is used to supply an appropriate power supply voltage to these circuit components.

International Publication No. 08/133040 Pamphlet

The DC/DC converter has a power transistor as a switching element. Leakage in the power transistor is not preferable because it consumes unnecessary current or causes heat generation.

The present invention has been made in such a situation, and one of the exemplary objects of an aspect thereof is to provide a DC/DC converter capable of detecting a leak current.

One aspect of the present invention relates to a control circuit for a step-up or step-up/down type DC/DC converter. The control circuit includes an input terminal to which an input voltage of the DC/DC converter is supplied, a switching terminal to which one end of the inductor is connected, a first transistor provided between the switching terminal and a ground terminal, a switching terminal and an output terminal. , A pulse modulator that generates a pulse signal so that the output voltage of the DC/DC converter approaches a target voltage, and a driver that drives the first transistor and the second transistor based on the pulse signal. And a leakage state based on the potential of the input terminal and the potential of the detection point on the wiring connecting the first transistor, the second transistor, and the inductor during the period when both the first transistor and the second transistor are off. And a leak detection circuit for detecting.

According to this aspect, the leak of the power transistor can be detected.

The detection point may be provided on the second transistor side or the first transistor side with respect to the branch point of the inductor, the first transistor, and the second transistor.

The leak detection circuit may determine a leak state when the potential difference between the voltage at the input terminal and the detection voltage at the detection point exceeds a predetermined threshold value.

The leak detection circuit may include a voltage comparator and a determination unit that detects a leak state according to the output of the voltage comparator.

The pulse modulator operates in a current discontinuous mode in a light load state, and the leak detection circuit has a leak state in a leak detection section set during a period from when the second transistor is turned off to when the first transistor is turned on. May be detected.

The pulse modulator can switch between a PWM (Pulse Width Modulation) mode and a PFM (Pulse Frequency Modulation) mode, and the leak detection circuit may detect a leak state in the PFM mode.
In the PFM mode, the first transistor is turned on, the second transistor is turned off, a first state φ1, the first transistor is turned off, the second transistor is turned on, a second state φ2, the first transistor and the second transistor are turned off. The third state φ3 is repeated. Therefore, the leak state can be detected by using the third state φ3.

The control circuit may further include a logic circuit that stops switching of the first transistor and the second transistor when a leak state is detected. This can improve the reliability of the circuit.

The logic circuit may stop switching of the first transistor and the second transistor when a leak state is detected for a plurality of consecutive cycles.

The first transistor may be an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and the second transistor may be a P-channel MOSFET.

The control circuit may be integrated on one semiconductor substrate. "Integrated integration" includes the case where all the components of the circuit are formed on the semiconductor substrate and the case where the main components of the circuit are integrated, and some of them are used for adjusting the circuit constants. A resistor or a capacitor may be provided outside the semiconductor substrate. By integrating the circuit on one chip, the circuit area can be reduced and the characteristics of the circuit element can be kept uniform.

Another aspect of the present invention relates to a DC/DC converter. The DC/DC converter may include any of the control circuits described above.

Another aspect of the present invention also relates to a step-up or step-up/down type DC/DC converter. This DC/DC converter includes an inductor that receives an input voltage at one end, a first transistor that is provided between the other end of the inductor and a ground line, and a second transistor that is provided between the other end of the inductor and the output line. A pulse modulator that generates a pulse signal so that the output voltage generated on the output line approaches the target voltage, a driver that drives the first transistor and the second transistor in response to the pulse signal, and the first transistor and the second transistor are both A leak detection circuit that detects a leak state based on an input voltage and a detection voltage at a detection point on a wiring that connects the first transistor and the second transistor during the off period.

Yet another aspect of the present invention relates to an electronic device. The electronic device includes any of the DC/DC converters described above.

It should be noted that any combination of the above constituent elements, and those in which the constituent elements and expressions of the present invention are mutually replaced among methods, devices, systems, etc. are also effective as an aspect of the present invention.

According to an aspect of the present invention, it is possible to detect a leak in a power transistor.

It is a circuit diagram of a DC/DC converter according to an embodiment. FIG. 2 is an operation waveform diagram of the DC/DC converter of FIG. 1 in a normal state. FIG. 3 is an operation waveform diagram of the DC/DC converter of FIG. 1 in a leak state. It is a circuit diagram which shows the structural example of a DC/DC converter. It is a figure which shows an example of the electronic device provided with the DC/DC converter which concerns on embodiment. It is a figure which shows the DC/DC converter which concerns on a 1st modification. It is a circuit diagram of a buck-boost converter.

Hereinafter, the present invention will be described based on preferred embodiments with reference to the drawings. The same or equivalent constituent elements, members, and processes shown in each drawing are denoted by the same reference numerals, and duplicated description will be omitted as appropriate. Further, the embodiments are merely examples and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In the present specification, "the state in which the member A is connected to the member B" means that the members A and B are electrically connected to each other in addition to the case where the members A and B are physically directly connected. It also includes a case where they are indirectly connected through other members that do not substantially affect the general connection state or do not impair the functions and effects exerted by their connection.

Similarly, "the state in which the member C is provided between the member A and the member B" means that the members A and C or the members B and C are directly connected and their electrical It also includes a case where they are indirectly connected through other members that do not substantially affect the general connection state or do not impair the functions and effects achieved by their connection.

FIG. 1 is a circuit diagram of a DC/DC converter 100 according to the embodiment. The DC/DC converter 100 is a boost converter, boosts the input voltage V _IN of the input line 102, and connects the output voltage V _OUT stabilized to a predetermined target voltage to the output line 104. Supply to a load (not shown).

The DC/DC converter 100 includes an output circuit 110 and a control circuit 120. The topology of the output circuit 110 is similar to that of a general synchronous rectification type boost converter, and includes an inductor L1, a first transistor M1, a second transistor M2, an input capacitor C1, and an output capacitor C2. The input voltage V _IN is input to one end of the inductor L1. The first transistor M1 is provided between the other end of the inductor L1 and the ground line 106. The second transistor M2 is provided between the other end of the inductor L1 and the output line 104. The first transistor M1 is also referred to as a switching transistor, and the second transistor M2 is also referred to as a synchronous rectification transistor. In the present embodiment, the first transistor M1 is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and the second transistor M2 is a P-channel MOSFET.

The control circuit 120 controls the first transistor M1 and the second transistor M2. The control circuit 120 includes a pulse modulator 122, a driver 124, a leak detection circuit 126, and a logic circuit 128. The pulse modulator 122 generates the pulse signal S1 so that the output voltage V _OUT generated on the output line 104 approaches the target voltage V _OUT(REF) . The driver 124 drives the first transistor M1 and the second transistor M2 according to the pulse signal S1.

The leak detection circuit 126 detects the first transistor M1 and the second transistor M2 based on the input voltage V _IN and the detection voltage V _S at the detection point 130 during a period in which both the first transistor M1 and the second transistor M2 are off. At least one of the leak states is detected. The detection point 130 is provided on the wiring 132 that connects the first transistor M1, the second transistor M2, and the inductor L1.

The DC/DC converter 100 operates in the discontinuous mode (PFM mode) in the light load state. In the discontinuous mode, the first transistor M1 is turned on and the second transistor M2 is turned off in a first state φ1, the first transistor M1 is turned off, and the second transistor M2 is turned on in a second state φ2, the first transistor M1 and The third state φ3 in which the second transistor M2 is turned off is repeated. Therefore, the leak detection circuit 126 may provide a leak detection section τ _DET between the third states φ3 and detect the leak state based on the two voltages V _IN and V _S in the leak detection section τ _DET .

Preferably, the detection point 130 is provided closer to the second transistor M2 than the branch point 134 of the first transistor M1, the second transistor M2, and the inductor L1.

For example, the leak detection circuit 126 may determine a leak state and assert the leak detection signal S2 when the potential difference ΔV between the input voltage V _IN and the detection voltage V _S exceeds a predetermined threshold V _TH .

When the leak detection signal S2 is asserted, the logic circuit 128 stops switching of the first transistor M1 and the second transistor M2 for circuit protection.

The above is the configuration of the DC/DC converter 100. Next, the operation will be described with reference to FIGS. FIG. 2 is an operation waveform diagram of the DC/DC converter 100 of FIG. 1 in a normal state. Here, operation in discontinuous mode is shown.

The vertical axis and the horizontal axis of the waveform charts and time charts referred to in this specification are appropriately enlarged and reduced for easy understanding, and the waveforms shown are also simplified for easy understanding. Or exaggerated or emphasized.

As described above, in the light load state, the DC/DC converter 100 operates in the discontinuous mode and repeats the first state φ1 to the third state φ3. The dead time DT is inserted between the first state φ1 and the second state φ2. In the first state φ1, the coil current I _COIL increases. In the second state φ2, the second transistor M2 is turned on, and the coil current I _COIL decreases. When the coil current I _COIL becomes zero, the backflow current detection signal S3 is asserted, and the state transits to the third state φ3. Then, when the output voltage V _OUT drops to a predetermined voltage, the state returns to the first state φ1.

A leak detection section τ _DET is provided during the third state φ3. The detection section instruction signal S4 is a control signal indicating the leak detection section τ _DET . In a normal state in which the leakage of the first transistor M1 and the second transistor M2 can be ignored, the current I _COIL flowing through the inductor L1 is zero, so that the potential difference between both ends of the inductor L1 is zero, and the wiring 132 has the same potential. Can be considered Therefore, since V _IN =V _S, that is, ΔV=0<V _TH , the leak detection signal S2 becomes low level.

FIG. 3 is an operation waveform diagram of the DC/DC converter 100 of FIG. 1 in a leak state. When the second transistor M2 or the first transistor M1 leaks, the leak current I _LEAK flows through the inductor L, and the coil current I _COIL does not become zero even in the third state φ3. The leak current I _LEAK causes a voltage drop ΔV in the inductor L1 and the wiring 132, and the detection voltage V _S at the detection point 130 becomes V _IN −ΔV. When this voltage drop ΔV exceeds the threshold value V _TH , the leak detection signal S2 is asserted (high level), and the leak state is detected.

For example, if the wiring resistance is 200 mΩ and the leak current I _LEAK is 25 mA, the voltage drop ΔV is 5 mV, and thus the leak detection circuit 126 can be configured using a voltage comparator. When it is desired to detect the leakage current I _LEAK of _2.5 mA, the voltage drop ΔV is 0.5 mV, so a more accurate voltage comparator is required. Alternatively, an amplifier that amplifies the voltage drop ΔV may be added, and the amplified voltage drop may be compared with a threshold value.

In order to make the wiring resistance as large as possible, it is desirable that the detection point 130 be as close as possible to the drain of the second transistor M2.

The above is the operation of the DC/DC converter 100. According to this DC/DC converter 100, the leak of the power transistor can be detected, and appropriate measures can be taken as necessary. Since the parasitic series resistance of the inductor L1 and the parasitic resistance of the wiring 132 are used to detect the leak state, the increase in the number of circuit elements is also minimal.

The present invention extends to various devices and circuits understood as the block diagram and circuit diagram of FIG. 1 or derived from the above description, and is not limited to a specific configuration. Hereinafter, more specific configuration examples and examples will be described in order to help understanding of the essence of the invention and circuit operation and to clarify them, not to narrow the scope of the invention.

FIG. 4 is a circuit diagram showing a configuration example of the DC/DC converter 100. The DC/DC converter 100 is mounted on the electronic device 300. The electronic device 300 includes a DC/DC converter 100, a DC power supply 302, and a load 304. The DC power source 302 is a dry battery or a rechargeable battery, and supplies a DC input voltage V _IN to the DC/DC converter 100 via the input line 102. A load 304 is connected to the output line 104 of the DC/DC converter 100.

In this DC/DC converter 100, the main part of the control circuit 120 of FIG. 1 and the first transistor M1 and the second transistor M2 are integrated in a control IC (Integrated Circuit) 200. The input (VIN) pin of the control IC 200 is supplied with the input voltage V _IN as a power supply voltage. Pins are also called terminals. The output capacitor (C2) and the output line 104 are connected to the output (OUT) pin. The inductor L1 is connected to the switching (SW) pin. The source of the first transistor M1 is connected to the power ground (PGND) pin, and the drain is connected to the SW pin. The source of the second transistor M2 is connected to the OUT pin, and the drain is connected to the SW pin.

An LDO (Low Drop Output) 250, which is an internal power supply (regulator), stabilizes the input voltage V _IN and generates an internal voltage V _REG . The output of the LDO may be connected to an external smoothing capacitor via the internal LDO pin. The voltage comparator 252 is a UVLO (Under Voltage Lock Out) circuit, which enables the system to start when the input voltage V _IN exceeds a specified voltage, and resets the system when a lower voltage state lower than that is detected. The voltage comparator 252 may be a comparator for overvoltage detection.

The output voltage V _OUT of the DC/DC converter 100 is input to the feedback (FB) pin of the control IC 200 via the feedback line 108. The resistors R11 and R12 divide the output voltage V _OUT to generate the feedback voltage V _FB . The resistors R11 and R12 may be external parts. The error amplifier 202 amplifies an error between the feedback voltage V _FB and its target voltage V _REF and generates an error signal V _ERR .

An enable signal is input to the enable (EN) pin from an external host processor such as a microcomputer. The inverter type input buffer 254 determines whether the enable signal is high or low, and generates an ENB signal which is an inverted signal of the enable signal. The control logic 204 starts its operation when the EN signal becomes high level and the ENB signal becomes low level. The discharge circuit 256 is connected to the OUT pin. The discharge circuit 256 enters an operating state when the EN signal becomes low level and the ENB signal becomes high level, discharges the electric charge of the output capacitor C2 through the OUT pin, and lowers the output voltage V _OUT .

The control logic 204 includes a pulse modulator 205 corresponding to the pulse modulator 122 of FIG. 1 and generates pulse signals S11 and S12 based on the feedback voltage V _FB . The pulse modulator 205 may generate the pulse signals S11 and S12 in synchronization with the periodic signal S7 generated by the oscillator 212. The pulse signals S11 and S12 respectively indicate the ON and OFF states of the first transistor M1 and the second transistor M2. The level shifter 206 converts the pulse signals S11 and S12 into appropriate voltage levels, and the driver 208 drives the first transistor M1 and the second transistor M2 according to the pulse signals S21 and S22 after the level conversion. The backflow detection circuit 210 detects the backflow of the coil current I _COIL of the inductor L1 in the light load state, and generates the backflow current detection signal S3. For example, the reverse current detection circuit 210 may include a comparator that compares the drain voltage of the first transistor M1 with a negative threshold voltage.

The leak detection circuit 220 includes a voltage comparator 222 that compares the input voltage V _IN with the detection voltage V _S at the detection point 130, and a determination unit 224. For example, a comparator with an offset corresponding to the threshold voltage may be used to compare the input voltage V _IN with the detection voltage V _S. The determination unit 224 is configured as a part of the leak detection circuit 220, and when the output signal S5 of the voltage comparator 222 becomes a high level in the third state φ3 in which both the first transistor M1 and the second transistor M2 are off, the determination unit 224 leaks. Assert the detection signal S2.

The leak detection circuit 220 may stop the switching of the first transistor M1 and the second transistor M2 by asserting the leak detection signal S2 when the leak state is detected for a plurality of consecutive cycles. This can prevent the switching from being stopped when the leak state is erroneously detected due to the influence of noise.

The OVP (overvoltage protection) circuit 260 monitors the output voltage V _OUT and detects an overvoltage condition. A TSD (thermal shutdown) circuit 262 detects an overheated state of the control IC 200. The control logic 204 takes appropriate protective measures, such as stopping switching, when an overvoltage condition or an overheat condition is detected.

According to the control IC 200 of FIG. 4, a self-diagnosis function of leakage of the first transistor M1 and the second transistor M2 is provided.

(Use)
FIG. 5 is a diagram showing an example of an electronic device 700 including the DC/DC converter 100 according to the embodiment. The electronic device 700 is a device including a dry battery such as an IC recorder, a remote controller, a wireless mouse, and a portable audio player. A dry battery 704 is housed inside the housing 702. The DC/DC converter 100 receives the voltage of the dry battery as the input voltage V _IN and supplies it to the load circuit 706. The load circuit 706 is a circuit that requires a voltage higher than the voltage of the dry battery, and varies depending on the type of the electronic device 700.

In addition, the electronic device may be a device equipped with a rechargeable battery such as a mobile phone terminal, a digital camera, a digital video camera, a tablet terminal, or a portable audio player.

The present invention has been described above based on the embodiment. This embodiment is merely an example, and it will be understood by those skilled in the art that various modifications can be made to the combinations of the respective constituent elements and the respective processing processes, and that such modifications are also within the scope of the present invention. is there. Hereinafter, such modified examples will be described.

(First modification)
Consider the detection point 130. FIG. 6 is a diagram showing a DC/DC converter 100 according to the first modification. The resistance component of the inductor L1 is R31, the resistance component between the inductor L1 and the branch point 134 is R32, and the resistance component between the branch point 134 and the detection point 130 is R33. When the leak currents of the first transistor M1 and the second transistor M2 are I _LEAK1 and I _LEAK2 , respectively, the detection voltage V _{S at the} detection point 130 is given by the equation (1).
V _S =V _IN −ΔV
ΔV=(R31+R32)×(I _LEAK1 +I _LEAK2 )+R33×I _LEAK2 (1)
That is, it can be said that the leak current I _LEAK2 of the second transistor M2 has relatively higher detection sensitivity than the leak current I _LEAK1 .

On the other hand, the detection point 131 may be located closer to the first transistor M1 side than the branch point 134. When the resistance component between the branch point 134 and the detection point 131 is R34, the detection voltage V _S ′ at the detection point 131 is given by the equation (2).
_{V S '=} V _IN -ΔV'
ΔV′=(R31+R32)×(I _LEAK1 +I _LEAK2 )+R34×I _LEAK1 (2)
In this case, the leakage current _{I leak1} of the first transistor M1, a relatively high detection sensitivity can be obtained than the leakage current _{I LEAK2.}

(Second modified example)
In the embodiments, the boost converter is taken as an example, but the present invention is also applicable to a buck-boost converter. FIG. 7 is a circuit diagram of the buck-boost converter 160. The step-up/step-down converter 160 can be understood as a configuration in which a third transistor M3 and a fourth transistor M4 are added in addition to the step-up DC/DC converter 100. When operating in the boost mode, the third transistor M3 is fixed on and the fourth transistor M4 is fixed off, and the equivalent circuit diagram at that time is the same as that of FIG. Therefore, the leak detection circuit 126 can detect the leak of the first transistor M1 and the second transistor M2.

When operating in the step-down mode, the second transistor M2 is fixed on, the first transistor M1 is fixed off, and the third transistor M3 and the fourth transistor M4 are switched.

In the step-down mode, when operating in the discontinuous current mode, there is a section in which both the transistors M3 and M4 are off. At this time, if a leak occurs in the third transistor M3, a leak current I _LEAK3 flows through the transistor M3 and the inductor L1, and the potential difference between the output voltage V _S and the input voltage V _IN becomes large. Therefore, the leakage of the power transistor in the step-down mode can be detected by monitoring the voltage V _S at the detection point 130.

(Third modification)
The present invention can be applied to a diode rectification type converter instead of a synchronous rectification type converter.

(Fourth modification)
In the embodiment, the leak state is detected during the switching operation of the DC/DC converter 100 and the first transistor M1 and the second transistor M2 are off, but the present invention is not limited thereto. While the DC/DC converter 100 is stopped, the leak state may be detected in a section in which the first transistor M1 and the second transistor M2 are off.

(Fifth Modification)
In the embodiment, the control circuit 120 or the control IC 200 stops switching of the first transistor M1 and the second transistor M2 when a leak is detected, but the present invention is not limited to this. For example, the control circuit 120 or the control IC 200 may notify the host processor of the occurrence of the leak, and entrust the processing to the host processor.

Although the present invention has been described based on the embodiments using specific terms, the embodiments merely show the principle and application of the present invention, and the embodiments define the scope of claims. Many modifications and changes in arrangement are possible without departing from the concept of the present invention.

100... DC/DC converter, 102... Input line, 104... Output line, 106... Ground line, 110... Output circuit, 120... Control circuit, 122... Pulse modulator, 124... Driver, 126... Leak detection circuit, 128... Logic circuit, 130... Detection point, 132... Wiring, 200... Control IC, 202... Error amplifier, 204... Control logic, 206... Level shifter, 208... Driver, 210... Reverse current detection circuit, 212... Oscillator, 220... Leak detection circuit 222... Voltage comparator, 224... Judgment part, 250... LDO, 252... Voltage comparator, 254... Input buffer, 256... Discharge circuit, 260... OVP circuit, 262... TSD circuit, L1... Inductor, C1... Input capacitor, C2 ... output capacitor, M1... first transistor, M2... second transistor, SW... switching terminal, GND... ground terminal, OUT... output terminal, S1... pulse signal, S2... leak detection signal, S3... backflow current detection signal, S4 ... detection section instruction signal, 700 ... electronic device, 702 ... housing, 704 ... battery, 706 ... microprocessor.

Claims (16)

A control circuit of a step-up or step-up/down type DC/DC converter,
An input terminal to which an input voltage of the DC/DC converter is supplied;
A switching terminal to which one end of the inductor is connected,
A first transistor provided between the switching terminal and the ground terminal,
A second transistor provided between the switching terminal and the output terminal;
A pulse modulator that generates a pulse signal so that the output voltage of the DC/DC converter approaches a target voltage;
A driver that drives the first transistor and the second transistor based on the pulse signal;
Based on the potential of the input terminal and the potential of the detection point on the wiring connecting the first transistor, the second transistor, and the inductor during a period in which both the first transistor and the second transistor are off. , A leak detection circuit for detecting a leak state,
A control circuit comprising: The control according to claim 1, wherein the detection point is provided on the second transistor side or the first transistor side with respect to a branch point of the first transistor, the second transistor, and the inductor. circuit. The control according to claim 1 or 2, wherein the leak detection circuit determines the leak state when the potential difference between the voltage at the input terminal and the detection voltage at the detection point exceeds a predetermined threshold value. circuit. The leak detection circuit is
A voltage comparator,
According to the output of the voltage comparator, a determination unit that detects the leak state,
The control circuit according to any one of claims 1 to 3, further comprising: The pulse modulator operates in a current discontinuous mode in a light load state, and the leak detection circuit sets a leak detection set during a period from when the second transistor is turned off to when the first transistor is turned on. The control circuit according to claim 1, wherein a leak state is detected in the section. The pulse modulator can switch between a PWM (Pulse Width Modulation) mode and a PFM (Pulse Frequency Modulation) mode,
The control circuit according to claim 1, wherein the leak detection circuit detects a leak state in the PFM mode. 7. The control circuit according to claim 1, further comprising a logic circuit that stops switching of the first transistor and the second transistor when the leak state is detected. 8. The control circuit according to claim 7, wherein the logic circuit stops switching of the first transistor and the second transistor when the leak state is detected continuously for a plurality of cycles. 9. The control circuit according to claim 1, wherein the first transistor is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and the second transistor is a P-channel MOSFET. 10. The control circuit according to claim 1, wherein the control circuit is integrally integrated on one semiconductor substrate. A DC/DC converter comprising the control circuit according to claim 1. A step-up or step-up/down DC/DC converter,
An inductor that receives the input voltage at one end,
A first transistor provided between the other end of the inductor and a ground line,
A second transistor provided between the other end of the inductor and the output line;
A pulse modulator that generates a pulse signal so that the output voltage generated on the output line approaches a target voltage;
A driver that drives the first transistor and the second transistor according to the pulse signal;
Based on a detection voltage at a detection point on a wiring connecting the input voltage and the first transistor, the second transistor, and the inductor during a period in which both the first transistor and the second transistor are off. , A leak detection circuit for detecting a leak state,
A DC/DC converter comprising: The DC/DC converter according to claim 12, wherein the detection point is provided closer to the second transistor than a branch point to the inductor on the wiring. The DC/DC converter according to claim 12 or 13, wherein the leak detection circuit determines the leak state when a potential difference between the input voltage and the detection voltage exceeds a predetermined threshold value. The leak detection circuit is
A voltage comparator,
According to the output of the voltage comparator, a determination unit that detects the leak state,
The DC/DC converter according to claim 12, further comprising: An electronic device comprising the DC/DC converter according to claim 11.

Images