JP6984138B2 - Server device, server control method, program, server system - Google Patents

Description

The present invention relates to a server device, a server control method, a program, and a server system, and more particularly to a server device having an HW (hardware) accelerator, a server control method, a program, and a server system.

In order to improve the performance, a server device having an HW accelerator and performing processing in cooperation with the HW accelerator is known. As the HW accelerator, for example, there is an FPGA (field-programmable gate array). FPGA is superior in performance to, for example, GPU (Graphics Processing Unit) and can suppress power consumption. In addition, FPGA can also have an external communication function, and is excellent in flexibility of use among HW accelerators.

As a system using such an FPGA, for example, Patent Document 1 is known. Patent Document 1 describes a data center that provides a service such as shared access to one or more FPGAs to a user. Specifically, the data center attaches the management payload to the design package received from the user and creates a user key that matches the management payload. The data sensor then provides selective access using the user key.

Japanese Patent Publication No. 2015-507234

When the system is configured by a plurality of servers equipped with FPGA, the function of accelerating by FPGA is fixed for each server. Therefore, there is a problem that the utilization efficiency does not improve because the number of available users is limited or the number of servers becomes excessive depending on the function and the time zone requested by the user.

Further, the technique described in Patent Document 1 will reconstruct the entire FPGA according to the received design package. Therefore, it is necessary to develop a design package for constituting the entire FPGA, and there is a risk that the scale for developing the design pack will increase. Further, in the case of the technique described in Patent Document 1, it is necessary for the user to create a design package. Therefore, it is possible that the burden on the user will increase. From the above, it was difficult to solve the above problem even if the technique of Patent Document 1 was used.

As described above, there has been a problem that it is difficult to improve the utilization efficiency of a server system having a server equipped with FPGA.

Therefore, an object of the present invention is to provide a server device, a server control method, a program, and a server system that solves the problem that it is difficult to improve the utilization efficiency of a server system having a server equipped with an FPGA.

The server device, which is one embodiment of the present invention, is used to achieve such an object.
A server device with a programmable circuit
The server device includes a core unit set according to a function implemented by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. ,
When the server device receives a function package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received function package. The configuration is to write to the core part.

Further, the server control method, which is another embodiment of the present invention, is
A server control method executed by a server device equipped with a programmable circuit.
The server device includes a core unit set according to a function implemented by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. ,
When the server device receives a function package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received function package. The configuration is to write to the core part.

In addition, the program which is another embodiment of the present invention
For server devices with programmable circuits
A core unit set according to the function performed by the programmable circuit and a common unit in which a function common to each function implemented by the programmable circuit is preset are realized.
When the server device receives a functional package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received functional package. It is a program to realize the process of writing to the core part.

Further, the server system, which is another embodiment of the present invention, is
A server system having a control device and a server device having a programmable circuit.
The control device includes a plurality of functional packages created in advance according to the functions performed by the programmable circuit, and a management unit that transmits the functional packages to the server device in response to an inquiry from a user. death,
The server device includes a core unit set according to a function implemented by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. ,
When the server device receives a function package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received function package. The configuration is to write to the core part.

The present invention provides a server device, a server control method, a program, and a server system that solves the problem that it is difficult to improve the utilization efficiency of a server system having a server equipped with FPGA by being configured as described above. It becomes possible to do.

It is a figure which shows an example of the whole structure of the system which concerns on 1st Embodiment of this invention. It is a figure which shows an example of the functional package stored in a storage device. It is a figure which shows a specific example of the processing performed by a system. It is a flowchart which shows an example of the processing of the FPGA accelerator control system and the server apparatus which concerns on 1st Embodiment of this invention. It is a schematic block diagram which shows an example of the structure of the server apparatus which concerns on 2nd Embodiment of this invention. It is a schematic block diagram which shows an example of the structure of the server system which concerns on 2nd Embodiment of this invention.

[First Embodiment]
The first embodiment of the present invention will be described with reference to FIGS. 1 to 4. FIG. 1 is a diagram showing an example of the overall configuration of the system according to the first embodiment of the present invention. FIG. 2 is a diagram showing an example of a functional package 121 stored in the storage device 12. FIG. 3 is a diagram showing a specific example of processing. FIG. 4 is a flowchart showing an example of processing of the FPGA accelerator control system 10 and the server device 20.

In the first embodiment, a server system 1 including a plurality of server devices 20 having an FPGA (field-programmable gate array) 22 which is a programmable circuit will be described. The server system 1 in the present embodiment responds to various functions implemented by the FPGA 22 (for example, an analysis function for a large amount of data such as big data, an image analysis function such as face recognition and human behavior, etc. Functions other than those illustrated may be used). It has a plurality of functional packages 121. As will be described later, the server system 1 downloads the requested functional package 121 to the server device 20 in response to a request from the user. Further, the server device 20 expands the downloaded functional package 121 and writes the FPGA core included in the functional package 121 to the FPGA core unit 211. In the present embodiment, for example, the FPGA 22 suitable for the requested function is constructed in this way.

Referring to FIG. 1, the function execution system described in this embodiment includes, for example, a server system 1 and a user device 4. The server system 1 and the user device 4 are connected so as to be able to communicate with each other via a network 5 such as the Internet.

The server system 1 is, for example, a data center that manages a plurality of server devices 20. The server system 1 includes an FPGA accelerator control system 10 and a plurality of server devices 20. The FPGA accelerator control system 10 and the server device 20 are connected so as to be able to communicate with each other via, for example, a LAN (Local Area Network) 30.

In this embodiment, the number of server devices 20 included in the server system 1 is not particularly limited. The server system 1 may be composed of, for example, one or two server devices 20, or may be composed of any number of server devices 20 of three or more.

The FPGA accelerator control system 10 is an information processing device such as a server device. The FPGA accelerator control system 10 downloads the functional package 121 stored in the storage device 12 owned by the FPGA accelerator control system 10 to the server device 20 in response to a request from the user. Further, when the construction of the server device 20 in response to the request from the user is completed, the FPGA accelerator control system 10 notifies the user device 4 that the preparation is completed and the login information of the server device 20 that has been prepared.

Referring to FIG. 1, the FPGA accelerator control system 10 has a management manager 11 and a storage device 12. Further, the storage device 12 stores a plurality of types of functional packages 121.

The FPGA accelerator control system 10 has, for example, a storage device (not shown) and an arithmetic unit (not shown). The FPGA accelerator control system 10 realizes the management manager 11 by, for example, executing a program stored in a storage device (not shown) by an arithmetic unit (not shown).

The management manager 11 performs processing in response to the request from the user device 4, and also transmits to the user device 4 that the preparation in response to the request has been completed and the login information of the server device 20. Further, the management manager 11 can be configured to manage the usage status of the server device 20 by the user device 4.

For example, the management manager 11 receives a request from a user. Then, the management manager 11 outputs a list of the functional packages 121 stored in the storage device 12 to the user device 4 in response to the received request. Further, the management manager 11 downloads the functional package 121 selected by the user from the output list to the server device 20. At this time, the management manager 11 downloads the function package 121 to, for example, the server device 20 of the server device 20 that is not used by the user device 4. In the present embodiment, the method of determining the server device 20 to download the functional package 121 by the management manager 11 is not particularly limited. The management manager 11 may be configured to determine the download destination server device 20 using various known methods.

Further, the management manager 11 deploys the functional package 121 downloaded to the server device 20 on the server device 20. Then, the management manager 11 installs the deployed OS (Operating System), FPGA common platform driver, and the like. If the functional package 121 is an OS image, it is sufficient to expand the functional package 121.

Further, when the preparation of the server device 20 is completed, the management manager 11 receives a notification of the completion of preparation from the server device 20. Then, the management manager 11 notifies the user device 4 that the preparation is completed. Further, the management manager 11 notifies the user device 4 of the login information to the server device 20 prepared in response to the request from the user.

In this way, the management manager 11 executes overall control / management such as control based on a request from the user and management of the server device 20.

The storage device 12 is a storage device such as a memory or a hard disk. A plurality of types of functional packages 121 are stored in the storage device 12.

The function package 121 is information provided in advance for each function to be accelerated by the FPGA 22. Specific examples of the functional package 121 include, for example, a package corresponding to a data analysis function such as big data, a package corresponding to an image analysis function, and the like. Referring to FIG. 2, the functional package 121 includes, for example, an OS, an FPGA common board driver, an application, an FPGA core, and the like. For example, the first line of FIG. 2 shows that the functional package 121-A includes an OS, an FPGA common board driver, an application A, and an FPGA core A.

The OS in FIG. 2 is software that manages and controls the server device 20. The OS may be set according to the function performed by the FPGA 22 realized by the function package 121, or the OS common to each function package 121 may be set. In other words, the OS in FIG. 2 may be an OS having a function specialized for the function realized by the function package 12. The FPGA common board driver in FIG. 2 controls the FPGA common board 21. The FPGA common board driver is, for example, common to each function. The application in FIG. 2 has a function corresponding to the function executed by the FPGA 22 realized by the function package 121, and performs an I / F (interface) with the user and the execution of the function. The application may include, for example, an application having a data analysis function, an application having an image analysis function, and the like. The application may be composed of only one application or may be composed of a plurality of applications. The FPGA core in FIG. 2 is composed of information necessary for configuring the FPGA common board 21 for the functions realized by the functional package 121. As will be described later, the FPGA core will be written to the FPGA core unit 211 by the FPGA common unit 212.

The functional package 121 may be provided as an OS image. Further, in the present embodiment, the number of functional packages 121 stored in the storage device 12 is not particularly limited. One or two functional packages 121 may be stored in the storage device 12, or three or more functional packages 121 may be stored (two or more plurality of functional packages 121 are stored). It is desirable that it is done).

The server device 20 performs various processes assigned to itself in cooperation with the FPGA 22 which is an HW (hardware) accelerator. Referring to FIG. 1, the server device 20 has an FPGA common board 21 and an FPGA 22.

The server device 20 has, for example, a storage device (not shown) and an arithmetic unit (not shown). The server device 20 realizes the FPGA common board 21 by, for example, executing a program stored in a storage device (not shown) by an arithmetic unit (not shown). The FPGA common board 21 may be realized by a logic circuit or the like.

The FPGA common board 21 is used when configuring (setting) the FPGA 22 for each function. The FPGA common board 21 has an FPGA core unit 211 for writing the FPGA core included in the function package 121, which is specialized for each function, and an FPGA common unit 212 having a function common to each function.

The FPGA core included in the functional package 121 is written in the FPGA core unit 211 by the FPGA common unit 212. By writing the FPGA core to the FPGA core unit 211, the FPGA 22 has the function to be implemented by the functional package 121.

The FPGA common unit 212 is common to all functions, such as a configuration function for the FPGA core unit 211, various controller functions, and a function for monitoring the FPGA common board 21 and FPGA 22, regardless of the functions to be implemented by the function package 121. It has a function. The FPGA common unit 212 has a configuration function of the FPGA core unit 211 such as a write function to the FPGA core unit 211, for example. Further, the FPGA common unit 212 can have functions such as a memory controller, a PCIe (PCI-Express) controller, and a DMA (Direct Memory Access) engine. The FPGA common unit 212 is a RAS (Remote) such as a temperature monitoring function of the FPGA common board 21, a DMA monitoring function (abnormality detection function such as a memory error), a life-and-death monitoring function for applications by WDT (watchdog timer), and a voltage monitoring function. It can also have Access Service) functions. The FPGA common unit 212 may have a performance information collection function, a CPLD (Complex Programmable Logic Device) update function (not shown) included in the server device 20, a power and fan control function, an encryption function, and the like. The FPGA common unit 212 may have some of the functions illustrated above, or may have a function not illustrated above.

The FPGA 22 is a programmable circuit (gate array). The FPGA 22 performs a function according to the FPGA core written in the FPGA core unit 211.

The functional package 121 in response to the request from the user device 4 is downloaded and expanded to the server device 20 having such a configuration. Hereinafter, an example after the functional package 121 is downloaded to the server device 20 will be described with reference to FIG.

For example, in the case shown in FIG. 3, the case where the functional package 121-A shown in FIG. 2 is downloaded to the server device 20 is shown. In this case, the functional package 121-A is downloaded to the server device 20, and the OS-A, the FPGA common board driver, the application A, and the FPGA core A are deployed. Then, the server device 20 installs the expanded OS-A, FPGA common board driver, and the like. Further, the FPGA common board driver installed in the server device 20 initializes the FPGA common board 21.

Further, when various installations and initializations are completed, the application A is started. Then, the application A instructs the FPGA common board driver to write the FPGA core A to the FPGA common board 21. The FPGA common board driver instructed to write instructs the FPGA common unit 212 to write the FPGA core A to the FPGA core unit 211. As a result, the FPGA core A is written to the FPGA core unit 211 by the FPGA common unit 212. When the writing of the FPGA core A is completed, the FPGA common unit 212 notifies the application A that the writing is completed via the FPGA common board driver. After that, the application A notifies the management manager 11 of the completion of preparation. This completes the construction of the FPGA 22 suitable for the function requested by the user device 4. After that, according to the instruction from the user device 4 or the like, the application A performs a predetermined process in cooperation with the FPGA 22 or the like.

The user device 4 is an information processing device such as a personal computer, a smartphone, or a tablet that uses the server system 1. The user device 4 requests the server system 1 (FPGA accelerator control system 10) for the function to be used. The request for the function to be used is made, for example, by selecting from the list of the function packages 121 transmitted from the FPGA accelerator control system 10. Further, the user apparatus 4 receives a notification from the FPGA accelerator control system 10 of the server system 1 that the preparation is completed and login information to the server apparatus 20. As a result, the user device 4 can use the requested function built in the server device 20 by using the received login information.

The above is an example of the configuration of the system having the server system 1 in the first embodiment. Subsequently, with reference to FIG. 4, an example of the processing performed by the FPGA accelerator control system 10 and the server device 20 will be described.

Referring to FIG. 4, the user apparatus 4 accesses the management manager 11 of the FPGA accelerator control system 10 through the network 5. The management manager 11 displays a list of functional packages 121 stored in the storage device 12. The user device 4 selects a function (functional package 121) to be used from the displayed list of functional packages 121.

The management manager 11 downloads the functional package 121 selected by the user apparatus 4 to the server apparatus 20 (step S101).

When the management manager 11 completes the download of the functional package 121 to the server device 20, the management manager 11 expands the functional package 121 on the server device 20. Then, the management manager 11 installs the deployed OS, the FPGA common board driver, and the like on the server device 20 (step S102). If the functional package 121 is an OS image, it only needs to be expanded.

The FPGA common board driver installed in the server device 20 initializes the FPGA common board 21 (step S201).

When the various installations performed in step S102 and the initialization performed in step S201 are completed, the application included in the expanded function package 121 is started (step S202).

The application instructs the FPGA common board driver to write the FPGA core included in the expanded functional package 121 to the FPGA common board 21. The FPGA common board driver instructed to write instructs the FPGA common unit 212 to write the FPGA core to the FPGA core unit 211. As a result, the FPGA common unit 212 writes the FPGA core to the FPGA core unit 211 (step S203).

When the writing of the FPGA core is completed, the FPGA common unit 212 notifies the application that the writing is completed via the FPGA common board driver. Then, the application notifies the management manager 11 of the completion of preparation (step S204). This completes the construction of the FPGA 22 suitable for the function requested by the user device 4.

Upon receiving the notification of the completion of preparation from the application, the management manager 11 notifies the user apparatus 4 of the completion of preparation and the login information of the server apparatus 20 (step S103).

Next, when a request for system construction of a different function comes from another user device 4, the system is built on the different server device 20 by the same procedure from step S101. In the present embodiment, the selection method of the server device 20 for constructing the system is not particularly limited.

As described above, the server system 1 in the present embodiment includes the FPGA accelerator control system 10 having a plurality of functional packages 121, and the server device 20 having the FPGA 22. Further, the server device 20 has an FPGA common board 21 used when configuring the FPGA 22 for each function, and the FPGA common board 21 includes an FPGA core unit 211 and an FPGA common unit 212. With such a configuration, the FPGA core included in the functional package 121 selected by the user device 4 can be written to the FPGA core unit 211. As a result, it becomes possible to reconstruct the system by configuring the FPGA 22 for each function requested by the user device 4. This allows the system to be rebuilt for the features requested by the user, even if the system was previously running for another purpose. For example, even if the server device 20 for function A is operated with 20 units and then 10 units are operated with function A and 10 units are operated with function B, the necessary operation is required without adding a new server device 20. Can be done. In other words, the above configuration makes it possible to improve the utilization efficiency of the server system 1 having the server device 20 equipped with the FPGA.

Further, in the case of the server system 1 described in the present embodiment, the FPGA common board 21 includes the FPGA core unit 211 and the FPGA common unit 212, and the FPGA core for each function is written in the FPGA core unit 211. , FPGA 22 can be constructed according to the function. By dividing the FPGA core unit 211 and the FPGA common unit 212 in this way, the development scale can be reduced. Further, by providing the FPGA common unit 212 with a function of monitoring the FPGA core unit 211 and a function of performing failure processing, even if a failure occurs at the time of reconfiguration (when the FPGA core is written to the FPGA core unit 211). , FPGA common unit 212 can perform failure processing.

In the present embodiment, the server system 1 has an FPGA accelerator control system 10 in addition to the server device 20. However, for example, the function of the FPGA accelerator control system 10 may be realized by any one of the server devices 20 included in the server system 1.

Further, in the present embodiment, the functional package 121 includes an OS, an FPGA common platform driver, an application, and an FPGA core. However, the information contained in the functional package 121 is not limited to the above examples. The functional package 121 may include, for example, only the application and the FPGA core. In this case, each server device 20 has a common OS and an FPGA common board driver in advance. Further, the functional package 121 may contain information other than those illustrated above.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to FIGS. 5 and 6. In the second embodiment, the outline of the configuration of the server device 6 and the server system 7 will be described.

First, the configuration of the server device 6 will be described with reference to FIG.

Referring to FIG. 5, the server device 6 has a programmable circuit 61. Further, the server device 6 has a core unit 62 set according to the function executed by the programmable circuit 61 and a common unit 63 in which a function common to each function implemented by the programmable circuit 61 is preset. And have. For example, the server device 6 has a storage device (not shown) and an arithmetic unit (not shown), and the arithmetic unit (not shown) executes a program stored in the storage device (not shown) to execute the core unit 62 and the common unit 63. And realize.

The server device 6 having the above configuration receives a function package provided in advance according to the function performed by the programmable circuit 61 from, for example, an external device. Then, the server device 6 writes in the core unit 62 the core corresponding to the function performed by the programmable circuit 61 included in the received functional package.

As described above, the server device 6 includes a programmable circuit 61, and has a core portion 62 and a common portion 63. With such a configuration, when the server device 6 receives a function package provided in advance according to the function performed by the programmable circuit 61, the function performed by the programmable circuit 61 included in the received function package is performed. The core corresponding to the above can be written in the core portion 62. As a result, the server device 6 can construct a programmable circuit 61 for each function according to the received functional package. As a result, the programmable circuit 61 of the server device 6 can have a function according to, for example, a user's request, and the utilization efficiency of the server device 6 can be improved.

Further, the above-mentioned server device 6 can be realized by incorporating a predetermined program into the server device 6. Specifically, the program according to another embodiment of the present invention is programmable to the server device 6 including the programmable circuit 61, the core unit 62 set according to the function performed by the programmable circuit 61, and the program. A common unit 63 in which a common function is preset for each function that can be implemented by the circuit 61 is realized, and the server device 6 provides a function package that is provided in advance according to the function that the programmable circuit 61 implements. Upon reception, it is a program that writes the core corresponding to the function performed by the programmable circuit 61 included in the received function package to the core unit 62.

Further, the server control method executed by the server device 6 described above is a server control method executed by the server device 6 including the programmable circuit 61, and the server device 6 is executed by the programmable circuit 61. The server device 6 includes a core unit 62 that is set according to a function and a common unit 63 that has a common function set in advance for each function that can be implemented by a programmable circuit. When a function package provided in advance according to the function to be executed is received, the core corresponding to the function to be executed by the programmable circuit 61 included in the received function package is written to the core unit 62.

Even the invention of the program or the server control method having the above-mentioned configuration can achieve the above-mentioned object of the present invention because it has the same operation as the above-mentioned server device 6.

Subsequently, with reference to FIG. 6, the configuration of the server system 7, which is another form of the server device 6 described above, will be described.

Referring to FIG. 6, the server system 7 includes a control device 8 and a server device 9.

The control device 8 has a plurality of functional packages 81 and a management unit 82. For example, the control device 8 has a storage device (not shown) and an arithmetic unit (not shown). The control device 8 realizes the management unit 82, for example, by executing a program stored in a storage device (not shown) by an arithmetic unit (not shown). Further, the functional package 81 is stored in, for example, a storage device (not shown).

The functional package 81 is pre-made according to the functions performed by the programmable circuit 91 described later. The functional package 81 contains cores according to the functions performed by the programmable circuit 91. The control device 8 can have an arbitrary number of functional packages 81.

The management unit 82 transmits the function package 81 to the server device 9 in response to an inquiry from the user.

The server device 9 has a programmable circuit 91. Further, the server device 9 has a core unit 92 set according to the function executed by the programmable circuit 91 and a common unit 93 in which a function common to each function implemented by the programmable circuit 91 is preset. And have. For example, the server device 9 has a storage device (not shown) and an arithmetic unit (not shown), and the arithmetic unit (not shown) executes a program stored in the storage device (not shown), so that the core unit 92 and the common unit 93 are executed. And realize.

The server device 9 having the above configuration receives a function package provided in advance according to the function performed by the programmable circuit 91 from the control device 8. Then, the server device 9 writes in the core unit 92 the core corresponding to the function performed by the programmable circuit 91 included in the received function package.

Even with such a configuration, it is possible to have the same effect as that of the server device 6 described with reference to FIG.

<Additional Notes>
Part or all of the above embodiments may also be described as in the appendix below. Hereinafter, the outline of the server device and the like in the present invention will be described. However, the present invention is not limited to the following configuration.
(Appendix 1)
A server device with a programmable circuit
The server device includes a core unit set according to a function implemented by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. ,
When the server device receives a function package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received function package. A server device that writes to the core.
(Appendix 2)
The server device according to Appendix 1,
A server device in which the functional package contains applications according to the functions performed by the programmable circuit.
(Appendix 3)
The server device described in Appendix 2,
The functional package contains a common board driver common to each function that the programmable circuit can perform.
The application instructs the common board driver to write the core to the core portion.
The common board driver is a server device that writes the core to the core portion via the common portion in response to the instruction.
(Appendix 4)
The server device according to any one of Supplementary note 1 to 3, wherein the server device is described.
The functional package is a server device that includes an OS (Operating System) according to the function performed by the programmable circuit.
(Appendix 5)
The server device according to any one of Supplementary note 1 to 4.
The programmable circuit is a server device that is an FPGA (field-programmable gate array).
(Appendix 6)
A server control method executed by a server device equipped with a programmable circuit.
The server device includes a core unit set according to a function implemented by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. ,
When the server device receives a function package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received function package. Server control method to write to the core part.
(Appendix 7)
For server devices with programmable circuits
A core unit set according to the function performed by the programmable circuit and a common unit in which a function common to each function implemented by the programmable circuit is preset are realized.
When the server device receives a functional package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received functional package. A program to write to the core.
(Appendix 8)
A server system having a control device and a server device having a programmable circuit.
The control device includes a plurality of functional packages created in advance according to the functions performed by the programmable circuit, and a management unit that transmits the functional packages to the server device in response to an inquiry from a user. death,
The server device includes a core unit set according to a function implemented by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. ,
When the server device receives a function package provided in advance according to the function performed by the programmable circuit, the server device includes a core according to the function performed by the programmable circuit included in the received function package. A server system that writes to the core.
(Appendix 9)
The server system described in Appendix 8
A server system in which the functional package contains applications according to the functions performed by the programmable circuit.
(Appendix 10)
The server system described in Appendix 9,
The functional package contains a common board driver common to each function that the programmable circuit can perform.
The application instructs the common board driver to write the core to the core portion.
The common board driver is a server system that writes the core to the core portion via the common portion in response to the instruction.

In addition, the program described in each of the above-described embodiments and appendices may be stored in a storage device or recorded in a recording medium readable by a computer. For example, the recording medium is a portable medium such as a flexible disk, an optical disk, a magneto-optical disk, and a semiconductor memory.

Although the invention of the present application has been described above with reference to each of the above embodiments, the invention of the present application is not limited to the above-described embodiment. Various changes that can be understood by those skilled in the art can be made to the structure and details of the present invention within the scope of the present invention.

1 Server system 10 FPGA accelerator control system 11 Management manager 12 Storage device 121 Function package 20 Server device 21 FPGA common board 211 FPGA core part 212 FPGA common part 22 FPGA
30 LAN
4 User device 5 Network 6 Server device 61 Programmable circuit 62 Core part 63 Common part 7 Server system 8 Control device 81 Functional package 82 Management part 9 Server device 91 Programmable circuit 92 Core part 93 Common part

Claims (10)

A server device with a programmable circuit
In the server device, a core unit set according to a function according to a request from a user performed by the programmable circuit and a function common to each function implemented by the programmable circuit are preset. Including the common part that has been and the common base that has
When the server apparatus receives the function package provided in advance according to the function of the programmable circuit is implemented, functional package public infrastructure driver included in the function package, which initializes the common base, the received Instruct the common section to write the cores contained in the core section according to the functions performed by the programmable circuit.
A server device in which the common unit writes the core to the core unit in response to an instruction. The server device according to claim 1.
A server device in which the functional package contains applications according to the functions performed by the programmable circuit. The server device according to claim 2.
Before SL application instructs to said common base driver to perform writing of said core to said core portion,
The common board driver is a server device that writes the core to the core portion via the common portion in response to the instruction. The server device according to any one of claims 1 to 3.
The functional package is a server device that includes an OS (Operating System) according to the function performed by the programmable circuit. The server device according to any one of claims 1 to 4.
The programmable circuit is a server device that is an FPGA (field-programmable gate array). A server control method executed by a server device equipped with a programmable circuit.
In the server device, a core unit set according to a function according to a request from a user performed by the programmable circuit and a function common to each function implemented by the programmable circuit are preset. Including the common part that has been and the common base that has
It said server device, when the server device receives the function package provided in advance according to the function of the programmable circuit is implemented, initializes the common base, included in the function package received, the program A server control method in which a common unit is instructed to write a core according to a function performed by a possible circuit to the core unit, and the common unit writes the core to the core unit in response to the instruction. For server devices with programmable circuits
A core unit set according to a function according to a request from a user performed by the programmable circuit, and a common unit in which a function common to each function implemented by the programmable circuit is preset. Realize a common platform with ,
Wherein the server device, when the server device receives the function package provided in advance according to the function of the programmable circuit is implemented, initializes the common base, included in the function package received, the program The common part is instructed to write the core according to the function performed by the possible circuit to the core part, and the common part writes the core to the core part according to the instruction.
A program to realize the processing. A server system having a control device and a server device having a programmable circuit.
The control device includes a plurality of functional packages created in advance according to the functions performed by the programmable circuit, and a management unit that transmits the functional packages to the server device in response to an inquiry from a user. death,
In the server device, a core unit set according to a function according to a request from a user performed by the programmable circuit and a function common to each function implemented by the programmable circuit are preset. Including the common part that has been and the common base that has
When the server apparatus receives the function package provided in advance according to the function of the programmable circuit is implemented, functional package public infrastructure driver included in the function package, which initializes the common base, the received Instruct the common section to write the cores contained in the core section according to the functions performed by the programmable circuit.
A server system in which the common unit writes the core to the core unit in response to an instruction. The server system according to claim 8.
A server system in which the functional package contains applications according to the functions performed by the programmable circuit. The server system according to claim 9.
Before SL application instructs to said common base driver to perform writing of said core to said core portion,
The common board driver is a server system that writes the core to the core portion via the common portion in response to the instruction.

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