JP7151246B2 - Information processing device, information processing method and program - Google Patents

Description

TECHNICAL FIELD The present invention relates to technology for processing information, and more particularly to technology for processing information related to communication of data.

A device that forwards or discards packets according to certain rules is hereinafter referred to as a packet processing device. Packet processing devices include, for example, Ethernet (registered trademark) switches, routers, and SDN (Software Defined Network) switches. When a packet processing device receives and processes a packet, it generally performs the following processing.
1: Receive packets from a communication interface (hereinafter also referred to as NIC (Network Interface Controller)).
2: Retrieve information needed to process the packet.
3: Process the packet based on the information.

The above process 2 is also called Packet Classification, and is a process of searching for a rule with the highest priority that matches the received packet from a set of rules given in advance. A rule includes at least a match condition (eg, information representing a range of addresses) and information indicating an action associated with the match condition. A match condition is a condition for determining whether a rule applies to a received packet. For example, if the range represented by the match condition includes the destination address of the packet, the packet is determined to match the match condition. Actions are processing performed on packets that are determined to meet the match conditions. If the packet is determined to meet the match criteria, the rule is applied to that packet. That is, if a packet is determined to meet a match condition, the action associated with that match condition is performed on that packet. In the following description, a rule that a packet matches refers to a rule containing match conditions that a packet matches. Rules may also include priorities and statistics. Further, the above process 2 is sometimes called FIB (Forwarding Information Base) Lookup. The rule set is also denoted as FIB in the following description.

In recent years, computer virtualization technology has been widely used in cloud computing and the like. Computer virtualization technology implements a virtual server (hereinafter also referred to as a virtual machine and virtual machine (VM)) on a physical server (hereinafter also referred to as a host machine), and the virtual server It is a technology that operates the In computer virtualization technology, a virtual switch is implemented in a host machine as a function corresponding to the packet processing device described above. Packets are transferred between virtual machines and between virtual machines and communication interfaces of host machines. A virtual machine is configured with a virtual communication interface. A virtual switch may be implemented by SW (Software) in a host machine. In other words, the virtual switch may be implemented, for example, by a processor executing a program loaded in memory that implements the functionality of the virtual switch. The virtual switch may be implemented by HW (Hardware) such as a circuit in the host machine. A virtual switch may be implemented by a combination thereof.

FIG. 1 shows a configuration example of a host machine using a virtual switch. The host machine 200 shown in FIG. 1 includes a CPU (Central Processing Unit), a main memory 210, and a HW 220 for virtual switches. CPU and main memory 210 is implemented with one or more CPUs and memory that is accessible by the CPU and acts as main memory. The virtual machine 214 is implemented by a CPU and main memory. In other words, a virtual machine is implemented with a main memory and a CPU that executes a program loaded into the main memory that implements the functionality of the virtual machine 214 . The virtual switch 221 is realized by the HW 220 for virtual switches. In the following description, the operation of the CPU that is controlled by the program that implements the functions of the virtual machine 214 and that operates as the virtual machine 214 will be described as the operation of the virtual machine 214 . Also, the operation of the virtual switch HW 220 that operates as the virtual switch 221 will be described as the operation of the virtual switch 221 . The CPU and main memory 210 and the virtual switch HW 220 are connected via a bus 230 . Packet communication between the virtual NIC 211 of the virtual machine 214 and the virtual switch 221 is performed via queues secured in the main memory. A queue is a FIFO (First In First Out) memory, and is hereinafter simply referred to as FIFO. The FIB 212 used by the virtual switch 221 is arranged in the main memory.

The following operation is an example when a packet addressed to VM 214 is received by NIC 240 .
(1) The virtual switch 221 receives a packet from the NIC240.
(2) The virtual switch 221 refers to the FIB 212 (on the main memory 210) and determines processing information for the packet (here, it is determined that the packet is to be sent to the VM 214).
(3) The virtual switch 221 adds the packet to the reception queue (secured in the main memory 210) of the virtual NIC 211 of the VM 214.
(4) VM 214 receives the packet from the receive queue.

For example, in a cloud environment, multiple virtual machines running on a certain host machine may be used by different customers (this situation is also called multi-tenancy). At this time, when a certain virtual machine uses a large amount of CPU or performs communication, it must be avoided that other virtual machines cannot use the CPU or communication due to the influence. For that purpose, QoS (Quality of Service) control is used. QoS control for communication is performed, for example, by a virtual switch, and includes the following controls.
(1) Blocking or delaying communications with a rate above a predetermined threshold, or marking packets of such communications (Policing, Shaping).
(2) Guarantee a communication rate for a specific type of communication (bandwidth guarantee).
(3) Guarantee delay time and jitter for a specific type of communication (delay guarantee).
(4) Give priority to a specific type of communication (priority control).

A method and algorithm for QoS control of communication are disclosed in, for example, Japanese Unexamined Patent Application Publication No. 2002-200010.

Patent No. 3434642

For example, in the configuration shown in FIG. 1, communication of packet data transmitted and received by the virtual NIC 211 (hereinafter referred to as data communication) is performed between the main memory and the virtual switch HW 220 via the bus 230. . Communication for accessing the FIB 212 arranged in the main memory 210 by the virtual switch 221 (hereinafter referred to as control system communication) is also performed via the same bus 230 . In other words, data system communication and control system communication share bus 230 . Therefore, when performing QoS control (for example, band guarantee), there is a possibility that band guarantee cannot be performed especially for communication in the virtual NIC 211 .

Specifically, each time the virtual switch 221 receives a packet, it accesses the FIB 212 to determine how to process the packet, and as a result consumes the bandwidth of the bus. In general, the smaller the size of the received packet, the greater the number of times the packet is processed. Since the bandwidth of the bus 230 is finite, if the bandwidth consumption of the bus increases due to access to the FIB 212, the bandwidth available for packet data communication decreases.

Therefore, the bandwidth that can be used for packet data communication fluctuates depending on the communication traffic situation, and as a result, the bandwidth cannot be guaranteed, or the accuracy of the bandwidth guarantee deteriorates.

The technique described in Patent Literature 1 cannot suppress the deterioration of the accuracy of QoS control when data-based communication and control-based communication share a communication path.

The present invention has been made in view of such problems. SUMMARY OF THE INVENTION It is an object of the present invention to provide an information processing apparatus and the like capable of suppressing degradation in accuracy of QoS control even when data system communication and control system communication related to packet processing share a bus.

An information processing apparatus according to an aspect of the present invention indicates at least one of a plurality of types of processing including transfer for data, and caches a rule read via a communication path used for transferring the data. determining means for determining whether or not to store the rule in the means based on the size of the data; and control means for storing the rule determined to be stored in the cache means.

An information processing method according to an aspect of the present invention indicates at least one of a plurality of types of processing including transfer for data, and caches rules read out via a communication path used for transferring the data. A determination as to whether or not to store in the means is made based on the size of the data, and the rules determined to be stored are stored in the caching means.

A program according to an aspect of the present invention indicates to a computer at least one of a plurality of types of processing, including transfer, for data, and a rule read out via a communication path used for transferring the data, Determination processing for determining whether or not to store the rule in the cache means based on the size of the data, and control processing for storing the rule determined to be stored in the cache means are executed.

According to the present invention, it is possible to suppress deterioration in accuracy of QoS control even when data system communication and control system communication related to packet processing share a bus.

FIG. 1 is a block diagram showing a configuration example of a host machine using virtual switches. FIG. 2 is a block diagram showing an example of the hardware configuration of the computer 10 that implements the information processing apparatuses according to the first and second embodiments of the present invention. FIG. 3 is a block diagram showing an example of the configuration of the information processing apparatus according to the first and second embodiments of the invention. FIG. 4 is a block diagram showing an example of the configuration of the scheduling section according to the first embodiment of the present invention. FIG. 5 is a schematic diagram showing an example of the configuration when the cache unit according to the first embodiment of the present invention is implemented as a cache memory. FIG. 6 is a flow chart showing an example of the operation of the information processing apparatus according to the first and second embodiments of the present invention when a packet is received. FIG. 7 is a flow chart showing details of the operation of creating a rule cache entry in the information processing apparatus according to the first and second embodiments of the present invention. FIG. 8 is a flow chart showing an example of the operation of updating the cache entry of the information processing apparatus according to the first and second embodiments of the present invention. FIG. 9 is a flow chart showing an example of the operation of transmitting a received packet of the information processing apparatus according to the first embodiment of the present invention. FIG. 10 is a flow chart showing an example of the operation of the information processing apparatus according to the first embodiment of the present invention for performing scheduling processing. FIG. 11 is a flow chart showing an example of processing for transmitting a received packet by the information processing apparatus according to the second embodiment of the present invention. FIG. 12 is a flow chart showing an example of the operation of the information processing apparatus according to the second embodiment of the present invention for performing scheduling processing. FIG. 13 is a block diagram showing an example configuration of an information processing system according to the first and second embodiments of the present invention. FIG. 14 is a block diagram showing an example configuration of an information processing apparatus according to the third embodiment of the present invention. FIG. 15 is a flow chart showing an example of the operation of the information processing device according to the third embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<First Embodiment>
<<Configuration Example of First Embodiment>>
First, a configuration example of the first embodiment of the present invention will be described with reference to FIGS. 2 to 5. FIG.
FIG. 2 is a block diagram showing an example of the hardware configuration of the computer 10 that implements the information processing apparatus 100 according to this embodiment. The information processing apparatus 100 of this embodiment can be implemented by, for example, the computer 10 shown in FIG. Computer 10 illustrated in FIG. 2 includes CPU 101 , memory 102 , bus 103 A, bus 103 B, bus 103 C, NIC 104 , virtual switch hardware 120 , and storage device 105 . The information processing apparatus 100 may further include an access device 106 that can access the storage medium 107 and a bus 103D that connects the CPU 101 and the access device 106 . The number of constituent elements and connection relationships shown in FIG. 2 are examples. The number of components included in the information processing apparatus 100 is not limited to the number shown in FIG.

The CPU 101 is a CPU that performs calculations for information processing. The CPU 101 may have a virtualization function. The CPU 101 performs information processing using programs and data stored in the memory 102 . Specifically, the CPU 101 executes a program stored in the memory 102 and functions as, for example, a virtual machine under the control of the program.

The memory 102 is, for example, a RAM (Random Access Memory) or the like, and functions as a main memory of the computer 10 . In addition to memory chips, memory 102 may include memory controllers, cache memories, cache controllers, and the like.

A bus 103A is a bus that connects the CPU 101 and the memory 102, respectively. The bus 103B is a bus that connects the virtual switch hardware 120 and the memory 102 . A bus 103C is a bus that connects the CPU 101 and the storage device 105 . Bus 103A, bus 103B and bus 103C may be different buses. Any or all of bus 103A, bus 103B, and bus 103C may be the same bus. The buses 103A, 103B, and 103C are also referred to as communication paths in the following description.

NIC 104 is a communication interface for connecting to a communication network. Information processing apparatus 100 is connected to a communication network via NIC 104 . The NIC 104 may be, for example, a communication interface conforming to the Ethernet standard. The computer 10 communicates data related to information processing, for example, with other devices connected to the above communication network via the NIC 104 .

The virtual switch hardware 120 is hardware that processes packets of data transferred between the NIC 104 and the CPU 101 and the memory 102 operating as a virtual NIC unit 111 to be described later. Note that in the description of this embodiment, data is transmitted in the form of packets. A packet may also be simply referred to as data. In the following description, a packet refers to a packet generated from the data to be transmitted and containing at least part of that data. The packet is, for example, an IP (Internet Protocol) packet. The virtual switch hardware 120 has a function as a packet processing device that transfers or discards data packets according to certain rules, like an Ethernet switch, router, or SDN switch. The virtual switch hardware 120 may be, for example, a processor and memory operating as a virtual switch. The virtual switch hardware 120 may be implemented by a processor such as a CPU. The virtual switch hardware 120 may be implemented by circuits such as FPGAs (Field-Programmable Gate Arrays), ASICs (Application Specific Integrated Circuits), DSPs (Digital Signal Processors), and the like. The virtual switch hardware 120 may be implemented by a combination of such circuits. The virtual switch hardware 120 further includes a storage device such as a memory that functions as a cache unit 122, which will be described later. The virtual switch hardware 120 refers to FIB information stored in the rule storage unit 112, which will be described later, and determines a packet processing method based on the FIB information.

The storage device 105 is, for example, a secondary storage device such as a hard disk. The storage device 105 stores programs executed by the CPU 101, data used for information processing by the CPU 101 controlled by the programs, and the like. The CPU 101 may load a program stored in the storage device 105 into, for example, the memory 102 and execute the program loaded into the memory 102 .

The storage medium 107 is, for example, a semiconductor storage medium such as RAM, ROM, and flash memory, a portable storage medium such as a magnetic disk and an optical disk, or a storage device such as a hard disk. The storage medium 107 may store the above program. The program is read from the storage medium 107 by the CPU 101, for example. The read program may be written to the storage device 105 by the CPU 101, for example. The read program may be loaded into the memory 102 by the CPU 101, for example. The storage medium 107 may store data that the CPU 101 uses for information processing. Data stored in the storage medium 107 is read by the CPU 101, for example. The read data may be stored in the storage device 105 by the CPU 101, for example. The read data may be loaded into the memory 102 by the CPU 101, for example.

The access device 106 is a device that can access the storage medium 107 . Specifically, the access device 106 is a device capable of reading programs and data stored in the storage medium 107 . For example, if the storage medium 107 is a medium such as a CD-ROM (Compact Disc-Read Only Memory), the access device 106 may be a drive device. If the storage medium 107 is a non-volatile memory such as flash memory, the access device 106 may be a combination of a controller and a connector or slot connected to the controller. If the storage medium 107 is a writable storage medium, the access device 106 may write programs, data, and the like to the storage medium 107 .

FIG. 3 is a block diagram showing an example of the configuration of the information processing apparatus 100 according to this embodiment. FIG. 3 shows an example of the functional configuration of the information processing apparatus 100 of this embodiment. The information processing apparatus 100 illustrated in FIG. 3 includes a virtual communication interface unit 111, a rule storage unit 112, a rule management unit 113, an information processing unit 114, an instruction reception unit 115, a packet processing unit 121, and a cache unit. 122 , a scheduling unit 123 , a communication interface unit 124 , a decision unit 125 and a control unit 126 . A virtual machine may be built in the information processing apparatus 100 . Specifically, the information processing unit 114 may operate as a virtual machine. In other words, the information processing unit 114 may be a virtual machine that operates in the information processing device 100 . In the example shown in FIG. 3, the number of information processing units 114 is three. The number of virtual communication interface units 111 is the same as the number of information processing units 114, which is three. Furthermore, the number of communication interface units 124 is also three. The number of communication interface units 124 may not be the same as the number of information processing units 114 . The number of constituent elements and connection relationships shown in FIG. 3 are examples. Also, the connection relationship is not limited to the example shown in FIG. These are implemented by the hardware shown in FIG. Also, in the following description, the information processing unit 114 and the virtual communication interface unit 111 may be collectively referred to as the execution unit 110A. In other words, the execution unit 110A provides the functions of the information processing unit 114 and the functions of the virtual communication interface unit 111 .

Specifically, the information processing unit 114, the virtual NIC unit 111, and the rule management unit 113 are realized by the CPU 101 and the memory 102, for example, as will be described later. Execution unit 110A is also implemented by CPU 101 and memory 102 . The rule storage unit 112 is realized by the memory 102, for example. The packet processing unit 121, the cache unit 122, the scheduling unit 123, the determination unit 125, and the control unit 126 are implemented by the virtual switch hardware 120, for example.

Note that the virtual communication interface unit 111 is also referred to as the virtual NIC unit 111 in the following description and drawings. Also, the communication interface unit 124 is also referred to as the NIC unit 124 . In addition, in the description that does not require distinction between the plurality of virtual NIC units 111, the description that is common to the plurality of virtual NIC units 111, and the description of the entire plurality of virtual NIC units 111, the plurality of virtual NIC units 111 It is written as a virtual NIC unit 111 without distinction. Moreover, when it is necessary to distinguish the plurality of virtual NIC units 111 individually, the plurality of virtual NIC units 111 are described as a virtual NIC unit 111A, a virtual NIC unit 111B, and a virtual NIC unit 111C. The virtual NIC unit 111A, the virtual NIC unit 111B, and the virtual NIC unit 111C may also be collectively referred to as the virtual NIC units 111A-C.

FIG. 13 is a block diagram showing an example of the configuration of the information processing system 1 according to this embodiment. Note that the information processing system 1 according to the second embodiment, which will be described later, may also have the configuration shown in FIG. In the example shown in FIG. 13 , the information processing system 1 includes an information processing device 100 , an information processing device 100A, an information processing device 100B, an information processing device 100C, and a management device 300 . Information processing device 100 , information processing device 100</b>A, information processing device 100</b>B, information processing device 100</b>C, and management device 300 are communicably connected via communication network 400 . Information processing apparatus 100 is connected to communication network 400 via NIC 104 . The information processing device 100A, the information processing device 100B, and the information processing device 100C may have the same configuration as the information processing device 100 . The information processing device 100A, the information processing device 100B, the information processing device 100C, and the management device 300 may be general computers. The information processing device 100 communicates with the information processing device 100</b>A, the information processing device 100</b>B, the information processing device 100</b>C, and the management device 300 via the communication network 400 (for example, transmitting and receiving data). Specifically, the virtual machines built in the information processing device 100 communicate with the information processing device 100A, the information processing device 100B, the information processing device 100C, and the like via the virtual NIC unit 111, the NIC unit 124, and the communication network 400. communicate. In other words, in the information processing apparatus 100, a virtual machine built in the information processing apparatus 100 communicates with other devices connected to the communication network 400 via the virtual NIC unit 111, the NIC unit 124, and the communication network 400. configured for communication. Note that the devices connected to communication network 400 shown in FIG. 13 are merely examples, and are not limited to the examples shown in FIG.

The information processing unit 114 transmits and receives data in the form of packets, for example, through the virtual NIC unit 111 . The information processing unit 114 may perform information processing using the received packet data. The information processing unit 114 may perform information processing using, for example, data stored in the memory 102 or the like. The information processing section 114 may perform information processing using other data. The information processing performed by the information processing unit 114 is not limited. The information processing unit 114 is implemented by the CPU 101 . As described above, the information processing unit 114 may be implemented as a virtual machine. The information processing unit 114 may be implemented as a program that runs on a virtual machine.

The virtual NIC unit 111 is a virtual communication interface and implements communication between the information processing unit 114 and the scheduling unit 123 . The virtual NIC unit 111 may be, for example, a virtual NIC configured as part of a virtual machine. Virtual NIC unit 111 is realized by CPU 101 and memory 102 . Packet communication via the virtual NIC unit 111 is realized by, for example, a FIFO queue secured in the memory 102 . For example, the information processing unit 114 enqueues a packet to be transmitted via the virtual NIC unit 111 to the queue for the virtual NIC unit 111 . The scheduling unit 123 dequeues packets from the queue for the virtual NIC unit 111 . Thereby, the scheduling unit 123 receives the packet transmitted by the information processing unit 114 .

The rule storage unit 112 stores FIB, which is information for determining processing to be performed on received packets. The rule storage unit 112 stores a set of rules accumulated as FIB. A rule includes at least a match condition (eg, a condition on an address) and information indicating an action associated with the match condition. An action is, for example, processing to be performed on a packet whose destination address matches the match condition associated with the action. Hereinafter, a rule is referred to as a rule that matches a packet if the destination address of the packet matches the match condition included in the rule. Rule storage unit 112 is implemented by memory 102 . In the following description, the set of rules stored in the rule storage unit 112 is also referred to as FIB. The rules stored by the rule storage unit 112 may include priorities between rules. The rules stored in the rule storage unit 112 may include wildcard conditions. The rule stored in the rule storage unit 112 may be an exact match type rule (Exact Match). The rules stored in the rule storage unit 112 may be a combination of them.

The instruction accepting unit 115 accepts an instruction to add, an instruction to delete, and an instruction to change the rule stored in the rule storage unit 112 . The instruction receiving unit 115 may receive these instructions, for example, from the management device 300 via the communication interface unit 124, for example. The instruction receiving unit 115 may receive these instructions, for example, from the user or administrator of the information processing apparatus 100 via an input device such as a keyboard. Instruction accepting portion 115 sends the above-described accepted instructions to rule managing portion 113 . In FIG. 3, the route through which the instruction receiving unit 115 receives instructions is omitted for the sake of simplicity.

A rule management unit 113 manages the contents of the FIB stored in the rule storage unit 112 . Specifically, the rule management unit 113 adds, deletes, and changes rules stored in the rule storage unit 112 according to instructions received from the instruction reception unit 115, for example. The rule management unit 113 may add, delete, and change rules, for example, according to instructions from the user of the information processing device 100, the management device 300, and the like. The rule management unit 113 may add, delete, and change rules based on requests from the information processing unit 114, the packet processing unit 121, and the like, for example. The rule management unit 113 may be realized by the CPU 101 and the memory 102, for example.

The packet processing unit 121 receives packets from the NIC unit 124 and the virtual NIC unit 111 and processes the received packets. When processing a received packet, the packet processing unit 121 reads a rule that matches the received packet from among the rules stored in the cache unit 122 or the FIB stored in the rule storage unit 112 .

The packet processing unit 121 , for example, transmits information on the received packet to the control unit 126 . The packet information includes information used for comparison with the matching conditions included in the rule (eg, destination address, source address, etc.) and the size of the packet. The packet information transmitted to the control unit 126 is also referred to as a key in the following description. For example, when the packet is an IP packet, the information of the packet (for example, the key described later) may be the header of the packet. The IP packet header includes the source IP address, destination IP address, datagram length, and the like. Also, for example, the packet processing unit 121 may use the datagram length as the size of the packet (that is, the packet length). As described below, when transmitting packet information including the packet size and the like to the control unit 126, the packet processing unit 121 may transmit data in the header portion of the packet as a key.

As will be described in detail later, the control unit 126 receives information on the received packet from the packet processing unit 121 and reads a rule that matches the information on the received packet from the cache unit 122 or the rule storage unit 112 . The control unit 126 transmits the read rule to the packet processing unit 121 .

The packet processing unit 121 receives rules read from the cache unit 122 or the rule storage unit 112 by the control unit 126 from the control unit 126 . The packet processing unit 121 processes the received packets according to the read rules, ie according to the rules included in the FIB and conforming to the received packets. In other words, the packet processing unit 121 executes the action indicated by the information associated with the address condition to which the received packet matches. In other words, the packet processing unit 121 executes the action indicated by the information included in the rule to which the received packet matches. An action is, for example, one of the following processes. An action may be, for example, any combination of the following processes.
(1) Send the packet to the specified NIC unit 124 or virtual NIC unit 111 .
(2) Discard the packet.
(3) Change the packet.
(4) Notifying a predetermined notification destination of the reception of the packet.

The notification destination may be, for example, the rule management unit 113, the management device 300, and the like. The packet processing unit 121 may notify the control unit 126 whether or not the packet has been discarded. The packet processing unit 121 is implemented by the virtual switch hardware 120 .

The cache unit 122 caches a portion of the FIB stored by the rule storage unit 112 (that is, a subset of the set of rules). In other words, the cache unit 122 stores part of the FIB stored by the rule storage unit 112 as a cache. The cache unit 122 is implemented by the virtual switch hardware 120 . The cache unit 122 may be implemented as a cache memory, for example. The cache unit 122 may be implemented as a memory that stores hash tables, for example. The cache unit 122 may store the priority of the rules in addition to the rules. As noted above, a rule may include a priority for that rule. The priority may be represented by a binary value indicating whether or not to be preferentially stored in the cache unit 122 . That is, the priority is either a value (for example, 1) indicating preferential storage in the cache unit 122 or a value (for example, 0) indicating not preferentially storing in the cache unit 122. good too. The priority in this case corresponds to a priority flag described later. In the following description, a value indicating preferential storage in the cache unit 122 is denoted by P, and a value indicating not preferentially storing in the cache unit 122 is denoted by N.

Caching unit 122 may also store rules, as well as information used to determine whether to remove the rule from caching unit 122 . Information (eg, LRU information) used to determine whether to remove a rule from cache 122 may be, for example, information indicating the last time the rule was used. Information indicating the time may include date information. The LRU information may be a value representing the recency rank of the last used time. In that case, for example, when the control unit 126 reads the rule stored in the cache unit 122, the LRU information of the read rule may be changed to information indicating the first place. Then, the control unit 126 sets the LRU information of all other rules stored in the cache unit 122 to a rank one level lower than the order before the change (that is, a value one higher than the value representing the order before the change). It may be changed to information representing the order represented by ). The LRU information may be, for example, information indicating whether or not it has been used (in this embodiment, information indicating whether or not a rule has been read). In that case, for example, the control unit 126 may periodically set the LRU information of the rule stored in the cache unit 122 to information indicating that the rule is not used. Then, when a rule is read from the cache unit 122, the control unit 126 may set the LRU information of the rule to information indicating that the rule has been used.

The control unit 126 relays reading of rules from the rule storage unit 112 by the packet processing unit 121 . Specifically, the control unit 126 receives information on the received packet from the packet processing unit 121 . Based on the received information of the packet, the control unit 126 retrieves the rule including the matching condition that matches the packet received by the packet processing unit 121 from the rule stored in the cache unit 122 and the rule stored in the rule storage unit 112. Identify from among the rules that Specifically, for example, if the packet information matches the match conditions of a plurality of rules, the control unit 126 selects the rule containing the match condition that best matches the packet information according to a predetermined method. , may be selected as the rule that matches the received packet. In that case, for example, if the match condition is a condition for an address, the control unit 126 selects the match condition with the smallest number of matching addresses among the match conditions that match the packet information. may be selected as the match condition to be used. The method of selecting the match condition that best matches the packet information is not limited to the method described above.

If a rule including a matching condition that matches the packet information is stored in cache unit 122 , control unit 126 reads that rule from cache unit 122 . If a rule containing a matching condition matching packet information is not stored in the cache unit 122 but is stored in the rule storage unit 112 , the control unit 126 reads the rule from the rule storage unit 112 . The control unit 126 transmits the read rule to the packet processing unit 121 . If the rules stored in the cache unit 122 and the rule storage unit 112 do not include a matching condition that matches the information of the received packet, the control unit 126 stores information indicating that there is no rule in the packet. It may be transmitted to the processing unit 121 .

If the rule read from the rule storage unit 112 is not stored in the cache unit 122 , the control unit 126 transmits the packet size to the determination unit 125 . As will be described in detail later, the decision unit 125 decides whether to store a rule that matches the packet in the cache unit 122 based on the size of the packet. The determining unit 125 determines to preferentially store rules relating to small packets in the cache unit 122 as a cache. The determination unit 125 transmits to the control unit 126 the result of determining whether or not to store in the cache unit 122 a rule that matches the packet whose size has been received. The control unit 126 receives the result determined by the determination unit 125 from the determination unit 125 . The determination unit 125 may further determine rules to be deleted from the cache unit 122 . When determining to delete any rule from the cache unit 122 , the determination unit 125 transmits information specifying the rule determined to be deleted to the control unit 126 . The determination unit 125 will be detailed later.

If the rule read from the rule storage unit 112 is not stored in the cache unit 122, the control unit 126 preferentially caches the rule regarding small packets according to the determination by the determination unit 125, which will be described in detail later. Stored in section 122 . The control unit 126 preferentially stores the rule regarding the packet discarded by the scheduling unit 123 in the cache unit 122 as a cache. When the control unit 126 receives the identification information of the rule determined to be deleted from the determination unit 125 , the control unit 126 deletes the rule determined to be deleted from the cache unit 122 from the cache unit 122 . Deletion of rules from the cache unit 122 and storage of rules in the cache unit 122 by the control unit 126 will be described in detail later.

The decision unit 125 receives the packet size from the control unit 126 . Based on the size of the received packet, the determining unit 125 determines whether or not to preferentially store a rule matching the packet in the cache unit 122 . In other words, based on the size of the received packet, the determining unit 125 determines whether or not to preferentially store in the cache unit 122 the rule representing the processing (that is, action) for the packet. The determination unit 125 further determines whether to store a rule matching the received packet in the cache unit 122 based on the stored order and priority of the rules stored in the cache unit 122 and the determined result. Decide whether or not

Specifically, when the size of a packet conforming to a rule requested by the packet processing unit 121 is equal to or smaller than a predetermined threshold value, the determination unit 125 determines to preferentially store the rule in the cache unit 122 . The determining unit 125 may set the priority of the rule to P, for example. If the size of a packet conforming to the rule requested by the packet processing unit 121 is larger than a predetermined threshold, the determination unit 125 determines to store the rule in the cache unit 122 with low priority. Set the priority of the rule to N. A rule for determining whether or not to store in the cache unit 122 is hereinafter referred to as a target rule.

If there is space in the cache unit 122, the packet processing unit 121 determines whether the target rule is preferentially stored in the cache unit 122 (that is, regardless of the priority of the target rule). ), it decides to store the target rule in the cache unit 122 .

When the cache unit 122 stores rules determined to be stored with non-priority, the determination unit 125 selects, from among the rules stored in the cache unit 122 determined to be stored with non-priority, Determine the rule to be deleted according to a predetermined method. A predetermined method for determining rules to be deleted may be, for example, an LRU (Least Recently Used) algorithm. In this case, the determination unit 125 identifies the rule that has been used for the longest time among the rules stored in the cache unit 122 and determined to be stored with non-priority, and identifies the rule. Decide to delete the rule.

If the information used to determine whether to delete is stored as information indicating whether or not it has been used, the determining unit 125 associates the information indicating that it is not used. A rule to be deleted is determined from the rules determined to be stored with less priority. Any existing method may be used to determine the rule to be deleted in this case. For example, the determining unit 125 may randomly determine a rule to be deleted from rules that are associated with information indicating that they are not used and that have been determined to be stored with less priority. good.

Then, the determination unit 125 determines to store the target rule in the cache unit 122 regardless of whether it is determined that the target rule is preferentially stored in the cache unit 122 .

If only the rule determined to be stored preferentially is stored in the cache unit 122 and the target rule is determined to be stored with non-priority, the determination unit 125 stores the target rule in the cache unit 122. decide not to.

Only the rules determined to be stored preferentially are stored in the cache unit 122, and when it is determined that the target rule is preferentially stored, the determination unit 125 stores the rules stored in the cache unit 122. , according to a predetermined method, determine the rule to be deleted. The predetermined method of determining the rules to be deleted may be the same as the method of determining the rules to be deleted from among the rules determined to be stored with less priority. A predetermined method for determining rules to be deleted may be, for example, an LRU (Least Recently Used) algorithm. In that case, the determination unit 125 determines to delete the rule that has been used for the longest time among the rules stored in the cache unit 122 . The determination unit 125 then determines to store the target rule in the cache unit 122 .

If the target rule is stored in the cache unit 122 , the determination unit 125 determines not to store the target rule in the cache unit 122 .

The control unit 126 deletes the rule from the cache unit 122 and stores the target rule in the cache unit 122 according to the determination by the determination unit 125 . Specifically, when there is a rule determined to be deleted by the determination unit 125 , the control unit 126 deletes the rule from the cache unit 122 . If there is no rule determined to be deleted by the determination unit 125 (that is, if the determination unit 125 did not determine to delete the rule), the control unit 126 does not delete the rule from the cache unit 122 . When the determination unit 125 determines to store the target rule, the control unit 126 stores the target rule, the priority of the target rule, and the LRU information in the cache unit 122 .

When the target rule is newly stored in the cache unit 122, if the LRU information is information indicating the time when the target rule was used, the control unit 126 causes the target rule to be last used, for example, when the control unit 126 The time when the target rule was stored in the cache unit 122 may be set. The control unit 126 may set the time when the target rule was last used, for example, the time when the target rule was transmitted to the packet processing unit 121 . The control unit 126 may set the LRU information using another method. When the determination unit 125 determines not to store the target rule, the control unit 126 does not store the target rule in the cache unit 122 . When the target rule is stored in the cache unit 122 , the control unit 126 updates the LRU information of the target rule stored in the cache unit 122 . The method of setting the LRU information in this case may be the same as the method of setting the LRU information of the newly stored rule.

The control unit 126 may also receive discarded packet information (for example, discarded packet keys) from the packet processing unit 121 and the scheduling unit 123, which will be described in detail later.

The control unit 126 may detect a rule that matches the discarded packet, stored in the cache unit 122, based on the discarded packet information. Specifically, when information of a discarded packet matches a match condition included in a rule, the control unit 126 may detect that rule as a rule that matches the discarded packet. If a rule that matches the discarded packet is stored in the cache unit 122, the control unit 126 updates the information indicating the priority of the packet to information indicating that the packet is preferentially stored. may For example, when the information indicating the priority of the packet is information indicating that the packet is to be stored with non-priority, the control unit 126 stores the information indicating the priority of the packet as the packet with priority. It may be changed to information indicating that it will be stored as Note that the "discarded packet" in the above description may not be a packet that has already been discarded, but may be a packet that has not yet been discarded and has met the conditions for discarding. A "discarded packet" in the above description may be a packet that has been determined to be discarded but has not yet been discarded.

The scheduling unit 123 receives from the packet processing unit 121 packets to be transmitted to the virtual NIC unit 111 by the packet processing unit 121 and schedules transmission of the received packets to be transmitted to the virtual NIC unit 111 . The scheduling unit 123 receives packets from the virtual NIC unit 111 and transmits the received packets to the packet processing unit 121 . The scheduling unit 123 is implemented by the virtual switch hardware 120 .

FIG. 4 is a block diagram showing an example of the configuration of the scheduling section 123 according to this embodiment. The scheduling unit 123 illustrated in FIG. 4 includes a selection unit 1231 , a shortage counter unit 1232 , a queue unit 1233 and a reception unit 1234 . The number of shortage counter units 1232 and the number of queue units 1233 are the same as the number of virtual communication interface units 111 (that is, virtual NIC units 111). The shortage counter section 1232 and the queue section 1233 are associated on a one-to-one basis. The virtual communication interface unit 111 and the queue unit 1233 are associated on a one-to-one basis.

In the example shown in FIG. 4, the number of shortage counter units 1232 is three, and the number of queue units 1233 is also three. In the following description, these shortage counter units 1232 are simply referred to as shortage counter units 1232 when there is no need to distinguish between the shortage counter units 1232 individually. When it is necessary to distinguish the shortage counter units 1232 individually, these shortage counter units 1232 are denoted as the shortage counter unit 1232A, the shortage counter unit 1232B, and the shortage counter unit 1232C. Similarly, when there is no need to distinguish the queue sections 1233 individually, these queue sections 1233 are simply referred to as queue sections 1233 . When it is necessary to distinguish the queue sections 1233 individually, these queue sections 1233 are referred to as queue section 1233A, queue section 1233B, and queue section 1233C. Shortage counter portion 1232A is associated with queue portion 1233A, shortage counter portion 1232B is associated with queue portion 1233B, and shortage counter portion 1232C is associated with queue portion 1233C. Queue section 1233A is associated with virtual NIC section 111A, queue section 1233B is associated with virtual NIC section 111B, and queue section 1233C is associated with virtual NIC section 111C.

The scheduling unit 123 schedules packets to be transmitted from the packet processing unit 121 to the virtual NIC unit 111 by, for example, a deficit round-robin (DRR) method. However, the method of scheduling packets that the packet processing unit 121 transmits to the virtual NIC unit 111 is not limited to the DRR method. The scheduling unit 123 may schedule according to another scheduling method.

The selection unit 1231 selects a packet to be transmitted next from among the packets stored in the queue unit 1233 by the DRR method. The selection unit 1231 transmits the selected packet to the virtual NIC unit 111 associated with the queue unit 1233 storing the selected packet. For example, the queue unit 1233A is associated with the virtual NIC unit 111A, so when selecting a packet stored in the queue unit 1233A, the selection unit 1231 transmits the selected packet to the virtual NIC unit 111A.

The deficit counter unit 1232 stores a deficit counter (DC) used in the DRR method. Each shortage counter portion 1232 is associated with a different queue portion 1233 .

Each queue unit 1233 stores, as a FIFO, packets transmitted by the packet processing unit 121 toward the virtual NIC unit 111 with which the queue unit 1233 is associated. For example, the queue unit 1233A stores packets that the packet processing unit 121 transmits to the virtual NIC unit 111A associated with the queue unit 1233A. When the queue unit 1233 associated with the virtual NIC unit 111, which is the destination of the packet, is full, the transmitted packet is discarded, for example, by the receiving unit 1234, which will be described later in detail. That is, when there is no space in the storage area of the queue unit 1233 associated with the virtual NIC unit 111, which is the destination of the packet, and no new packet can be stored in the queue unit 1233, the reception unit 1234 discards the packet. do.

The receiving unit 1234 receives packets to be transmitted to the virtual NIC unit 111 from the packet processing unit 121 . The receiving unit 1234 distributes the received packet to one of the queue units 1233 according to the destination of the packet. That is, the reception unit 1234 stores the received packet in the queue unit 1233 associated with the destination of the packet. If the queue unit 1233 associated with the destination of the received packet is full, the reception unit 1234 discards the packet. When a packet is discarded, the scheduling unit 123 (specifically, the reception unit 1234) sends, for example, information indicating that the packet has been discarded and information (for example, a key) of the discarded packet to the control unit 126. Send. The information indicating that the packet has been discarded may be information of the discarded packet itself.

An outline of scheduling by the DRR method is as follows.
(1) Check each queue in a round-robin fashion. In other words, one queue is selected in order from a plurality of queues.
(2) If the selected queue is empty, set the value of the deficit counter to 0, terminate the processing for the selected queue, and proceed to select the next queue.
(3) If the selected queue is not empty, add a predetermined value given in advance to each queue to the value of the shortage counter.
(4) If the length of the first packet in the selected queue is equal to or less than the value of the shortage counter of the queue, the first packet is extracted from the queue, and the extracted packet is sent to the destination (in this embodiment, for example, a virtual one of the NIC units 111).
(5) Subtract the value of the size of the packet dequeued from the selected queue and sent to the destination from the value of the deficit counter of the selected queue.
(6) If the size of the packet at the head of the selected queue is smaller than the value of the deficit counter, terminate the processing for the selected queue and proceed to select the next queue.

A predetermined value given in advance to each queue is denoted as Quantum. The predetermined value given to each queue in advance is also referred to as an adjustment value in the following description. The higher the Quantum given to a queue, the more packets will be sent from that queue. In other words, the greater the Quantum given to a queue, the greater the bandwidth allocated and guaranteed to communication via that queue.

In the scheduling unit 123 , the Quant for the virtual NIC unit 111 (that is, the predetermined value added to the value stored in the shortage counter unit 1232 ) may be given to the selection unit 1231 in advance. Alternatively, it may be provided to the selection unit 1231 by the management device.

FIG. 5 is a schematic diagram showing an example of a configuration when the cache unit 122 is implemented as a cache memory (4-way set associative). The cache unit 122 whose configuration is shown in FIG. 5 basically uses an LRU (Least Recently Used) method as a line replacement policy. The configuration of the cache unit 122 shown in FIG. 5 is an implementation example of the cache unit 122, and the configuration of the cache unit 122 is not limited to the example shown in FIG.

A typical cache memory receives a memory address as input and outputs the cache value of the data stored at that address. The cache unit 122 receives a key (for example, a packet header value used for a rule matching condition) as an input and outputs a rule matching the key.

The cache unit 122 uses a part of the key (for example, a bit string of N bits (N is an integer) from the LSB, denoted as index) for selecting a cache entry in the Way. The cache unit 122 uses the remaining bit string (denoted as Tag) as data corresponding to a frame address in a general cache memory.

One cache entry in cache unit 122 is associated with one rule in rule storage unit 112 . A cache entry in cache unit 122 includes a flag, a tag, and cache data. The cache entry flags of the cache unit 122 include a Used flag indicating whether or not the cache entry is in use, and LRU information, which is information relating to LRU control (that is, control for deleting cache entries according to the LRU method). be In addition, the flag of the cache entry of the cache unit 122 includes a priority flag indicating whether or not the cache entry should be prioritized. Rules are stored as cache data in the cache unit 122 . Note that when a part of the rule is stored as a Tag, the data of the part of the rule stored as the Tag may not be included in the data stored as the cache data.

When the cache unit 122 is referenced by inputting a certain key, the cache unit 122 acquires the index from the input key. In other words, the cache unit 122 extracts the bit string representing the index from the bit string of the input key. The cache unit 122 selects one cache entry from each Way using the acquired index as an identifier. In other words, the cache unit 122 selects one cache entry indicated by the acquired index from each Way. The cache unit 122 acquires Tag from the input key. In other words, the cache unit 122 extracts the bit string representing the Tag from the bit string of the input key. The cache unit 122 compares the acquired Tag with the Tags in the four selected cache entries, and searches for a cache entry with a matching Tag. If an entry containing a Tag that matches the Tag obtained from the key is found, the cache unit 122 determines that a cache hit has occurred, and returns the rule recorded in the found entry.

<<Operation example of the first embodiment>>
Next, an example of the operation of the information processing apparatus 100 described as a configuration example of the present embodiment will be described in detail with reference to the drawings.
(A) Processing received packets.
(B) Processing for transmitting packets.
(C) Scheduling processing.

<<<(A) Processing of received packets>>>
FIG. 6 is a flow chart showing an example of the operation of the information processing apparatus 100 of this embodiment when receiving a packet, that is, the processing of the received packet.

The operation of the information processing apparatus 100 when the packet processing unit 121 receives a packet will be described using the flowchart shown in FIG. The operation shown in FIG. 6 is performed, for example, when the NIC unit 124 transmits a packet received from the outside of the information processing device 100 to the packet processing unit 121, and when the scheduling unit 123 transmits the packet received from the information processing unit 114 to the virtual NIC unit. 111 is sent to the packet processing unit 121, it is started.

The packet processing unit 121 receives a packet (hereinafter also referred to as a processing target packet) from the NIC unit 124 or the scheduling unit 123 (step S100).

From the received packet, the packet processing unit 121 creates a key (hereinafter referred to as a processing target key) that is a value of the packet header and used for the matching condition of the rule (step S101). The packet processing unit 121 may extract a bit string from the header portion of the received packet and use the extracted bit string as a key. The packet processing unit 121 may extract information to be compared with the matching condition of the rule from the header of the received packet, and generate a key indicating the extracted information. The packet processing unit 121 may specify the size of the received packet (that is, packet length).

The packet processing unit 121 transmits the processing target key and packet length of the received packet to the control unit 126, and requests the control unit 126 for a rule suitable for the received packet. The request for a rule matching the received packet may be, for example, requesting the control unit 126 to search for a cache entry of a rule matching the received packet in the cache unit 122 . The control unit 126 first searches for a cache entry of a rule matching the received packet in the cache unit 122 (step S102).

In step S102, if no cache entry of a rule that matches the received packet is found (NO in step S103), control unit 126 acquires a rule that matches the processing target key from rule storage unit 112 (step S104). ). Specifically, the control unit 126 searches the rule storage unit 112 for a rule including a matching condition that matches the processing target key. When the rule storage unit 112 stores a rule including a matching condition that matches the key to be processed, the control unit 126 reads (that is, acquires) the rule from the rule storage unit 112 . The control unit 126 transmits the rule acquired from the rule storage unit 112 to the packet processing unit 121 .

If no rule matching the processing target key is acquired in step S104, that is, if there is no rule matching the processing target key (NO in step S105), the operation of information processing apparatus 100 proceeds to step S108. Transition.

If a rule matching the processing target key can be acquired in step S104 (YES in step S105), the control unit 126 causes the cache unit 122 to store a rule matching the processing target key (hereinafter referred to as a processing target rule). An entry is created (step S106). Details of the operation of step S106 will be described later.

In step S102, if a cache entry of a rule matching the received packet is found (YES in step S103), control unit 126 updates the found cache entry in cache unit 122 (step S107). Details of the operation of step S107 will be described later. The control unit 126 transmits the rule stored in the found cache entry to the packet processing unit 121 .

The packet processing unit 121 processes the processing target packet (step S108). Specifically, when receiving a rule from the control unit 126, the packet processing unit 121 processes the processing target packet based on the received rule. If no rule is received from the control unit 126, that is, if there is no rule matching the processing target key, the packet processing unit 121 discards the processing target packet, for example.

FIG. 7 is a flowchart showing the details of the operation of the information processing apparatus 100 of this embodiment for creating a rule cache entry. The operation shown in FIG. 7 is an example of detailed operation of step S106 shown in FIG.

An example of the operation of the information processing apparatus 100 in step S106 to create a cache entry for the rule read out from the rule storage unit 112 will be described with reference to the flowchart of FIG. At the start of this operation, the control unit 126 receives the key (that is, the key to be processed) received from the packet processing unit 121, and the rule (that is, processing target rule) and packet length. Note that the operation of FIG. 7 will be described below as the operation of the control unit 126 . However, the cache unit 122 may have the function of performing the operations shown in FIG. 7, and may perform some or all of the operations shown in FIG. For example, the cache unit 122 having the configuration shown in FIG. 5 can perform the operation of step S110 below. The operation of step S<b>110 may be the operation of the cache unit 122 . 5, the part that performs the operation shown in FIG. 7 may be part of the implementation of the control unit 126. FIG.

The control unit 126 specifies the cache storage position of the rule that matches the processing target key in the cache unit 122 . That is, the control unit 126 identifies the position of the cache entry in the cache unit 122 in which the rule matching the processing target key is stored (step S110). In the cache unit 122, the control unit 126 may acquire the value of index from the index part of the lower bits of the key to be processed as information indicating the position of the cache entry storing the rule that matches the packet. . The control unit 126 uses the acquired index value to identify a cache entry that matches the processing target key in each Way. A method of specifying a cache entry may be the same as a method of specifying a cache entry in a general cache memory. When the cache unit 122 is realized as a hash table, the control unit 126, for example, calculates the hash value of the processing target key, calculates the remainder obtained by dividing the calculated hash value by the number of Buckets, and the calculated remainder indicates Select Bucket as the Bucket in which the rule that matches the key to be processed is stored.

The control unit 126 confirms whether or not the cache entry specified in step S110 has an empty space (step S111). If cache unit 122 is implemented as a 4-way set associative cache memory, then 4 cache entries are identified in step S110. Each cache entry includes a Used flag in which a value indicating whether or not the cache entry is used is set in the flag field. The control unit 126 checks whether there is an empty entry by referring to the Used flag of each cache entry. A free entry represents a cache entry in which no cache data (that is, cached rules in this embodiment) is stored.

If there is no free entry (NO in step S111), control unit 126 checks whether the packet length is equal to or less than the threshold (step S112). The threshold may be set in advance and given to the controller 126 . The threshold may be set by the management device 300 .

If the packet length is greater than the threshold (NO in step S112), control unit 126 checks whether or not there is a cache entry whose priority flag is off among the cache entries identified in step S110 (step S113). . When the priority flag is off, it indicates that the value of the priority flag is non-priority. Rules that are determined to be stored in the cache unit 122 with less priority are cached in the entry with the priority flag turned off. If there is a cache entry whose priority flag is off (YES in step S113), the operation of information processing apparatus 100 proceeds to step S114. If there is no cache entry with the priority flag turned off (NO in step S113), the information processing apparatus 100 ends the operation shown in FIG. In this case, the control unit 126 does not create a cache entry in which a rule matching the processing target key is stored. That is, the control unit 126 does not cache the rule that matches the packet received by the packet processing unit 121 in the cache unit 122 .

In step S114, the control unit 126 determines an entry to be deleted (hereinafter referred to as a deletion target entry) from among the cache entries specified in step S110, and deletes the determined deletion target entry (step S114 ). Deleting an entry refers to returning the cache entry to a usable state. A cache entry that is ready for use is the free entry described above. The control unit 126 determines the cache entry whose last use time is the oldest among the cache entries whose priority flag is off as the entry to be deleted. The control unit 126 may use the LRU information to identify the cache entry with the earliest last use time.

The control unit 126 deletes the deletion target entry by turning off the Used flag of the cache entry determined as the deletion target entry. If the Used flag for a cache entry is off, the cache entry is free and usable. Turning off the Used flag of a deletion target entry that is in use corresponds to deleting the deletion target entry. By turning off the Used flag of a deletion target entry that is in use, the deletion target entry is deleted, the deletion target cache entry changes to a free entry, and a free entry is created.

The control unit 126 creates a cache entry of a rule that matches the processing target key in the empty entry (that is, the empty entry existing in step S111 or the empty entry created in step S114) (step S115). Specifically, the control unit 126 turns on the Used flag of the cache entry that is an empty entry. Hereinafter, the cache entry created in step S115 will be referred to as a new entry. The control unit 126 sets the Tag acquired from the processing target key in the Tag field of the cache entry (that is, the new entry) whose Used flag is turned on. In other words, the control unit 126 records the Tag data obtained from the target key in the Tag field of the new entry. The control unit 126 sets the processing target rule in the Cache data field of the new entry. In other words, the control unit 126 records the information of the processing target rule in the Cache data field of the new entry. The control unit 126 sets, as the LRU information of the new entry, LRU information indicating that the update is newer than the time of the last update of another cache entry indicated by the index of the new entry. If the packet length of the processing target packet is equal to or less than the threshold value, the control unit 126 sets the priority flag of the new entry to ON, and otherwise sets the priority flag of the new entry to OFF.

FIG. 8 is a flow chart showing an example of the operation of updating the cache entry of the information processing apparatus 100 of this embodiment. The operation shown in FIG. 8 is an example of the operation in step S107 shown in FIG.

An example of the operation of the information processing apparatus 100 in step S107 will be described with reference to the flowchart of FIG. Below, the operation shown in FIG. 8 will be described as the operation by the control unit 126 . All or part of the operations shown in FIG. 8 may be performed by the cache unit 122 .

The control unit 126 updates the LRU information of the entry found in step S102 (that is, the entry in which the rule matching the key received from the packet processing unit 121 is cached) (step S120). The entry found in step S102 is referred to as an entry to be processed. Specifically, in step S120, the control unit 126 sets, in the LRU information of the entry to be processed, LRU information indicating the time when another cache entry indicated by the index of the entry to be processed was last used. do. At that time, the control unit 126 may also change the LRU information of other cache entries indicated by the index of the entry to be processed.

The control unit 126 confirms whether or not the packet length of the packet to be processed is equal to or less than the threshold (step S121).

If the packet length is equal to or less than the threshold (YES in step S121), control unit 126 sets the priority flag of the processing target entry to ON (step S122).

If the packet length is greater than the threshold (NO in step S121), the control unit 126 sets the priority flag of the entry to be processed to off (step S123).

<<<(B) Packet transmission process>>>
FIG. 9 is a flow chart showing an example of the operation of the information processing apparatus 100 of this embodiment for transmitting a received packet.

The operation of the information processing apparatus 100 when the packet processing unit 121 transmits a packet will be described with reference to the flowchart of FIG. The operation shown in FIG. 9 is performed, for example, in step S108 when the packet processing unit 121 performs packet processing based on a rule including a process of "transmitting the packet to the designated NIC unit 124 or virtual NIC unit 111". can be started. For example, in step S108, when the packet processing based on the rule is the processing of "transmitting the packet to the specified NIC unit 124 or virtual NIC unit 111", the operation shown in FIG. 9 is started.

The packet processing unit 121 checks whether the destination of the packet to be processed is any of the virtual NIC units 111 (step S130).

If the destination of the packet to be processed is not the virtual NIC unit 111 (NO in step S130), the destination of the packet to be processed is the NIC unit . In this case, the packet processing unit 121 transmits the processing target packet to the NIC unit 124 (step S131).

If the destination of the packet to be processed is one of the virtual NIC units 111 (YES in step S130), the packet processing unit 121 transmits the identifier of the virtual NIC unit 111, which is the destination, and the packet to be processed to the scheduling unit. 123 (specifically, the reception unit 1234 of the scheduling unit 123). The reception unit 1234 selects the queue unit 1233 associated with the virtual NIC unit 111 indicated by the received identifier (step S132). In the following description, the queue unit 1233 selected in step S132 is referred to as the selected queue and the queue to be processed.

The reception unit 1234 confirms whether the selected queue (that is, the queue to be processed) is full (step S133).

If the processing target queue is full (YES in step S133), the reception unit 1234 discards the processing target packet (step S134). The receiving unit 1234 may transmit the identifier of the discarded packet to be processed to the control unit 126 . Then, the information processing apparatus 100 ends the operation shown in FIG.

If the queue to be processed is not full (NO in step S133), the receiving unit 1234 enqueues the packet to be processed to the queue to be processed (step S135). Then, the information processing apparatus 100 ends the operation shown in FIG.

<<<(C) Scheduling Process>>>
FIG. 10 is a flow chart showing an example of the operation of the information processing apparatus 100 of this embodiment for performing scheduling processing.

The operation when the scheduling unit 123 of the information processing apparatus 100 schedules packets transmitted to the virtual NIC unit 111 by the packet processing unit 121 will be described with reference to the flowchart of FIG. 10 . The scheduling process shown in FIG. 10 represents the operation of transmitting the packet enqueued in step S135 of FIG. 9 to the virtual NIC unit 111, for example.

The selection unit 1231 of the scheduling unit 123 selects one queue unit 1233 as a processing target (step S140). The selection unit 1231 may, for example, repeatedly select all the queue units 1233 in the order of the queue unit 1233A, the queue unit 1233B, and the queue unit 1233C. This selection method is also called round robin. The operation shown in FIG. 10 represents the operation from selection of one queue section 1233 to completion of processing for the selected queue section 1233 . Each time the queue section 1233 is selected, the operation shown in FIG. 10 is performed once. When repeatedly selecting all the queue units 1233 one by one, the information processing apparatus 100 repeatedly performs the operation shown in FIG. In the following description, the selected queue section 1233 is referred to as a queue to be processed.

First, the selection unit 1231 confirms whether or not there is a packet in the queue to be processed (step S141).

If the queue to be processed is empty, that is, if there are no packets in the queue to be processed (NO in step S141), the selection unit 1231 sets the shortage counter value of the queue to be processed to 0 (step S147). The selection unit 1231 sets 0 to the shortage counter value recorded in the shortage counter unit 1232 associated with the queue to be processed. That is, the selection unit 1231 records 0 as the shortage counter value in the shortage counter unit 1232 associated with the queue to be processed. For example, if the queue to be processed is the queue section 1233A, the shortage counter section 1232A is associated with the queue to be processed. In this case, the selection unit 1231 sets the shortage counter value of the shortage counter unit 1232A to zero. Then, the information processing apparatus 100 ends the operation shown in FIG. After completing the operation shown in FIG. 10, the information processing apparatus 100 performs the operation shown in FIG. 10 again, and in step S141 of the operation shown in FIG. You can

If there are packets in the queue to be processed (YES in step S141), the selection unit 1231 acquires (that is, reads) the shortage counter value from the shortage counter unit 1232 associated with the queue to be processed. The selection unit 1231 adds a predetermined value (that is, an adjustment value also written as Quant) assigned to the queue to be processed to the obtained shortage counter value (step S142). The selection unit 1231 selects the updated shortage counter value (that is, the sum of the read shortage counter value and the adjustment value) from the shortage counter value recorded in the shortage counter unit 1232 associated with the queue to be processed. set to That is, the selection unit 1231 supplies the updated shortage counter value (that is, the sum of the read shortage counter value and the adjustment value) to the shortage counter unit 1232 associated with the processing target queue as the shortage counter value. Record.

The selection unit 1231 checks whether or not the shortage counter value of the queue to be processed is equal to or greater than the length of the head packet of the queue to be processed (step S143).

If the shortage counter value of the queue to be processed is smaller than the packet length of the head packet of the queue to be processed (NO in step S143), the information processing apparatus 100 ends the operation shown in FIG.

If the shortage counter value of the processing target queue is greater than or equal to the packet length of the leading packet of the processing target queue (YES in step S143), the selection unit 1231 determines to transmit the leading packet. Then, the selection unit 1231 transmits the leading packet to the virtual NIC unit 111 associated with the processing target queue (step S144). For example, when the processing target queue is the queue unit 1233A, the selection unit 1231 transmits the head packet of the processing target queue to the virtual NIC unit 111A.

The selection unit 1231 subtracts the packet length of the packet transmitted in step S144 from the shortage counter value of the queue to be processed (step S145). The selection unit 1231 sets a value obtained by subtracting the packet length of the packet transmitted in step S144 from the shortage counter value of the queue to be processed as the new shortage counter value of the queue to be processed. The selection unit 1231 records the new shortage counter value in the shortage counter unit 1232 associated with the queue to be processed.

The selection unit 1231 confirms whether or not there is a packet in the processing target queue (step S146). If there is a packet in the queue to be processed (YES in step S146), the operation of information processing apparatus 100 proceeds to step S143.

If the queue to be processed is empty, that is, if there is no packet in the queue to be processed (NO in step S146), the operation of information processing apparatus 100 proceeds to step S147. That is, the selection unit 1231 records 0 as the shortage counter value in the shortage counter unit 1232 associated with the queue to be processed. Then, the information processing apparatus 100 ends the operation shown in FIG.

As described in detail above, the information processing apparatus 100 of the present embodiment has the configuration described below, thereby obtaining the effects described below.

According to this embodiment, the information processing apparatus 100 can be realized by the computer 10 having the memory 102, the virtual switch hardware 120, and the bus 103B connecting them. The information processing apparatus 100 includes a rule storage unit 112 that stores FIB, which is a set of rules that define packet processing methods. Rule storage unit 112 is implemented by memory 102 . The information processing apparatus 100 includes a packet processing unit 121 that refers to the FIB to determine and process a packet processing method. The packet processing unit 121 is implemented by the virtual switch hardware 120 . That is, in the information processing apparatus 100, the data system communication and the control system communication performed during packet processing share the bus 103B. The information processing apparatus 100 includes a control unit 126 that caches rules acquired from the rule storage unit 112 in the cache unit 122, and a scheduling unit 123 that performs QoS control. The cache unit 122 is implemented by the virtual switch hardware 120 . The decision unit 125 decides to preferentially store rules relating to small packets in the cache unit 122 as a cache.

As a result, it is possible to reduce consumption of the bandwidth of the bus (that is, the bus 103B) due to control system communication (reading of rules from the rule storage unit 112). It is known that the number of times small packets are processed is greater than the number of times large packets are processed, and small packets generate a large number of control-related communications. Therefore, by preferentially caching small packets, it is possible to improve the effect of reducing bandwidth consumption by using the cache.

Therefore, according to the present embodiment, even when data system communication and control system communication related to packet processing share a bus, deterioration in accuracy of QoS control can be suppressed.

In the example described above, the scheduling unit 123 performs QoS control on the packets that the packet processing unit 121 transmits to the virtual NIC unit 111 . Packets subjected to QoS control are not limited to the above examples. The scheduling unit 123 may perform QoS control on packets that the packet processing unit 121 receives from the virtual NIC unit 111, for example.

Also, in the example described above, the priority of the cache entry stored by the cache unit 122 is represented by a 1-bit priority flag. However, the value representing priority is not limited to the priority flag. The priority may be represented by, for example, a multi-bit counter (hereinafter referred to as a priority counter). By making the following changes to the information processing apparatus 100 of this embodiment described above, the information processing apparatus 100 that uses a priority counter instead of a priority flag can be realized.
(1) Store a priority counter instead of a priority flag in the cache entry.
(2) In a situation where the priority flag is turned on (for example, step S122 shown in FIG. 8), the priority counter is incremented.
(3) Decrement the priority counter in a situation where the priority flag is turned off (for example, step S123 shown in FIG. 8).
(4) "Existence of an entry whose priority counter is equal to or less than a predetermined value" is used instead of "Existence of an entry whose priority flag is off" as a condition for determination in step S113.
(5) In step S114, among the entries whose priority counter is less than or equal to a predetermined value, the entry with the oldest time of last use is determined as the entry to be deleted.

The "predetermined value" mentioned above may be zero. Also, the value of the priority counter may be controlled so as not to become negative. In this case, "an entry whose priority counter is less than or equal to a predetermined value" is an entry whose priority counter is zero.

<Second embodiment>
In the second embodiment of the present invention, the scheduling unit 123 of the information processing device 100 performs QoS control in consideration of the overhead (that is, bus consumption due to control system communication) that occurs with packet processing. to suppress the deterioration of the accuracy of The overhead can also be rephrased as communication load.

Below, this embodiment will be described in detail with reference to the drawings. In each drawing referred to in the description of this embodiment, the same reference numerals are assigned to the same configurations and steps that operate in the same manner as in the first embodiment of the present invention, and the detailed description in this embodiment omitted.

<<Configuration Example of Second Embodiment>>
The configuration of the information processing apparatus 100 of this embodiment is the same as the configuration of the information processing apparatus 100 of the first embodiment described using FIGS. 2 to 5, except for the following differences.

In addition to the rule information, the control unit 126 of the present embodiment stores information indicating whether or not the rule has a cache hit (that is, information indicating whether or not the rule information has been read from the cache unit 122). is transmitted to the packet processing unit 121 .

The packet processing unit 121 receives, from the control unit 126, information indicating whether or not the rule is a cache hit in addition to the rule information. When the processing of a packet based on a rule is transmission to the virtual NIC unit 111, the packet processing unit 121 stores, in addition to the packet, information indicating whether or not the rule used to process the packet hits the cache. , to the scheduling unit 123 . In this case, the packet processing unit 121 specifically transmits the packet and information indicating whether or not the rule used to process the packet hits the cache to the receiving unit 1234 of the scheduling unit 123 .

The receiving unit 1234 stores in the queue unit 1233, in addition to the packet, information indicating whether or not the rule used to process the packet hits the cache.

In addition to the packet, the queue unit 1233 of this embodiment also stores information indicating whether or not the rule used for processing the packet by the packet processing unit 121 has hit the cache.

The selecting unit 1231 further determines whether to transmit the leading packet to the virtual NIC unit 111 based on the value of the overhead associated with reading from the rule storage unit 112 of the rule that matches the leading packet stored in the queue unit 1233. Decide whether or not

<<Operation example of the second embodiment>>
Next, an example of the following operation in the information processing apparatus 100 of this embodiment will be described in detail with reference to the drawings.
(A) Processing received packets.
(B) Processing for transmitting packets.
(C) Scheduling processing.

<<<(A) Processing of received packets>>>
FIG. 6 is a flowchart showing the operation of processing received packets of the information processing apparatus 100 of this embodiment. The operation of the information processing apparatus 100 of this embodiment for processing a received packet (that is, the operation when the packet processing unit 121 receives a packet) is the same as that of the information processing apparatus 100 of the first embodiment for processing a received packet. is similar to the operation of processing

The control unit 126 of the present embodiment may include information indicating whether or not the rule is a cache hit in response to a request for a rule matching the received packet from the packet processing unit 121 in step S102, for example. For example, in step S104, in addition to the rule acquired from the rule storage unit 112, the control unit 126 may transmit to the packet processing unit 121 information indicating that the rule did not hit the cache. For example, in step S107, the control unit 126 may transmit to the packet processing unit 121, in addition to the rule read from the cache unit 122, information indicating that the rule has hit the cache.

<<<(B) Process for sending packets>>>
FIG. 11 is a flow chart showing an example of processing for transmitting a received packet of the information processing apparatus 100 of this embodiment.

The operation of transmitting a packet by the packet processing unit 121 of the information processing apparatus 100 of this embodiment will be described using the flowchart shown in FIG. For example, the operation shown in FIG. , can be started. For example, in step S108, when the packet processing based on the rule is "transmitting the packet to the specified NIC unit 124 or virtual NIC unit 111", the operation shown in FIG. 11 is started. Differences between the information processing apparatus 100 of the first embodiment shown in FIG. 9 and the information processing apparatus 100 of the present embodiment will be mainly described below in the operation of transmitting packets. When transmitting a packet, the information processing apparatus 100 of the present embodiment performs the same operation as the packet transmitting operation of the information processing apparatus of the first embodiment, except for differences described below.

If the destination of the packet is one of the virtual NIC units 111 (YES in step S 130 ), the packet processing unit 121 passes the packet to the receiving unit 1234 of the scheduling unit 123 . In addition to the packet, the packet processing unit 121 of this embodiment passes information obtained from the control unit 126 indicating whether or not the rule matching the packet has hit the cache to the receiving unit 1234 of the scheduling unit 123 . The receiving unit 1234 receives from the packet processing unit 121 a packet and information indicating whether or not a rule matching the packet has hit the cache. A packet received by the reception unit 1234 from the packet processing unit 121 is referred to as a processing target packet. In the description of FIG. 11 , a processing target packet represents a packet received by the reception unit 1234 from the packet processing unit 121 .

If the processing target queue selected in step S132 is full (YES in step S133), the receiving unit 1234 creates a key (that is, processing target key) that is the value of the packet header from the received packet. (Step S236). The processing target key is information for determining whether the match condition included in the rule is met. The processing target key created by the reception unit 1234 may be the same as the processing target key created by the packet processing unit 121 . The receiving unit 1234 may receive the processing target key from the packet processing unit 121 instead of generating the processing target key in step S236. For example, when the destination of the packet is one of the virtual NICs (YES in step S130), the packet processing unit 121 transmits the packet (that is, the processing target packet) and the processing target key to the reception unit 1234. may The receiving unit 1234 may receive a processing target key from the packet processing unit 121 in addition to the processing target packet. In step S<b>236 , the reception unit 1234 may receive the processing target key of the processing target packet from the packet processing unit 121 . Specifically, the reception unit 1234 may request the packet processing unit 121 to transmit the processing target key of the processing target packet. Upon receiving the request for the processing target key of the processing target packet from the receiving unit 1234 , the packet processing unit 121 may transmit the requested processing target key of the processing target packet to the receiving unit 1234 . Then, the reception unit 1234 may receive the processing target key of the processing target packet from the packet processing unit 121 .

The reception unit 1234 transmits the processing target key and the packet length of the processing target packet to the control unit 126 . The control unit 126 receives the processing target key and the packet length of the processing target packet from the scheduling unit 123 (specifically, the receiving unit 1234). Then, the control unit 126 searches the cache unit 122 for a cache entry of a rule matching the received key to be processed (step S237). For example, if the packet length of the received packet to be processed is greater than the above threshold, the control unit 126 may determine that there is no cache entry for a rule that matches the key to be processed. The control unit 126 may search for a cache entry of a rule matching the received key to be processed when the length of the received packet is equal to or less than the above threshold.

As a result of the search in step S237, if there is no cache entry of a rule matching the processing target key (NO in step S238), the operation of information processing apparatus 100 proceeds to step S134.

As a result of the search in step S237, if there is a cache entry with a rule that matches the processing target key, the control unit 126 sets the priority flag of the found cache entry stored in the cache unit 122 to ON ( step S239).

If the queue to be processed is not full (NO in step S133), the receiving unit 1234 enqueues the packet to be processed to the queue to be processed (step S235). At that time, the reception unit 1234 also enqueues information indicating whether or not the rule matching the processing target packet, which is received from the packet processing unit 121, has hit the cache to the processing target queue.

<<<(C) Scheduling process>>>
FIG. 12 is a flow chart showing an example of the operation of the information processing apparatus 100 of this embodiment for performing scheduling processing.

The operation of the scheduling unit 123 of the information processing apparatus 100 according to the present embodiment when performing scheduling processing for packets transmitted to the virtual NIC unit 111 by the packet processing unit 121 will be described with reference to the flowchart of FIG. 12 . In the following, mainly differences in operation of scheduling processing between the scheduling unit 123 of this embodiment and the scheduling unit 123 of the first embodiment will be described. It should be noted that the information processing apparatus 100 of the present embodiment performs the same operation as the information processing apparatus 100 of the first embodiment except for the differences described below when performing scheduling processing.

The operations from step S140 to step S142 are the same as the operations from step S140 to step S142 of the first embodiment shown in FIG.

Next, the selection unit 1231 determines a value indicating overhead (in the following description, simply referred to as overhead) based on information indicating whether or not a rule matching the target packet has hit the cache. In the following description of step S243, the value indicating overhead is also simply referred to as "overhead". Information indicating whether or not a rule matching a packet to be processed has hit the cache is referred to as cache hit information.

The selection unit 1231 confirms whether or not the shortage counter value of the queue to be processed is equal to or greater than the sum of the packet length of the head packet of the queue to be processed and the determined overhead (step S243). If the cache hit information described above indicates that a rule matching the packet to be processed has hit the cache, the selection unit 1231 uses 0 as overhead. In other words, the selection unit 1231 determines 0 as the overhead. When the packet is processed by the packet processing unit 121, 0 is set when there is a cache hit. uses a predetermined value as overhead. In other words, selection section 1231 determines the overhead to be a predetermined value. The predetermined value may be an average rule size, an average bandwidth consumption of the bus necessary for accessing the rule storage unit 112, or the like, which is obtained in advance.

The scheduling unit 123 may determine the overhead based on the rule size. In that case, for example, when transmitting a packet to be processed to the scheduling unit 123 , the packet processing unit 121 may transmit to the scheduling unit 123 the size of the rule that matches the packet to be processed. The scheduling unit 123 may determine the overhead as the bandwidth consumption of the bus when the rule is read from the rule storage unit 112 . In this case, for example, the control unit 126 may derive the consumed amount of the bandwidth of the bus when the rule is read from the rule storage unit 112 and transmit the derived consumed amount to the packet processing unit 121 . The packet processing unit 121 may receive the consumption amount from the control unit 126 and transmit the received consumption amount to the scheduling unit 123 . In these cases, for example, cache hit information (that is, information indicating whether or not a rule matching the target packet has hit the cache) may be a value set as overhead. The cache hit information may be, for example, the size of the rule read via the bus, or the bandwidth consumption of the bus when reading the rule. In that case, if the value of the cache hit information is 0, the cache hit information indicates that the rule matching the packet has hit the cache. If the value of the cache hit information is a value other than 0, the cache hit information indicates that the rule matching the packet did not hit the cache. The scheduling section 123 may determine the overhead regardless of the above examples.

If the value of the shortage counter is smaller than the sum of the packet length of the packet to be processed and the overhead (NO in step S243), information processing apparatus 100 ends the operation shown in FIG.

If the value of the shortage counter is greater than or equal to the sum of the packet length of the packet to be processed and the overhead (YES in step S243), the selection unit 1231 reads the head packet from the queue to be processed. The selection unit 1231 transmits the read first packet to the virtual NIC unit 111 associated with the processing target queue (step S144).

Next, the selection unit 1231 subtracts the packet length of the packet transmitted in step S144 and the overhead value from the shortage counter value of the queue to be processed (step S245). The selection unit 1231 assigns a value obtained by subtracting the packet length of the transmitted packet and the overhead value from the shortage counter value of the processing target queue to the shortage counter unit 1232 associated with the processing target queue as a new shortage count. Store as a value.

The operations of steps S146 and S147 of this embodiment are the same as those of steps S146 and S147 of the first embodiment.

As described in detail above, in the present embodiment, the scheduling unit 123 performs QoS control in consideration of overhead (that is, bus consumption due to control system communication) that occurs with packet processing. In addition, the control unit 126 preferentially caches rules regarding packets discarded by the scheduling unit 123 and stores them in the cache unit 122 . This makes it possible to suppress deterioration in accuracy of QoS control.

(Modification of Second Embodiment)
In the above description, the overhead used in steps S243 and S245 is a fixed value (that is, a value that does not change with the state of bus 103B). However, the overhead is not limited to the above examples.

The selector 1231 may, for example, dynamically determine the overhead according to the state of the bus 103B. Specifically, the selection unit 1231 may determine overhead as follows, for example.

For example, the control section 126 may have a function of measuring the performance of the bus 103B. The performance of bus 103B may be, for example, utilization. The control unit 126 may transmit the obtained utilization rate of the bus 103B to the scheduling unit 123 (specifically, the selection unit 1231).

The selection unit 1231 may receive the utilization rate of the bus 103B, for example, from the control unit 126, and determine the overhead value based on the received utilization rate.

For example, when the received utilization rate is less than a predetermined threshold, the selection unit 1231 sets the overhead value to the first value, and when the received utilization rate is equal to or higher than the predetermined threshold value, sets the overhead value to the second value. The value of the overhead may be switched so that the value of

The selection unit 1231 may switch overhead values based on, for example, a predetermined table including a plurality of sets of utilization rate ranges and overhead values associated with the ranges. The selection unit 1231 may, for example, determine the overhead value associated with the utilization rate range including the received utilization rate in the table as the overhead value to be used.

The selector 1231 may determine the overhead value using a predetermined function that takes the utilization rate as an input. The selection unit 1231 may use the obtained utilization rate as an input, calculate the output value of the above function, and determine the calculated output value as the overhead value.

<Third Embodiment>
<<Configuration of the Third Embodiment>>
Next, a third embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 14 is a block diagram showing an example of the configuration of an information processing device 500 according to this embodiment.

In the example illustrated in FIG. 14 , the information processing device 500 includes a determination section 125 and a control section 126 . The control unit 126 may be connected to the cache unit 122 so as to be accessible. The determining unit 125 indicates at least one of a plurality of types of processing including transfer for data, and determines whether to store in the cache unit 122 a rule read out via a communication path used for transferring the data. A decision is made based on the size of the data. The control unit 126 stores the rule determined to be stored in the cache unit 122 . The cache unit 122 stores rules. The data of this embodiment correspond to the packets of the first and second embodiments. The communication path of this embodiment corresponds to the bus 103B of the first embodiment.

<<Operation of Third Embodiment>>
Next, the operation of the information processing apparatus 500 according to this embodiment will be described in detail with reference to the drawings.

FIG. 15 is a flow chart showing an example of the operation of the information processing device 500 according to this embodiment.

First, the determination unit 125 determines whether to store a rule indicating processing for data in the cache unit 122 based on the size of the data (step S500). In other words, the determination unit 125 determines whether to store a rule that matches the data in the cache unit 122 based on the size of the data. When determining unit 125 determines to store the rule in cache unit 122 (YES in step S501), control unit 126 stores the rule in cache unit 122 (step S502). When determining unit 125 determines not to store the rule in cache unit 122 (NO in step S501), control unit 126 does not store the rule in cache unit 122, and the operation shown in FIG. 15 ends.

As described above, it is known that the smaller the data size of a packet, the more times the data (ie, packet) is processed. Therefore, the smaller the size of the packet, the greater the number of readouts of the rules used during processing. When the communication path (e.g., bus) used for sending data (i.e., packets) and the communication path used for reading rules are common, i.e., data communication and control communication use the same communication path. In the case of sharing, the smaller the packet size, the more control-related communications and the smaller the bandwidth that can be used for data-related communications. However, by storing a rule suitable for small size packets in the cache unit 122 and reading it from the cache unit 122 when processing small size packets, the amount of control system communication can be reduced. By reducing the amount of control-related communication, the bandwidth that can be used for data-related communication that shares a communication path with control-related communication increases. Therefore, it is possible to suppress the deterioration of the accuracy of QoS control due to the limitation of the band that can be used for data communication.

Therefore, the present embodiment described above has the effect of being able to suppress the deterioration of the accuracy of QoS control even when data system communication and control system communication related to packet processing share a bus.

<Other embodiments>
Some or all of the above embodiments may also be described in the following additional remarks, but are not limited to the following.

(Appendix 1)
indicating at least one of a plurality of types of processing including transfer for data, and determining whether or not to store rules read out via a communication path used for transferring the data in the cache means; a determining means based on the size of the data;
control means for storing the rules determined to be stored in the cache means;
Information processing device.

(Appendix 2)
The information processing apparatus according to appendix 1, wherein the control means makes the determination such that the rule is preferentially stored in the cache means when the size of the data is smaller than a predetermined standard.

(Appendix 3)
3. The method according to appendix 1 or 2, further comprising scheduling means for controlling a communication band for transferring the data based on a communication load through the communication path caused by specifying the processing to be performed on the data. information processing equipment.

(Appendix 4)
The information processing apparatus according to appendix 3, wherein the communication load includes an amount of communication via the communication path caused by reading the rule.

(Appendix 5)
Further comprising measuring means for measuring the utilization rate of the communication path,
5. The information processing apparatus according to appendix 3 or 4, wherein the scheduling means controls the band further based on the usage rate.

(Appendix 6)
The scheduling means determines whether or not the communication load has occurred based on whether or not the rule of the data has been stored in the cache means, and based on the result of the determination, The information processing apparatus according to any one of appendices 3 to 5.

(Appendix 7)
execution means for providing a plurality of virtual machines and a plurality of virtual network interfaces each operating as one network interface of the plurality of virtual machines;
a communication means for relaying communication with an external communication network;
Data is received via the communication means, a request is made to the control means for the rule that matches the received data, and the processing indicated by the rule returned in response to the request is performed on the received data. a processing means;
a rule storage means for storing the rule;
further comprising
When the rule that matches the data is requested, the control means reads the rule from the cache means if the rule is stored in the cache means, and the rule is not stored in the cache means. read the rule from the rule storage means, return the read rule,
The processing means sends the data to the scheduling means when the processing to be performed on the data indicated by the returned rule is transfer to one of the plurality of virtual machines;
said scheduling means comprising a plurality of temporary storage areas each associated with one of said plurality of virtual machines, said data being transferred to a temporary storage area associated with said virtual machine upon receipt of said data; storing the data, transmitting the data read from the temporary storage area to the virtual machine to which the data is transferred via the communication path, and further specifying the processing to be performed on the data 7. The information processing apparatus according to any one of appendices 3 to 6, wherein the bandwidth is controlled by determining whether or not to read data from the temporary storage area based on the communication load that has occurred.

(Appendix 8)
When the data is discarded and the rule of the data is stored in the cache means, the control means sets the rule so that the rule is preferentially held in the cache means. The information processing device according to any one of .

(Appendix 9)
indicating at least one of a plurality of types of processing including transfer for data, and determining whether or not to store rules read out via a communication path used for transferring the data in the cache means; a determining means based on the size of the data;
control means for storing the rules determined to be stored in the cache means;
Information processing device.

(Appendix 10)
The information processing apparatus according to appendix 9, wherein the control means makes the determination such that the rule is preferentially stored in the cache means when the size of the data is smaller than a predetermined standard.

(Appendix 11)
11. The method according to appendix 9 or 10, further comprising scheduling means for controlling a communication band for transferring the data based on a communication load through the communication path caused by specifying the processing to be performed on the data. information processing equipment.

(Appendix 12)
12. The information processing apparatus according to appendix 11, wherein the communication load includes an amount of communication via the communication path caused by reading the rule.

(Appendix 13)
Further comprising measuring means for measuring the utilization rate of the communication path,
13. The information processing apparatus according to appendix 11 or 12, wherein the scheduling means controls the band further based on the usage rate.

(Appendix 14)
The scheduling means determines whether or not the communication load has occurred based on whether or not the rule of the data has been stored in the cache means, and based on the result of the determination, 14. The information processing apparatus according to any one of appendices 11 to 13.

(Appendix 15)
execution means for providing a plurality of virtual machines and a plurality of virtual network interfaces each operating as one network interface of the plurality of virtual machines;
a communication means for relaying communication with an external communication network;
Data is received via the communication means, a request is made to the control means for the rule that matches the received data, and the processing indicated by the rule returned in response to the request is performed on the received data. a processing means;
a rule storage means for storing the rule;
further comprising
When the rule that matches the data is requested, the control means reads the rule from the cache means if the rule is stored in the cache means, and the rule is not stored in the cache means. read the rule from the rule storage means, return the read rule,
The processing means sends the data to the scheduling means when the processing to be performed on the data indicated by the returned rule is transfer to one of the plurality of virtual machines;
said scheduling means comprising a plurality of temporary storage areas each associated with one of said plurality of virtual machines, said data being transferred to a temporary storage area associated with said virtual machine upon receipt of said data; storing the data, transmitting the data read from the temporary storage area to the virtual machine to which the data is transferred via the communication path, and further specifying the processing to be performed on the data 15. The information processing apparatus according to any one of appendices 11 to 14, wherein the bandwidth is controlled by determining whether or not to read data from the temporary storage area based on the communication load that has occurred.

(Appendix 16)
When the data is discarded and the rule of the data is stored in the cache means, the control means sets the rule so that the rule is preferentially held in the cache means. The information processing device according to any one of .

(Appendix 17)
indicating at least one of a plurality of types of processing including transfer for data, and determining whether or not to store rules read out via a communication path used for transferring the data in the cache means; a determining means based on the size of the data;
control means for storing the rules determined to be stored in the cache means;
Information processing device.

(Appendix 18)
18. The information processing apparatus according to appendix 17, wherein the control means makes the determination such that the rule is preferentially stored in the cache means when the size of the data is smaller than a predetermined standard.

(Appendix 19)
19. The method according to appendix 17 or 18, further comprising scheduling means for controlling a bandwidth of communication for transferring the data based on a communication load through the communication path caused by specifying the processing to be performed on the data. information processing equipment.

(Appendix 20)
20. The information processing apparatus according to appendix 19, wherein the communication load includes an amount of communication via the communication path caused by reading the rule.

(Appendix 21)
Further comprising measuring means for measuring the utilization rate of the communication path,
21. The information processing apparatus according to appendix 19 or 20, wherein the scheduling means controls the band further based on the usage rate.

(Appendix 22)
The scheduling means determines whether or not the communication load has occurred based on whether or not the rule of the data has been stored in the cache means, and based on the result of the determination, 22. The information processing apparatus according to any one of appendices 19 to 21.

(Appendix 23)
execution means for providing a plurality of virtual machines and a plurality of virtual network interfaces each operating as one network interface of the plurality of virtual machines;
a communication means for relaying communication with an external communication network;
Data is received via the communication means, a request is made to the control means for the rule that matches the received data, and the processing indicated by the rule returned in response to the request is performed on the received data. a processing means;
a rule storage means for storing the rule;
further comprising
When the rule that matches the data is requested, the control means reads the rule from the cache means if the rule is stored in the cache means, and the rule is not stored in the cache means. read the rule from the rule storage means, return the read rule,
The processing means sends the data to the scheduling means when the processing to be performed on the data indicated by the returned rule is transfer to one of the plurality of virtual machines;
said scheduling means comprising a plurality of temporary storage areas each associated with one of said plurality of virtual machines, said data being transferred to a temporary storage area associated with said virtual machine upon receipt of said data; storing the data, sending the data read from the temporary storage area to the virtual machine to which the data is transferred via the communication path, and further specifying the processing to be performed on the data 23. The information processing apparatus according to any one of attachments 19 to 22, wherein the bandwidth is controlled by determining whether or not to read data from the temporary storage area based on the communication load that has occurred.

(Appendix 24)
When the data is discarded and the rule of the data is stored in the cache means, the control means sets the rule so that the rule is preferentially held in the cache means. The information processing device according to any one of .

Although the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

1 information processing system 10 computer 100 information processing device 101 CPU
102 memory 103A bus 103B bus 103C bus 103D bus 104 NIC
105 storage device 106 access device 107 storage medium 110 CPU and memory 110A execution unit 111 virtual communication interface unit (virtual NIC unit)
112 rule storage unit 113 rule management unit 114 information processing unit 115 instruction reception unit 120 virtual switch hardware 121 packet processing unit 122 cache unit 123 scheduling unit 124 communication interface unit (NIC unit)
125 determination unit 126 control unit 200 host machine 210 CPU and main memory 211 virtual NIC
212 FIBs
214 virtual machine (VM)
220 HW for virtual switch
221 virtual switch 230 bus 240 NIC
300 management device 400 communication network 500 information processing device 1231 selection unit 1232 shortage counter unit 1233 queue unit 1234 reception unit

Claims (9)

indicating at least one of a plurality of types of processing including transfer for data, and determining whether or not to store rules read out via a communication path used for transferring the data in the cache means; determining means for preferentially storing said rule in said caching means when the size of data is smaller than a predetermined criterion ;
control means for storing the rules determined to be stored in the cache means;
a communication means for relaying communication with an external communication network;
receiving the data via the communication means, requesting the control means for the rule conforming to the received data, and performing the processing indicated by the rule returned in response to the request for the received data a processing means for performing
A rule storage means for storing the rule ,
When the rule that matches the data is requested, the control means reads the rule from the cache means if the rule is stored in the cache means, and the rule is not stored in the cache means. case, reading the rule from the rule storage means via the communication path, and returning the read rule . 2. The scheduling means according to claim 1, further comprising scheduling means for controlling a bandwidth of communication for transferring said data based on a communication load through said communication path caused by specifying said processing to be performed on said data. Information processing equipment. The information processing apparatus according to claim 2 , wherein the communication load includes an amount of communication via the communication path caused by reading the rule. Further comprising measuring means for measuring the utilization rate of the communication path,
4. The information processing apparatus according to claim 2 , wherein said scheduling means controls said band further based on said usage rate. The scheduling means determines whether or not the load of the communication has occurred based on whether the rule of the data is stored in the cache means, and based on the result of the determination, determines whether the communication 5. The information processing apparatus according to any one of claims 2 to 4 , which controls a band of . Further comprising execution means for providing a plurality of virtual machines and a plurality of virtual network interfaces each operating as one network interface of the plurality of virtual machines ,
The processing means sends the data to the scheduling means when the processing to be performed on the data indicated by the returned rule is transfer to one of the plurality of virtual machines;
said scheduling means comprising a plurality of temporary storage areas each associated with one of said plurality of virtual machines, said data being transferred to a temporary storage area associated with said virtual machine upon receipt of said data; storing the data, transmitting the data read from the temporary storage area to the virtual machine to which the data is transferred via the communication path, and further specifying the processing to be performed on the data 6. The information processing apparatus according to any one of claims 2 to 5 , wherein the bandwidth is controlled by determining whether or not to read data from the temporary storage area based on the communication load that has occurred. 2. When the data is discarded and the rule of the data is stored in the cache means, the control means sets the rule so that the rule is preferentially held in the cache means. 7. The information processing device according to any one of 6 . The information processing device
indicating at least one of a plurality of types of processing including transfer for data, and determining whether or not to store rules read out via a communication path used for transferring the data in the cache means; If the data size is smaller than a predetermined standard, the rule is preferentially stored in the cache means ;
storing the rule determined to be stored in the cache means;
receiving the data via a communication means for communicating with an external communication network, requesting the rule that conforms to the received data, and performing the processing indicated by the rule returned in response to the request; against
when the rule that matches the data is requested, if the rule is stored in the cache means, the rule is read from the cache means; if the rule is not stored in the cache means, the rule is read, read out from the rule storage means for storing the rule through the communication path, and return the read rule
Information processing methods. to the computer,
indicating at least one of a plurality of types of processing including transfer for data, and determining whether or not to store rules read out via a communication path used for transferring the data in the cache means; a determination process for preferentially storing the rule in the cache means when the size of the data is smaller than a predetermined standard ;
a control process of storing the rule determined to be stored in the cache means;
receiving the data via a communication means for communicating with an external communication network, requesting the rule that conforms to the received data, and performing the processing indicated by the rule returned in response to the request; the processing to be performed on the
when the rule that matches the data is requested, if the rule is stored in the cache means, the rule is read from the cache means; if the rule is not stored in the cache means, the rule is read, a process of reading the rule from the rule storage means for storing the rule through the communication path and returning the read rule;
program to run.

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