JP7730752B2 - Electronic circuit board - Google Patents

Description

This invention relates to an electronic circuit board on which an asymmetric half-bridge circuit serving as a three-phase inverter circuit is mounted, for example as a drive device for a switched reluctance motor.

Switched reluctance motors (also known as SR motors) have been attracting attention in recent years as a drive source for a variety of devices because they do not require permanent magnets containing rare earths. In SR motors, current is applied independently to each of the three phase coils (U, V, and W), for example, so an asymmetric half-bridge circuit is used as the three-phase inverter circuit that drives the SR motor (see Patent Document 1).

Patent Document 2 discloses a circuit board mounted with a three-phase inverter circuit that serves as the drive circuit for a three-phase brushless motor. The first electronic component, which comprises three resin-molded semiconductor switching elements that form the upper arm, and the second electronic component, which comprises three resin-molded semiconductor switching elements that form the lower arm, are arranged facing each other on the front and back of the circuit board, with a through-hole provided in the board between them.

International Publication No. 2018/084092 JP 2016-129461 A

As disclosed in Patent Document 1, for example, Figure 13, an asymmetric half-bridge circuit requires output wiring from each of the six switching elements to a load (e.g., the coil of an SR motor). Therefore, when an asymmetric half-bridge circuit is mounted on a printed wiring board, a total of six output wiring patterns are printed and formed, for example, between each switching element and the six terminals of a connector provided on the wiring board.

Inverter circuits used in motor drive circuits and the like generally suffer from noise generation on the output side. To suppress this noise, it is preferable to make each output wiring pattern thick and short so as to reduce impedance. However, when six output wiring patterns are laid out between six semiconductor switching elements mounted on a printed wiring board and a connector, each output wiring pattern tends to be thin. This causes noise problems due to the current flowing through these six output wiring patterns.

Patent Document 2 describes a technology that aims to improve the heat dissipation of a motor drive circuit by taking advantage of the fact that the first electronic component and the second electronic component are not energized at the same time, but does not give any consideration to noise suppression in an asymmetric half-bridge circuit.

The purpose of this invention is to provide an electronic circuit board that implements an asymmetric half-bridge circuit to suppress noise in the output wiring pattern.

In one aspect, the present invention provides an electronic circuit board having an asymmetrical half-bridge circuit that serves as a three-phase inverter circuit mounted on a multilayer wiring board having a first surface and a second surface,
A connector having six terminals arranged in a row is attached to one side edge of the multilayer wiring board,
two switching elements constituting each phase are respectively arranged on the first surface and the second surface , and the two switching elements constituting each phase are arranged at positions that overlap each other when projected in a stacking direction of the multilayer wiring board ,
The three switching elements on each of the first surface and the second surface are arranged in a straight line toward the connector.
Output wiring patterns extending from the two switching elements on the first and second surfaces toward the terminals are respectively wired on different layers of the multilayer wiring board, and each output wiring pattern has a trapezoidal shape that expands toward an adjacent pair of terminals, has a notch at its tip edge to avoid contact with one of the terminals, and is arranged so that when projected in the stacking direction of the multilayer wiring board, the entire pattern except for the notched portion overlaps with each other.

According to this invention, currents flow simultaneously and in opposite directions in the two overlapping output wiring patterns when projected in the stacking direction of the multilayer wiring board, causing the magnetic fields generated by each to cancel each other out, thereby suppressing noise. Furthermore, since the six switching elements are arranged in groups of three on each of the first and second surfaces, it is easy to layout relatively wide output wiring patterns.

FIG. 1 is a circuit diagram showing an example of an asymmetric half-bridge circuit. FIG. 2 is a diagram illustrating the configuration of an SR motor. 1A and 1B are explanatory views showing a main part of an electronic circuit board according to a first embodiment, in which (a) a first surface and (b) a second surface are compared. 3A and 3B are explanatory diagrams of current flow and magnetic field in the electronic circuit board of the first embodiment. 5A and 5B are explanatory diagrams of current flow and magnetic field in a cross section perpendicular to the longitudinal direction of the output wiring pattern according to the first embodiment .

An embodiment of the present invention applied to an SR motor drive device will be described below with reference to the drawings. First, an outline of the SR motor and the asymmetric half-bridge circuit that serves as the three-phase inverter circuit that drives the SR motor will be described. Figure 2 shows a typical 4-pole, 6-slot SR motor M. This SR motor M is composed of a rotor 1 with four salient poles, for example, made of laminated electromagnetic steel sheets, and a stator 2 with six salient poles and coils C1 to C6. Coils C1 and C2, which are positioned opposite each other, are connected in series to each other, for example, as a U-phase coil. Similarly, coils C3 and C4, which are positioned opposite each other, are connected in series to each other as a V-phase coil, and coils C5 and C6 are connected in series to each other as a W-phase coil. The coils of the U, V, and W phases are independent and not connected to each other, and are individually energized by the asymmetric half-bridge circuit illustrated in Figure 1. Rotor 1 of the SR motor M rotates by sequentially energizing the coils of the U, V, and W phases.

The example asymmetric half-bridge circuit shown in Figure 1 includes six semiconductor switching elements S1 to S6 each connected between the positive and negative terminals of a DC power supply 11, and diodes D1 to D6 connected in series with these semiconductor switching elements S1 to S6, respectively. Diodes D1, D3, and D5 are located between the switching elements S1, S3, and S5 and the negative terminal of the DC power supply 11, and diodes D2, D4, and D6 are located between the switching elements S2, S4, and S6 and the positive terminal of the DC power supply 11. Output points OUT1 to OUT6 are provided between the semiconductor switching elements S1 to S6 and the diodes D1 to D6, respectively. Output points OUT1 and OUT2 are connected to both ends of the U-phase coil of the SR motor M, output points OUT3 and OUT4 are connected to both ends of the V-phase coil, and output points OUT5 and OUT6 are connected to both ends of the W-phase coil.

The two semiconductor switching elements S1 and S2 that make up the U phase are turned ON simultaneously, causing current to flow from output point OUT1 through the U-phase coil to output point OUT2, as indicated by the arrows in Figure 1. Similarly, the two semiconductor switching elements S3 and S4 that make up the V phase are turned ON simultaneously, causing current to flow from output point OUT3 through the V-phase coil to output point OUT4. The two semiconductor switching elements S5 and S6 that make up the W phase are also turned ON simultaneously, causing current to flow from output point OUT5 through the W-phase coil to output point OUT6. The gate signals of each semiconductor switching element S1 to S6 are controlled by a motor control circuit (not shown). MOSFETs, for example, are used as semiconductor switching elements S1 to S6, but other types of switching elements may also be used.

The asymmetric half-bridge circuit shown in Figure 1 is mounted on a multilayer wiring board and connected to the SR motor M via connector 12. Therefore, the output lines L1 to L6 extending from output points OUT1 to OUT6 to each coil are configured as output wiring patterns made of metal foil on each layer on the multilayer wiring board, and are configured as a so-called harness between connector 12 and the SR motor M.

Next, the electronic circuit board of the first embodiment will be described with reference to Figures 3 to 5. The electronic circuit board of the first embodiment is configured by mounting an asymmetric half-bridge circuit together with a connector 12 (specifically, one of the male and female connectors) on a printed wiring board 21 having, for example, four metal foil layers (two surface layers and two inner layers). Figure 3 shows the main parts of the electronic circuit board of the first embodiment, with Figure 3(a) showing the main parts of one main surface, i.e., first surface 21A, of the wiring board 21, and Figure 3(b) showing the main parts of the other main surface, i.e., second surface 21B. Figure 4 is an explanatory diagram viewed from the direction of arrow A in Figure 3. Figure 5 is an explanatory diagram showing a cross section of the printed wiring board 21.

The wiring board 21 is provided with a long, thin connector 12 made of synthetic resin on one side edge, and this connector 12 has six pin-shaped terminals 22A-22F (collectively referred to as terminals 22 when no distinction is necessary) arranged in a row, corresponding to the U, V, and W phase coils mentioned above. Each terminal 22 is L-shaped as shown in Figure 4, and is inserted into a through-hole formed in the wiring board 21 and soldered to a land at the end of the output wiring pattern, which will be described later.

As shown in FIG. 3(a), three semiconductor switching elements S1, S3, and S5 are arranged on the first surface 21A of the wiring board 21 in a line parallel to the connector 12. That is, the three semiconductor switching elements S1, S3, and S5 are arranged facing the connector 12, with semiconductor switching element S1 facing terminals 22A and 22B, semiconductor switching element S3 facing terminals 22C and 22D, and semiconductor switching element S5 facing terminals 22E and 22F. More specifically, semiconductor switching elements S1, S3, and S5 are arranged symmetrically with respect to the two adjacent terminals 22, with each semiconductor switching element and its corresponding two adjacent terminals 22 positioned at the vertices of an isosceles triangle. Semiconductor switching elements S1, S3, and S5 are housed in rectangular resin packages, and the aforementioned diodes D1, D3, and D5 are mounted on the first surface 21A of the wiring board 21 along the side surfaces of the packages of semiconductor switching elements S1, S3, and S5.

Output wiring patterns 23A, 23C, and 23E (collectively referred to as output wiring patterns 23 when no distinction is necessary) serving as the aforementioned output lines L1, L3, and L5 extend from each of the semiconductor switching elements S1, S3, and S5 toward the corresponding terminals 22A, 22C, and 22E, with their respective tips connected to terminals 22A, 22C, and 22E. Specifically, these output wiring patterns 23A, 23C, and 23E are trapezoidal and extend toward a pair of terminals 22, with one edge of the trapezoid notched and connected to one terminal 22. For example, output wiring pattern 23A of semiconductor switching element S1 extends in a trapezoidal shape from one edge of the package facing connector 12 toward a pair of terminals 22A and 22B, with one side of its widest tip (the side closest to terminal 22B) notched to prevent contact with terminal 22B and connected only to terminal 22A. Output wiring patterns 23C and 23E have a similar configuration.

Figure 5 is an explanatory diagram showing a cross section perpendicular to the longitudinal direction of the output wiring patterns 23A, 23C, and 23E of the wiring board 21. As shown in Figure 5, in a preferred embodiment, the output wiring patterns 23A, 23C, and 23E are formed across two layers: the surface metal foil layer 25a on the first surface 21A and the next inner metal foil layer 25b, in order to ensure sufficient current flow.

As shown in FIG. 3(b), the remaining three semiconductor switching elements S2, S4, and S6 are arranged on the second surface 21B of the wiring board 21 so as to be aligned in a straight line parallel to the connector 12. These three semiconductor switching elements S2, S4, and S6 are arranged in positions that overlap (in other words, substantially in the same positions) with the semiconductor switching elements S1, S3, and S5 on the first surface 21A that correspond to the same phase coil when projected in the stacking direction of the multilayer wiring board 21. For example, the U-phase semiconductor switching element S2 is arranged to face the semiconductor switching element S1 that constitutes the same U-phase on the front and back of the wiring board 21. The V-phase semiconductor switching element S4 has a similar positional relationship to the semiconductor switching element S2 on the first surface 21A, and the W-phase semiconductor switching element S6 has a similar positional relationship to the semiconductor switching element S5 on the first surface 21A.

Output wiring patterns 23B, 23D, and 23F extending from each semiconductor switching element S2, S4, and S6 toward terminal 22 have the same shape as output wiring patterns 23A, 23C, and 23E on first surface 21A. For example, output wiring pattern 23B of semiconductor switching element S2 expands in a trapezoidal shape from one edge of the package facing connector 12 toward a pair of terminals 22A and 22B, with one side of the widest tip (the side closest to terminal 22A) notched to prevent contact with terminal 22A and connected only to terminal 22B. Output wiring patterns 23D and 23F are also configured in a similar manner.

Therefore, when the multilayer wiring board 21 is projected in the stacking direction, the output wiring patterns 23B, 23D, and 23F on the second surface 21B entirely overlap with the output wiring patterns 23A, 23C, and 23E on the first surface 21A, except for their tip portions (the connection portions with the terminals 22 and the notched portions).

As shown in Figure 5, in a preferred embodiment, the output wiring patterns 23B, 23D, and 23F on the second surface 21B are formed across two layers: the surface metal foil layer 25d on the second surface 21B and the next inner metal foil layer 25c, in order to ensure sufficient current flow.

In the electronic circuit board of this embodiment, three semiconductor switching elements are arranged on each of the first surface 21A and the second surface 21B of the wiring board 21. This makes it easier to layout the output wiring patterns 23 as relatively wide and short as possible, compared to when six semiconductor switching elements are arranged side by side on the same surface. Furthermore, the six output wiring patterns 23 are of equal length. Furthermore, two output wiring patterns 23 (e.g., output wiring pattern 23A on the first surface 21A and output wiring pattern 23B on the second surface 21B) that constitute the same phase (U phase, V phase, W phase) overlap in the stacking direction of the wiring board 21. This means that the magnetic fields generated by the currents flowing through them cancel each other out, thereby suppressing noise. Furthermore, in the above embodiment, noise suppression is achieved for all phases: U phase, V phase, and W phase.

As shown schematically in FIG. 4, for example, current flows (indicated by arrow F1) from semiconductor switching element S1 through output wiring pattern 23A to connector 12 (i.e., the U-phase coil), and simultaneously, an equal current flows (indicated by arrow F2) from connector 12 (i.e., the U-phase coil) to semiconductor switching element S2 through output wiring pattern 23B. Each current generates magnetic fields MG1 and MG2 in the directions shown. As shown schematically in FIG. 5, in output wiring pattern 23A, current F1 generates magnetic field MG1 in the counterclockwise direction when viewed from the connector 12 side, while in output wiring pattern 23B, current F2 in the opposite direction generates magnetic field MG2 in the clockwise direction. In this way, opposite currents flowing through adjacent locations and the magnetic fields cancel each other out, suppressing noise.

As a secondary effect, the area where the output wiring pattern 23 is located is smaller than when six semiconductor switching elements are arranged side by side on the same surface. This means that when cooling the output wiring pattern 23 using a heat sink or heat dissipation sheet, for example, it is possible to cool it over a smaller area. For example, the area requiring cooling can be reduced by about half.

While one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment and various modifications are possible. For example, the present invention is not limited to SR motor drive devices, but can be applied to electronic circuit boards on which inverter circuits are mounted in various devices. Furthermore, while in the above embodiment each output wiring pattern is formed using two metal foil layers in a multilayer wiring board , the output wiring patterns may be formed using three or more layers.

M...SR motor, C1-C6...coils, S1-S6...semiconductor switching elements, D1-D6...diodes, 11...DC power supply, 12...connector, 21...printed wiring board, 22A-22F...terminals, 23A-23F...output wiring patterns.

Claims (3)

An electronic circuit board having an asymmetric half-bridge circuit that serves as a three-phase inverter circuit mounted on a multilayer wiring board having a first surface and a second surface,
A connector having six terminals arranged in a row is attached to one side edge of the multilayer wiring board,
two switching elements constituting each phase are respectively arranged on the first surface and the second surface , and the two switching elements constituting each phase are arranged at positions that overlap each other when projected in a stacking direction of the multilayer wiring board ,
The three switching elements on each of the first surface and the second surface are arranged in a straight line toward the connector.
an electronic circuit board in which output wiring patterns extending from two switching elements on a first surface and a second surface toward the terminals are respectively wired on different layers of the multilayer wiring board, each output wiring pattern having a trapezoidal shape expanding toward an adjacent pair of terminals and having a notch at its tip edge to avoid contact with one of the terminals, and arranged so that the entirety of the multilayer wiring board except for the notched portion overlaps with each other when projected in the stacking direction of the multilayer wiring board. 10. The electronic circuit board of claim 1, which is used to drive a switched reluctance motor. The output wiring patterns of the six switching elements are configured to have substantially the same length.
3. The electronic circuit board according to claim 1 or 2 .