JPH04105121A - Differential amplifier - Google Patents

Abstract

PURPOSE:To obtain a differential amplifier having the variable mutual conductance by applying the selective conduction control to plural transistors which are connected in parallel with each other and perform the differential amplification in order to change the resistances at the source sides of the transistors and to properly change the mutual conductance of the transistors. CONSTITUTION:The transistors TR T6, T5 and T2 and the TR T8, T7 and T4 which are connected in parallel to each other and perform the differential amplification are turned on when the TR P1 - P3 and P4 - P6 are selectively turned on. Then the number of TRs performing the differential amplification is properly changed. In the differential amplification state, the resistance of the differential amplifying TRs change at the source sides in response to the number of selected amplifying TRs and are changed to the corresponding mutual conductances. Thus the mutual conductances of the differential amplifiers can be changed during their amplifying operations.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a differential amplifier using field effect transistors formed on a semiconductor substrate.

[Conventional technology]

Conventional differential amplifiers that use field-effect transistors formed on a semiconductor substrate, for example, are supervised by Noritori Tamai, “Semiconductor Circuit Design Technology,” Nikkei McGraw-Hill Publishing, 1987.
As shown on page 310, Figures 9-7.

FIG. 2 is a circuit diagram of the differential amplifier. A field effect transistor (hereinafter referred to as a transistor) T I (T3), which is a load transistor, and a transistor 'r, (T,,) for differential amplification are connected in series, and their measurement column circuits are connected in parallel. are doing. and transistor T
I and T3 directly connect the drain and gate. A common connection between the transistors TI and T:l is connected to a power supply terminal (2), and a common connection between the transistors Tz and Ta is connected to a ground terminal (VSS) via a current source (2). Each gate of the transistors T2゜T4 is connected to the input terminals V, , V,
and each is connected separately. The connection between transistors T and T2 is the output terminal ■. The connection portion between the transistors T and T4 is connected to the output terminal 2°.

Here, the current of the series circuit of transistors T+ and Tz is 19
, the current of the series circuit of transistors Tx and Ta is 12, and the current of the current source ■ is Io, then L + It =
Io...(1), so I,=1. -1
．． ,, L = Io - It, and one current I+ is the value obtained by subtracting the other current ■2 from the current I0 of the current source I. Therefore, the voltages at the output terminals ■1° and ■2° are differentially amplified so that when one is high, the other is low.

Then, the ratio of the input terminal and output current of one and the other transistors T2 and I4 for differential amplification, that is, the mutual conductance gm+g7□ corresponding to the amplification gain, is (where 11 is the output current of transistor T2, and I2 is the transistor Output current of T4, V11 is transistor T
The input voltage of transistor T4, V21, is defined as the input voltage of transistor T4.

Here, the source side resistances of the transistor T2.T that provides the input voltage "II+v21" are rs and 11 r, respectively.
When s12 is assumed, the mutual conductance g0 is expressed as follows.

FIG. 3 shows an example of the input/output characteristics of the differential amplifier shown in FIG. 1. The vertical axis is the output horn current ■112,
The horizontal axis represents the input voltage difference vII V21. As is clear from this figure, the mutual conductance gm+ is shown by the slope of the curve rising to the right, and the mutual conductance g is shown by the slope of the curve rising to the left.

[Problem to be solved by the invention]

In the conventional differential amplifier shown in FIG. 2, the transconductance g1+gmz is constant and does not change. Therefore, when operating the differential amplifier, the transconductance g
A request to change 6, e.g. Hopf 1el
There is a problem in that it is not possible to meet requests to change the convergence conditions of a d-type neural network.

In view of this problem, the present invention aims to provide a differential amplifier in which mutual conductance changes during amplification operation.

[Means to solve the problem]

A differential amplifier according to the present invention includes a load element, a plurality of differential amplification transistors connected in series to the load element and connected in parallel to each other, and an input terminal connected to each gate of the differential amplification transistor. , and switching elements provided between the input terminal and the gate of the differential amplification transistor.

[Effect]

Controls conduction of a plurality of differential amplification transistors connected in parallel. The transistor source side resistance of the differential amplification transistor group connected in parallel is the reciprocal of the sum of the transistor source side resistances of the differential amplification transistors connected in parallel. When differential amplification transistors connected in parallel are selected and conduction controlled, the transistor source side resistance of the differential amplification transistor group changes according to the number of selected differential amplification transistors, and the mutual conductance becomes corresponding thereto.

This allows the transconductance of the differential amplifier to be changed during amplification operation.

〔Example〕

The present invention will be described in detail below with reference to drawings showing embodiments thereof. FIG. 1 is a circuit diagram of a differential amplifier according to the present invention. A field effect transistor (hereinafter referred to as a transistor) T + (T:+), which is a load transistor, and a transistor T z (T 4) for differential amplification are connected in series, and both of these pixel circuits are connected in parallel. ing. The drains and gates of transistors T+ and I3 are directly connected. The connection part with transistors TI and T3 is the power supply terminal VD.
The connecting portion between the transistors T2 and T4 is connected to the ground terminal VSS via the current source I.

The connecting portion between the transistors T and I2 is connected to the output terminal ■1°, and the connecting portion between the transistors T3 and I4 is connected to the output terminal v2°. First transistor Tz
(second transistor T4) includes transistors T s (T 7) and T b (T 8) for differential amplification.
are connected in parallel. Input terminal VIA+ ■lB+
■IC is Tran/Meta p, p2. It is connected to the gates of transistors Tz, Ts, and Tb through p3 separately, and the input terminal ■2A+ ■2B+ V2C
is transistor P4. Transistors T4T7 . It is connected to the gate of T.

In the differential amplifier configured in this way, its power supply terminal ■
Apply power supply voltage to DD, apply ground voltage to ground terminal VSS, and connect input terminals vlA+ VIB+ VIC and VIA.
A voltage to be differentially amplified is applied between V 2R+V 2C, and transistors Pl, Pz, Pl and P4 . When Ps and Pb are turned on, the input terminal V 1
p.

V1. V IC and VIA, VzE, Vzc
(7) Voltage is applied to the gates of transistors Tb, Ts, Tz and transistors T8°T, , T, and the voltages are applied to the gates of transistors Tb, Ts, Tz and T8. T? , T
differentially amplified by s, and the amplified output voltage is applied to the output terminal V
I.O.

■Output to 2°.

Here, the transistors T2T s connected in parallel
, T b or T4 , T? , the number of TsO is N, and the number of transistors that are differentially amplified is n, then the transistor source side resistance of a group of transistors connected in parallel when there are n transistors that are differentially amplified is N N/n of the transistor source side resistance when differential amplification is performed by all of the transistors.

That is, for example, three transistors Tb connected in parallel.
, Ts, Tz and transistors T,,T.

Two transistors T6 of T4. T5 and Ts
, T7 are turned on, a transistor group consisting of transistors T6Ts and Tz and transistors T8 . T? ,
The transistor source side resistance of each transistor group consisting of T4 is equal to that of all transistors T6. Ts 1T2 and To
, T7, and T4 increase to 372, which is the transistor source side resistance of each transistor group when turned on. By the way, the relationship between the source side resistance of the transistor for differential amplification and the mutual conductance of the differential amplifier is that, as mentioned above, the mutual conductance of the differential amplifier is the reciprocal of the source side resistance of the transistor for differential amplification. If the side resistance increases to 372, the transconductance of the differential amplifier will decrease by 2/3. Therefore, the transistors Ti, , Ts for differential amplification
3 T2 and Ta, T? T4 is a transistor P+
, Pz, Pl and P4°Pl, Pb can be turned on by selectively turning on, and the number n of transistors performing differential amplification can be changed as appropriate. Thereby, the transconductance of the differential amplifier can be changed during differential amplification operation.

Note that transistors P+, Pz, Pl and P4゜P
9. Transistors P l, P2, Pl and Pa, Ps, Pb such that the threshold voltage of Pb is IV
, transistors P+, Pz, Ps and P, , Pb, pb turn on when the voltage exceeds 1V.

In this case, the transconductance of the differential amplifier is defined as P+
, Pz , Ps and P4 , Pl, P, >IV based on 1/3.2/3. This means that it can be changed stepwise by a factor of 1.

Also, transistors P+, P2 . Ps and P4P3.
The threshold voltage of Pb is P Ivth l P 2vth
IP 3vth + P 4VL, + P 5vt
When h + P bvth, P , vth = P
2v,,=P,vt,=Pavth=P
5vth-P hvth=IV, transistor P+
, Pz and P4.applying 5■ to the gates of Pb, and applying 0■ to the gates of transistors P3 and Pb, transistors P+, Pz, Pl and P4. Ps, Pb
The desired objective was achieved by reducing the L/W to 1/10. Note that the transistor P1. P2. P3 and P4
, Ps, and Pb were N-channel transistors.

Such a differential amplifier can be formed using SiMOS field effect transistors as constituent elements on a silicon semiconductor crystal substrate.

Conventional semiconductor processing techniques can then be used to form the transistor.

In this embodiment, the conduction of the transistors for differential amplification is controlled using transistors, but the conduction may be controlled by a microcomputer.

Alternatively, a simple resistor may be used as the load transistor.

[Effects of the Invention] As detailed above, according to the present invention, the conduction of a plurality of parallel-connected transistors for differential amplification is selectively controlled, and the transistor source side resistance of a group of parallel-connected transistors is changed. It is possible to change the mutual conductance of the differential amplifier as appropriate. In addition, a differential amplifier with variable transconductance can be provided.

This has the advantageous effect of providing a differential amplifier that can be adapted, for example, to form a Hopfield neural network.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a differential amplifier according to the present invention, FIG. 2 is a circuit diagram of a conventional differential amplifier, and FIG. 3 is a curve diagram showing changes in mutual conductance. T+, T2 to T8...Field effect transistor VIA, VBI, Vlc, V2A, V2
B, V2C...input terminal ■1゜, v2゜...output terminal ■. D...Power terminal vss...'Ground terminal P+, Pz, P3, P4, Ps. P,...Field effect transistor I...Current source Fig. DD

Claims (1)

[Claims] 1. A load element, a plurality of differential amplification transistors connected in series to the load element and connected in parallel to each other, an input terminal connected to each gate of the differential amplification transistor, and a differential amplifier connected to the input terminal. A differential amplifier consisting of a switching element provided between the gate of an amplification transistor and each switching element.