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JPH04105383A - Manufacture of optical semiconductor element - Google Patents

Manufacture of optical semiconductor element

Info

Publication number
JPH04105383A
JPH04105383A JP2222928A JP22292890A JPH04105383A JP H04105383 A JPH04105383 A JP H04105383A JP 2222928 A JP2222928 A JP 2222928A JP 22292890 A JP22292890 A JP 22292890A JP H04105383 A JPH04105383 A JP H04105383A
Authority
JP
Japan
Prior art keywords
layer
region
grown
film
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2222928A
Other languages
Japanese (ja)
Other versions
JPH0750815B2 (en
Inventor
Tatsuya Sasaki
達也 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2222928A priority Critical patent/JPH0750815B2/en
Priority to DE69115596T priority patent/DE69115596T2/en
Priority to DE69128097T priority patent/DE69128097T2/en
Priority to US07/750,172 priority patent/US5250462A/en
Priority to EP91114272A priority patent/EP0472221B1/en
Priority to EP94118307A priority patent/EP0643461B1/en
Publication of JPH04105383A publication Critical patent/JPH04105383A/en
Publication of JPH0750815B2 publication Critical patent/JPH0750815B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/16Window-type lasers, i.e. with a region of non-absorbing material between the active region and the reflecting surface
    • H01S5/164Window-type lasers, i.e. with a region of non-absorbing material between the active region and the reflecting surface with window regions comprising semiconductor material with a wider bandgap than the active layer

Landscapes

  • Optical Couplings Of Light Guides (AREA)
  • Optical Integrated Circuits (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To make it possible to obtain a semiconductor optical integrated element with comparatively ease and with good controllability by a method wherein a dielectric thin film is formed on the flat surface of a semiconductor substrate and thereafter, the thin film is processed into the form of parallel two stripes, a crystal growth is performed selectively and a semiconductor layer, which is grown at the region pinched between the stripes, is used as an active layer, an optical waveguide or the like. CONSTITUTION:An SiO2 film 21 is deposited on the surface of an n-type InP substrate 1, parallel two stripes are formed and an Si-doped n-type InP clad layer 2, an InGaAsP active layer 3 and a Zn-doped p-type InP clad layer 4 are selectively grown. Then, the film 21 is once removed, an SiO2 film 21 is again formed on the whole surface, is formed in such a way as to cover an active region only and the unnecessary layers 4 and 3 are removed. After that, a p-type InP layer 5 is grown on the whole surface and thereafter, a p-type InP layer 6 and a p-type InGaAs cap layer 7 are selectively grown only on the region over the active region using again an SiO2 film and a P side pad electrode is formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、光通信、光情報処理などに用いられる、半導
体レーザや光導波路などの単体、あるいはそれらを集積
した光半導体素子の製造方法に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method of manufacturing an optical semiconductor element such as a semiconductor laser or an optical waveguide, or an integrated optical semiconductor element, which is used in optical communication, optical information processing, etc. .

〔従来の技術〕[Conventional technology]

光通信や光情報処理に用いられる光半導体テバイスには
、よりいっそうの高性能化1高機能化が要求されるよう
になってきている。そのためには、半導体レーザやフォ
トダイオードなとの素子単体の高性能化・高機能化はも
とより、それらの素子を組み合わせて集積化を行ってい
くことが重要である。各種素子を集積化して半導体光集
積素子(SPIC;セミコンダクター・フォトニック・
インテグレーテッド・サーキット)を作製するにあたっ
ては、各素子をいかに半導体基板上に配置していくか、
またいかに設計通りの構造に作製するかが重要である。
Optical semiconductor devices used for optical communication and optical information processing are required to have even higher performance and higher functionality. To this end, it is important not only to improve the performance and functionality of individual elements such as semiconductor lasers and photodiodes, but also to integrate these elements by combining them. Semiconductor photonic integrated devices (SPICs) are created by integrating various elements.
When manufacturing integrated circuits, it is important to consider how to arrange each element on a semiconductor substrate.
Also, it is important how to fabricate the structure as designed.

5PICの従来例として、半導体レーザ(LD)2素子
と金波器、光導波路を集積した構造を第9図に示す。第
9図(a)は5PICの概略を示す平面図、第9図(b
)は5PICの構造を示す斜視図である。活性層3はし
−ザ領域のみに存在し、カイト層10はレーザ領域と導
波路領域全体にわたって存在する。例として活性層3に
波長1.55膜m組成のInGaAsPを用いた場合、
カイト層10には波長1.3μm組成のInGaAsP
を用いている。電流をレーザ領域のみに流し、2つのレ
ーザ素子間の電気的絶縁をとるなめに、高抵抗InP1
3で埋め込まれた高抵抗埋め込み構造とし、メサエッチ
ングを用いている。
As a conventional example of a 5PIC, FIG. 9 shows a structure in which two semiconductor laser (LD) elements, a gold wave device, and an optical waveguide are integrated. Figure 9(a) is a plan view showing the outline of 5PIC, Figure 9(b)
) is a perspective view showing the structure of 5PIC. The active layer 3 is present only in the laser region, and the kite layer 10 is present throughout the laser region and the waveguide region. As an example, when InGaAsP with a wavelength of 1.55 and a film composition of m is used for the active layer 3,
The kite layer 10 has an InGaAsP composition with a wavelength of 1.3 μm.
is used. In order to pass current only to the laser region and to provide electrical insulation between the two laser elements, high resistance InP1 was used.
A high-resistance buried structure is used, and mesa etching is used.

この5PICの作製工程を述べる。結晶成長には有機金
属気相成長法(MOVPE)を用いるのが一般的である
。まず、n−InP基板1の上に、n−InGAsPガ
イド層10、I nGaAsP活性層3、p−InPク
ラッド層4を成長した後、S i 02膜を選択マスク
として導波路領域のp−InPクラッド層4、InGa
AsP活性層3を除去し、InGaAsPガイド層およ
びp−InPクラッド層(図中には示されていない〉を
選択成長する。次に、5iO211をマスクとしてメサ
エッチングし、Feトープ高抵抗TnP層13を埋め込
み成長する。S i 02 Mを除去した後、さらに、
全面にp〜InPクラ・ソト層5およびp”−1nGa
Asキャップ層7を成長する。
The manufacturing process of this 5PIC will be described. Metal organic vapor phase epitaxy (MOVPE) is generally used for crystal growth. First, after growing an n-InGAsP guide layer 10, an InGaAsP active layer 3, and a p-InP cladding layer 4 on an n-InP substrate 1, the p-InP in the waveguide region is grown using the Si02 film as a selective mask. Cladding layer 4, InGa
The AsP active layer 3 is removed, and an InGaAsP guide layer and a p-InP cladding layer (not shown in the figure) are selectively grown. Next, mesa etching is performed using 5iO211 as a mask to form a Fe-topped high-resistance TnP layer 13. After removing S i 02 M, further
p~InP Cra-Sotho layer 5 and p"-1nGa on the entire surface
An As cap layer 7 is grown.

レーザ領域と導波路領域の間、および二つのレーザ素子
の間に絶縁用の溝をエツチングにより形成してから、全
面に5i02膜21を堆積し、レーザ部の上部を窓開け
してp側のパ・・lト電極32を、また基板側にn側電
極33を形成して完成する。この例では、二つのレーザ
素子の発振波長の制御はできないが、分布帰還型(DF
B)構造にすれば、グレーティングのピッチを変えたり
、多電極構造にするなどして多波長光源とすることがで
きる。
After forming insulating grooves between the laser region and the waveguide region and between the two laser elements by etching, a 5i02 film 21 is deposited on the entire surface, and a window is opened in the upper part of the laser region to form a p-side groove. A pass electrode 32 and an n-side electrode 33 are formed on the substrate side to complete the process. In this example, the oscillation wavelengths of the two laser elements cannot be controlled, but the distributed feedback (DF)
With the B) structure, a multi-wavelength light source can be obtained by changing the grating pitch or creating a multi-electrode structure.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このような5PICの作製には、導波路を形成する層構
造を精密に制御することが重要である。
In producing such a 5PIC, it is important to precisely control the layer structure forming the waveguide.

層厚はMOVPEなどの気相成長法を用いれば充分に制
御が可能であるが、導波路幅は従来、5i02などをマ
スクとして用いたメサエッチングにより副脚しており、
サイドエツチングなどによりじゅうぶんな制御性か得ら
れないなどの問題があった。
Although the layer thickness can be sufficiently controlled using a vapor phase growth method such as MOVPE, the waveguide width has conventionally been sublimated by mesa etching using a mask such as 5i02.
There were problems such as insufficient controllability due to side etching.

例えば、一般的な埋め込み構造半導体レーザの作製プロ
セスを第3図に示すが、n−InP基板1の上にn−I
nPクラッド層2、r nGaAsP活性層3、p−I
nPクラッド層4を成長した(第3図(a))後、Si
○膜21を幅2μmにパターニングしく第3図(b))
、メサエッチングンを行う(第3図(C))。そしてp
−InP埋め込み層8およびn−InP埋め込み層9を
埋め込み成長しく第3図(d))、最後にp−In9層
5およびP“−I nGaAsキャップ層7を全面に成
長する(第3図(e))。また、第4図は、従来の埋め
込みリッジ構造半導体レーザの作製プロセスである。ま
ず、活性層3をグランド層2.4で挟んだダブルへテロ
(DH)構造を成長したく第4図(a))後、ストライ
プ状のSiO2膜21全21しく第4図(b))、メサ
エッチングしたく第4図(C))後、全面にクラッド層
5.キャップ層7を成長しく第4図(d))、活性層の
周囲にプロトンを打ち込んな高抵抗領域31を形成して
電流狭窄している(第4図〈e))。
For example, the manufacturing process of a general buried structure semiconductor laser is shown in FIG.
nP cladding layer 2, r nGaAsP active layer 3, p-I
After growing the nP cladding layer 4 (FIG. 3(a)), the Si
○ Patterning the film 21 to a width of 2 μm (Figure 3(b))
, perform mesa etching (Fig. 3(C)). and p
-InP buried layer 8 and n-InP buried layer 9 are buried and grown (FIG. 3(d)), and finally p-In9 layer 5 and P"-In GaAs cap layer 7 are grown over the entire surface (FIG. 3(d)). e)). Fig. 4 shows the manufacturing process of a conventional buried ridge structure semiconductor laser. First, a double hetero (DH) structure in which the active layer 3 is sandwiched between the ground layers 2 and 4 is grown. After FIG. 4(a)), the striped SiO2 film 21 is completely etched (FIG. 4(b)), and after mesa etching (FIG. 4(C)), a cladding layer 5 and a cap layer 7 are grown on the entire surface. In FIG. 4(d)), a high resistance region 31 into which protons are implanted is formed around the active layer to constrict the current (FIG. 4(e)).

これらのメサエッチングにおいて、S i 02膜21
の幅が正確に2μmになっていても、メサ構造のばらつ
きや活性層エツチング時のサイドエツチングにより、活
性層幅はばらついてしまう。特に2インチ基板などの大
口径ウェハを用いたプロセスではウェハ面内のばらつき
は大きくなる。活性層、導波路幅のばらつきはしきい値
電流、発振波長、ビームパターンなどの素子特性に影響
を与えるため、素子の歩留まりを低下させるだけでなく
、設計通りの動作か得られにくいなどの問題があり、改
善が必要であった。
In these mesa etchings, the S i 02 film 21
Even if the width of the active layer is exactly 2 μm, the active layer width will vary due to variations in the mesa structure and side etching during active layer etching. Particularly in processes using large diameter wafers such as 2-inch substrates, variations within the wafer surface become large. Variations in the width of the active layer and waveguide affect device characteristics such as threshold current, oscillation wavelength, and beam pattern, which not only reduces device yield but also causes problems such as difficulty in achieving designed operation. There was a need for improvement.

〔課題を解決するための手段〕[Means to solve the problem]

上記の課題を解決するための光半導体素子の製造方法は
、平坦な半導体表面にSiO□などの誘電体薄膜を形成
した後、2木の平行なストライプ状に加工し、選択的に
結晶成長を行い、前記ストライブにはさまれた領域に成
長した半導体層を活性領域や光導波路などに用いること
を特徴とする、光半導体素子の製造方法である。
The method for manufacturing optical semiconductor devices to solve the above problems is to form a dielectric thin film such as SiO□ on a flat semiconductor surface and then process it into two parallel stripes to selectively grow crystals. This method of manufacturing an optical semiconductor device is characterized in that the semiconductor layer grown in the region sandwiched between the stripes is used as an active region, an optical waveguide, or the like.

〔作用〕[Effect]

本発明の根本をなす平坦基板上の選択成長の様子を第1
図に示す。第1図(a)に示すように、(100)方位
半導体基板1上に選択成長用薄膜21を形成し、<01
1>および<011>方向のストライブ状に薄膜21を
選択的に除去し、MOVPEによってDH槽構造成長す
ると、第1図(b)に示したように成長層の側面は<0
11>ストライブに沿っては(111)A面が、また<
011>方向に沿っては<111)B面が形成される。
The selective growth on a flat substrate, which is the basis of the present invention, is explained in the first part.
As shown in the figure. As shown in FIG. 1(a), a thin film 21 for selective growth is formed on a (100) oriented semiconductor substrate 1, and
When the thin film 21 is selectively removed in stripes in the <1> and <011> directions and a DH tank structure is grown by MOVPE, the side surfaces of the grown layer become <0 as shown in FIG. 1(b).
Along the 11> stripe, the (111) A side is also <
Along the <011> direction, a <111)B plane is formed.

また各成長層の表面は(100)面を形成しており、界
面も非常にフラットである。混晶の組成も、薄膜のスト
ライプ幅が極端に広くなければ面内で均一であり、光半
導体素子や5PICの活性層や導波路層に充分適用でき
る。また側面は(111)面となるため、薄膜21のパ
ターニングが精密であれば、成長層幅の制御性も非常に
よくなるという特長かある。
Further, the surface of each grown layer forms a (100) plane, and the interface is also very flat. The composition of the mixed crystal is also uniform within the plane unless the stripe width of the thin film is extremely wide, and can be sufficiently applied to optical semiconductor elements and active layers and waveguide layers of 5PIC. Furthermore, since the side surfaces are (111) planes, if the patterning of the thin film 21 is precise, the controllability of the growth layer width will be very good.

また、この選択成長では、薄膜のストライプ幅を変える
二とによって、成長層厚を変化させることかできる。第
7図にストライプ幅と成長速度の関係を測定した結果の
一例を示す。ストライプ幅が広いほど成長速度は高くな
る。これは、薄膜上からマイグレーションして半導体表
面に到達する成長層の量が増加するためである。このこ
とから、選択成長層の層厚を制御することが可能になる
。量子井戸構造を選択成長して、ウェル層厚を変えれば
、量子井戸構造の等価屈折率や発光エネルギーを局所的
に変えることが可能になり、5PIC作製の自由度が増
す。
Furthermore, in this selective growth, the thickness of the grown layer can be changed by changing the stripe width of the thin film. FIG. 7 shows an example of the results of measuring the relationship between stripe width and growth rate. The wider the stripe width, the higher the growth rate. This is because the amount of the growth layer that migrates from the thin film and reaches the semiconductor surface increases. This makes it possible to control the thickness of the selectively grown layer. By selectively growing a quantum well structure and changing the well layer thickness, it becomes possible to locally change the equivalent refractive index and emission energy of the quantum well structure, increasing the degree of freedom in 5PIC production.

〔実施例〕〔Example〕

まず、第4図に示した従来例の埋め込みリッジ構造半導
体レーザを、本発明を用いて作製した結果について述べ
る。第2図がその作製プロセスを示している。(100
)方位のn−InP基板基板衣面にCVD法を用いてS
 i 02膜21(厚さ約2000人)を堆積し、フォ
トリングラフィの手法を用いて幅5μm、開隔2μmの
2本のストライブを形成しな(第2図(a))。そして
、減圧MOVPE法により、Siドープn−丁nPクラ
ッド層2(層厚1000λ、キャリア濃度1×10”c
m’ ) 、I nGaAs P活性層3 (1,55
μm組成、層厚800人)−ZnドープpInPクラッ
ド層4(層厚500人、キャリア濃度5×1017CI
laL〉全選択成長シタ(第2図(b))。層厚はSi
O□膜21にはさまれた活性領域での値であり、この領
域内で層厚は一定であった。次に、Si○2膜21全2
1たん除去し、再び5i02膜21を全面に形成して、
活性領域のみ覆うように形成した(第2図(C))。次
にHC1+H,PO4混合液、およびH2s○4+H2
O2+H20混合液を用いて、不要なInPクラッド層
4およびInGaAsP活性層3を除去しな(第2図(
d))。その後は、第2図(e)に示すように、全面に
p−InP層5(層厚0.5μm、キャリア濃度5X1
0’7cm’)を成長してから、再びSiC2膜を用い
て活性層上部の幅15μmの領域のみにp−InP層6
(層厚−う 1μm、キャリア濃度5×1017CIII着)および
pI nGaAsキャップ層7(層厚0.3tt−ラ m、キャリア濃度I X 10”cm’ )を選択成長
しp側パッド電極を形成してレーザを完成した。
First, the results of fabricating the conventional buried ridge structure semiconductor laser shown in FIG. 4 using the present invention will be described. FIG. 2 shows the manufacturing process. (100
) orientation of the n-InP substrate using the CVD method.
An i02 film 21 (thickness of about 2,000 layers) was deposited, and two stripes with a width of 5 μm and a gap of 2 μm were formed using a photolithography method (FIG. 2(a)). Then, by low pressure MOVPE method, Si-doped n-nP cladding layer 2 (layer thickness 1000λ, carrier concentration 1×10”c
m' ), InGaAs P active layer 3 (1,55
μm composition, layer thickness 800 layers) - Zn-doped pInP cladding layer 4 (layer thickness 500 layers, carrier concentration 5 x 1017 CI
laL〉All selective growth (Fig. 2(b)). Layer thickness is Si
This is the value in the active region sandwiched between the O□ films 21, and the layer thickness was constant within this region. Next, all 2 of the Si○2 film 21
Once removed, a 5i02 film 21 is again formed on the entire surface.
It was formed so as to cover only the active region (FIG. 2(C)). Next, HC1 + H, PO4 mixed liquid, and H2s○4 + H2
Remove unnecessary InP cladding layer 4 and InGaAsP active layer 3 using O2 + H20 mixed solution (see Figure 2).
d)). After that, as shown in FIG. 2(e), a p-InP layer 5 (layer thickness 0.5 μm, carrier concentration 5×1
0'7cm'), then a p-InP layer 6 is grown only in a 15μm wide region above the active layer using the SiC2 film again.
(layer thickness: 1 μm, carrier concentration: 5 × 10 17 CIII) and a pInGaAs cap layer 7 (layer thickness: 0.3 tt-ram, carrier concentration: I × 10 cm) to form a p-side pad electrode. completed the laser.

なお、第2図(f)に示すように、第4図の従来例と同
様なプロトン打ち込み領域31を用いた電流狭窄構造と
しても構わない。
Note that, as shown in FIG. 2(f), a current confinement structure using a proton implantation region 31 similar to the conventional example shown in FIG. 4 may be used.

この半導体レーザを共振器長300ttmで評価したと
ころ、しきい値電流は平均12.3mA標準偏差0.4
mA、スロープ効率は平均0.21W/A、標準変化0
.05W/Aであった。活性層幅は平均1.83μm、
標準偏差0.12μmであった。比較のため、第4図の
ように、まず全面にDH槽構造成長してから、HC1+
H3PO4混合液およびH2SO4+H2O2+H20
混合液を用いてInPクラッド層およびInGaAsP
活性層を選択的にメサエッチングし、その後は本発明の
実施例と同様にp−InP層を全面に、続いてp〜In
P層およびp−InGaAsキャップ層を選択成長して
作製した半導体レーザも評価した。その結果、しきい値
電流は平均12.1mA、標準偏差1.8mA、効率は
平均0.18W/A、標準渓差0.09W7’Aであり
、活性層幅は平均162μm、標準偏差0.25μmで
あった。この結果から、本発明の活性層を選択成長する
横道による半導体レーザは。従来の活性層をメサエッチ
ングする構造によるものと比べて、活性層幅の制御性に
優れ、特性のばらつきも少ないものか得られることか確
認された。この手法を大面積均一成長か可能なMOVP
E成長を用いて適用することにより、歩留まりの高い、
低価格半導体レーザを製造することも可能となる。なお
、活性層幅が多少広めたが、遠視野像は単峰で、半値幅
も活性層に垂直方向で32°、平行方向で28°と標準
的であった。SiO2のバターニング幅とn−InP層
の層厚を制御することにより、活性層幅をさらに狭くす
ることは可能である。
When this semiconductor laser was evaluated with a cavity length of 300 ttm, the threshold current was an average of 12.3 mA with a standard deviation of 0.4
mA, slope efficiency average 0.21W/A, standard change 0
.. It was 05W/A. The active layer width is 1.83 μm on average.
The standard deviation was 0.12 μm. For comparison, as shown in Figure 4, the DH tank structure was first grown on the entire surface, and then the HC1+
H3PO4 mixture and H2SO4+H2O2+H20
InP cladding layer and InGaAsP using mixed solution
The active layer is selectively mesa-etched, and then the p-InP layer is formed on the entire surface, and then the p-InP layer is etched on the entire surface as in the embodiment of the present invention.
A semiconductor laser fabricated by selectively growing a P layer and a p-InGaAs cap layer was also evaluated. As a result, the threshold current was 12.1 mA on average, standard deviation 1.8 mA, efficiency was 0.18 W/A on average, standard deviation 0.09 W7'A, and active layer width was 162 μm on average, standard deviation 0. It was 25 μm. From this result, the semiconductor laser according to Yokomichi, in which the active layer of the present invention is selectively grown, can be obtained. It was confirmed that compared to the conventional structure in which the active layer is mesa-etched, the active layer width can be better controlled and the characteristics vary less. This method can be used for MOVP, which allows uniform growth over a large area.
By applying using E-growth, high yield,
It also becomes possible to manufacture low-cost semiconductor lasers. Although the active layer width was somewhat widened, the far-field pattern was unimodal, and the half-width was also standard at 32° in the direction perpendicular to the active layer and 28° in the parallel direction. By controlling the patterning width of SiO2 and the layer thickness of the n-InP layer, it is possible to further narrow the active layer width.

次に、第2の実施例として、多重量子井戸(MQW>構
造の活性層を有する分布帰還型(DFB)半導体レーザ
と、電界吸収型半導体光変調器をモノリンツクに集積し
た5PICへ応用した結果について述へる。この5PI
Cは半導体レーザからの発生した光を変調器で発振変調
し、変調器側端面から出射するもので、従来の半導体レ
ーザを直接変調した場合と比へて、高速変調時のスペク
トル広がり(チャーピング〉か狭いという特長があり、
次世代光通信用デバイスとして研究開発が行われている
。従来はレーザ領域の活性層(波長1,55μm組成)
を全面に成長してから、変調器領域の活性層を選択エツ
チングして除去し、吸収層(波長的14μm組成)を選
択成長していた。活性層と吸収層は光学的に結合し、接
合部ての散乱か少ない構造にする必要かあり、選択成長
によりそのような横道を作製するのは比較的困難であっ
た。一方、本発明を用いれば、SiO2膜の幅を変える
ことにより、選択成長したMQW構造の層厚を変えるこ
とかできるので、活性層吸収層を同時に成長することか
可能となり、成長回数が減るばかりか、結合効率の高い
接合を得る二とかで°きる。第8図はMQWのウェル層
をInGaAs+バリア層をI nGaAsPとした時
の、ウェル層厚とMQWの発光波長の関イ系を計算した
結果である。バリアのI n G a A s Pを波
長1.3μm組成と1.15μm組成にした場合につい
て示しである。この図より、バリアを1.15μm組成
にした場合、ウェル厚約80人で波長1.55μm、約
30人で1.4μmとなることがわかる。この計算結果
と第7図の5i02ストライプ幅と成長速度の関係より
、レーザ領域はストライプ幅20μm、変調器領域はス
トライプ幅2μmとした。
Next, as a second example, we will discuss the results of applying a distributed feedback (DFB) semiconductor laser having a multi-quantum well (MQW> structure active layer) and an electroabsorption semiconductor optical modulator to a 5PIC integrated into a monolink. Describe these 5 PIs.
C uses a modulator to oscillate and modulate the light generated by a semiconductor laser, and the light is emitted from the modulator side end facet. 〉It has the feature of being narrow,
Research and development is underway as a next-generation optical communication device. Conventionally, the active layer in the laser region (wavelength 1,55 μm composition)
After growing on the entire surface, the active layer in the modulator region was selectively etched and removed, and an absorbing layer (14 μm composition in terms of wavelength) was selectively grown. The active layer and absorption layer must be optically coupled to create a structure that reduces scattering at the junction, and it has been relatively difficult to create such a side channel by selective growth. On the other hand, if the present invention is used, the layer thickness of the selectively grown MQW structure can be changed by changing the width of the SiO2 film, so it is possible to grow the active layer and absorption layer at the same time, which will reduce the number of times of growth. Alternatively, it is possible to obtain a bond with high coupling efficiency. FIG. 8 shows the results of calculating the relationship between the well layer thickness and the emission wavelength of the MQW when the well layer of the MQW is InGaAs and the barrier layer is InGaAsP. This figure shows cases in which the InGaAs P of the barrier has a composition with a wavelength of 1.3 μm and a composition with a wavelength of 1.15 μm. From this figure, it can be seen that when the barrier has a composition of 1.15 μm, the wavelength becomes 1.55 μm when the well thickness is about 80 people, and 1.4 μm when the well thickness is about 30 people. Based on this calculation result and the relationship between the 5i02 stripe width and the growth rate shown in FIG. 7, the stripe width was set to 20 μm for the laser region and 2 μm for the modulator region.

第5図(a)はMQW構造を選択成長した状態を示して
いる。グレーティングはn−InP基板1のレーザ領域
のみに形成し、その上にn−InGaAsPガイド層1
0(波長1.3ttm組成、キャリア濃度1×1018
CIl#、層厚1000人>、MQW活性層兼吸収層1
1、p−InPりラッド層4〈キャリア濃度5 X 1
0”crn’ 、層厚500人)分選択成長した。MQ
Wはウェル数4て、層厚はレーザ領域かI n G a
 A Sウェル478人、1.1.5μm組成組成nG
aAsPバリア厚150人てあり、変調器領域かウェル
734人、バリア厚66人てあった。また活性層幅は2
.0μmであった。変調器側端面の反射率を抑制するた
めに端面に未成長領域と設けたウィンドウ構造とした。
FIG. 5(a) shows a selectively grown MQW structure. The grating is formed only in the laser region of the n-InP substrate 1, and an n-InGaAsP guide layer 1 is formed on it.
0 (wavelength 1.3ttm composition, carrier concentration 1×1018
CIl#, layer thickness 1000 people>, MQW active layer and absorption layer 1
1. p-InP rad layer 4 <carrier concentration 5 x 1
0"crn', layer thickness 500 people) selective growth.MQ
W is the number of wells 4, and the layer thickness is the laser region or InGa
AS well 478 people, 1.1.5 μm composition nG
The aAsP barrier thickness was 150 mm, the modulator area or well was 734 mm, and the barrier thickness was 66 mm. Also, the active layer width is 2
.. It was 0 μm. In order to suppress the reflectance of the modulator side end face, a window structure was adopted in which an ungrown region was provided on the end face.

続いて全面にp−InP層5(キャリア濃度5 X 1
017cm″、層厚0.5μm)を成長し、さらに5i
02膜をレーザ共振器方向には幅10μm、間隔30μ
mのタブルスI・ライブ状に、またレーザと変調器の境
界には幅10μmのシングルスドライブ状にパターニン
グして、p−InP層6(キャリア濃度I X 101
8cm” 、層N10μm)およびp” −I nGa
Asキャップ層7(層厚0.3μm、キャリア濃度I 
X 1019C:m’ )を選択成長して活性層・吸収
層への電流・電界の狭窄、およびレーザ領域と変調器領
域の電気的絶縁を図った。最後に再びS i 02膜2
1を形成して活性層、吸収層の上部に窓開けして、ρ側
電極32をバット状に形成し、基板1側にもn側電極3
3を形成した。完成図か第5図(b)である。
Subsequently, a p-InP layer 5 (carrier concentration 5×1
017cm'', layer thickness 0.5μm), and further 5i
02 film in the laser cavity direction with a width of 10 μm and a spacing of 30 μm.
The p-InP layer 6 (carrier concentration I x 101
8 cm”, layer N10 μm) and p”-I nGa
As cap layer 7 (layer thickness 0.3 μm, carrier concentration I
X 1019C:m') was selectively grown to constrict the current and electric field to the active layer and absorption layer, and to electrically insulate the laser region and modulator region. Finally, S i 02 film 2 again
A window is formed on the top of the active layer and the absorption layer, and a ρ-side electrode 32 is formed in a bat shape, and an n-side electrode 3 is also formed on the substrate 1 side.
3 was formed. The completed drawing is shown in Figure 5(b).

へき開したレーザ領域長は400μm、変調器領域長は
200μmとしな。また、レーザ側端面には反射率80
%の高反射コーティングを施した。
The length of the cleaved laser region is 400 μm, and the length of the modulator region is 200 μm. In addition, the laser side end face has a reflectance of 80
% high reflective coating.

典型的な素子の発振しきい値電流は18mAで、最大C
W光光力力25mWであった。発振波長は1.545μ
mてあつ、変調領域に一5V印加したときの消光比は2
5dBであった。また、消光特性から見積った結合効率
は95%と高い値が得られた。このように、本発明の選
択成長により活性層と吸収層を同時に成長する技術によ
り、良好な結合導波路構造が容易に作製できることが確
認された。
The oscillation threshold current of a typical device is 18 mA, with a maximum C
The W optical power was 25 mW. The oscillation wavelength is 1.545μ
m, and when -5V is applied to the modulation region, the extinction ratio is 2.
It was 5 dB. Furthermore, the coupling efficiency estimated from the extinction characteristics was as high as 95%. Thus, it was confirmed that a good coupled waveguide structure can be easily produced by the technique of simultaneously growing an active layer and an absorbing layer by selective growth of the present invention.

最後に、第3の実施例として、第9図に示した2波長半
導体レーザアレイと光導波路を集積した5PICを本発
明の選択成長を用いて作製した結果について述べる。第
6図(a>は、はじめにDH楕構造選択成長した際の5
i02膜21のパターンである。各領域とちSi○2ス
トライプに囲まれた成長頭載の幅は2μmてあり、5i
02ストライプ幅は一方のレーザ領域で15μm、もう
一方のレーザ領域と導波路領域は5μmとした。
Finally, as a third example, we will discuss the results of fabricating a 5PIC integrated with the two-wavelength semiconductor laser array and optical waveguide shown in FIG. 9 using the selective growth of the present invention. Figure 6 (a> is 5 when the DH elliptical structure was first selectively grown)
This is the pattern of the i02 film 21. The width of the growth head surrounded by Si○2 stripes in each region is 2 μm, and 5i
The 02 stripe width was 15 μm in one laser region and 5 μm in the other laser region and waveguide region.

第6図(c)、(d)は完成した素子の断面図である(
切断方向は第6図(a)に示しである)。
FIGS. 6(c) and 6(d) are cross-sectional views of the completed device (
The cutting direction is shown in FIG. 6(a)).

まずn−1nP基板1の上に、n−InGaAsPガイ
ド層10(波長1.3μm組成、キャリア濃度I X 
1018cm’ 、層厚約1000人)、n−InPエ
ッチストップ層12(キャリア濃度1×10’鵠−1層
厚約400人)−MQW活性層11、p−InPクラッ
ド層4(キャリア濃度5×1017CTI+1、層厚的
500λ)を成長した。MQWはウェル数4で、層厚は
一方のレーザ領域がI nGaAsウェル層70人、I
nGaAsP(波長1.3μm組成)バリア厚150人
であり、もう一方のレーザ領域がウェル厚50人、バリ
ア厚110人であった。次に第6図(b)に示すように
5i02膜をバターニングし、レーザ領域以外のp−I
nPクラッド層4およびMQW活性層11、n−InP
工・・lチストップ層12を選択工・ソチングし、ノン
ドープI n G a A s P導波路層14(波長
1.3μm組成、層厚1500人)を選択成長した。次
に、第6図<c)、(d)に示すように、p−1nP層
5(キャリア濃−ラ 度I X 10”cm’ 、層厚0.5μm) 、p−
I nづ 2層(キャリア濃度I X 1018cm” 、/1f
fl 08m)−およびp ” −I n G a A
 Sキャップ層7(層厚0.3μm、キャリア濃度I 
X 1019cm’ )を選択成長した後、5i02膜
21の窓開けしたレーザ活性層の上面にp側パッド電極
32を、基板側にn側電極33を形成した。レーザ共振
器長は300μm、レーザ間隔は50μm、導波路長は
250μmとし、出射端面はウィンドウ構造とした。
First, an n-InGaAsP guide layer 10 (wavelength 1.3 μm composition, carrier concentration I
n-InP etch stop layer 12 (carrier concentration 1×10′−1 layer thickness approx. 1017CTI+1, layer thickness 500λ) was grown. The number of MQW wells is 4, and the layer thickness is 70 I nGaAs well layers in the laser region on one side, I
The nGaAsP (wavelength 1.3 μm composition) barrier thickness was 150 layers, and the other laser region had a well thickness of 50 layers and a barrier thickness of 110 layers. Next, as shown in FIG. 6(b), the 5i02 film is patterned, and the p-I area other than the laser region is
nP cladding layer 4 and MQW active layer 11, n-InP
Processing: The stop layer 12 was selectively etched and soothed, and a non-doped InGaAsP waveguide layer 14 (wavelength 1.3 μm composition, layer thickness 1500 layers) was selectively grown. Next, as shown in FIG. 6<c) and (d), a p-1nP layer 5 (carrier concentration I x 10"cm', layer thickness 0.5 μm), p-
2 layers (carrier concentration I x 1018cm", /1f
fl 08m)- and p”-I n G a A
S cap layer 7 (layer thickness 0.3 μm, carrier concentration I
After selective growth of the 5i02 film 21 (X 1019 cm'), a p-side pad electrode 32 was formed on the upper surface of the apertured laser active layer of the 5i02 film 21, and an n-side electrode 33 was formed on the substrate side. The laser resonator length was 300 μm, the laser spacing was 50 μm, the waveguide length was 250 μm, and the output end face had a window structure.

このツインレーザの典型的な発振しきい値電流は15m
Aで、発振波長は1.552μmと1528μmであっ
た。導波路端面からの最大光出力は20mAであった。
The typical oscillation threshold current of this twin laser is 15m
In A, the oscillation wavelengths were 1.552 μm and 1528 μm. The maximum optical output from the waveguide end face was 20 mA.

このように、ストライプ幅を変えることによってMQW
レーザの発振波長を変えることができ、こうした技術は
さまざまな集積光デバイスへの応用が可能である。
In this way, by changing the stripe width, the MQW
The oscillation wavelength of the laser can be changed, and this technology can be applied to a variety of integrated optical devices.

なお、上記各実施例においては、選択成長用マスクとな
る誘電体膜にSiC2膜を用いたか、Si3N4膜等他
の誘電体膜でもよい。
In each of the above embodiments, a SiC2 film was used as a dielectric film serving as a mask for selective growth, or other dielectric films such as a Si3N4 film may be used.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明の作製方法を用いれば、メサ
エッチングか不要となり、均一な活性層、導波路幅が制
御よく作製できる。それだけでなく、マスク幅を変える
ことにより成長層厚を変えることができ、M−QW楕構
造発光波長や実効屈折率を変えることか可能である。こ
れらの技術を用いることにより、従来複雑なプロセスを
必要としていた各種半導体光集積素子(SPIC)を比
較的容易に、また制御性よく作製することが可能となっ
た。
As described above, if the manufacturing method of the present invention is used, mesa etching is not necessary, and a uniform active layer and waveguide width can be manufactured with good control. In addition, by changing the mask width, it is possible to change the growth layer thickness, and it is also possible to change the M-QW elliptical structure emission wavelength and effective refractive index. By using these techniques, it has become possible to manufacture various semiconductor optical integrated devices (SPICs), which conventionally required complicated processes, relatively easily and with good controllability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の概念を表す構造図である。第2図は本
発明を用いて作製した半導体レーザの作製工程を表す図
であり、第3図および第4図はそれぞれ従来の半導体レ
ーザの作製工程を表す図である。第5図は本発明を用い
て作製したDFB半導体レーザと半導体光変調器とを集
積した5PICの作製方法と素子構造分表す図であり、
第6図は本発明を用いて作製した2波長半導体レーザと
先導波路との集積素子の作製方法と素子構造を表す図で
ある。第7図はストライブ幅と成長速度の関係を表す図
であり、第8図はMQW楕遣構造ェル厚と発光波長の関
係を表す図である。第9図は第6図と同じ2波長半導体
レーザと先導波路の集積素子の従来の作製方法による構
造を表す図である。 図中、1−n −I n P基板、2=−n−1nPク
ラッド層、3・・・InGaAsP活性層、4・・・p
−InPクラッド層、5−p−InP層、6 ・pIn
P層、7−p” −I nGaAsキ’l= ツブ層、
8・・・p−InP埋め込み層、9・・・n−InP埋
め込み層、10・−n−I nGaAsガイド層、11
・・・MQW活性層、12・・・n−InPnフェッチ
ップ層、13 ・高抵抗InP埋め込み層、141r+
 G a A s P導波路層、21 ・= S i○
2膜、3トプロトン注入領域、32・・・p側電極、3
 B −n側電極、である。
FIG. 1 is a structural diagram representing the concept of the present invention. FIG. 2 is a diagram showing the manufacturing process of a semiconductor laser manufactured using the present invention, and FIGS. 3 and 4 are diagrams showing the manufacturing process of a conventional semiconductor laser, respectively. FIG. 5 is a diagram showing the manufacturing method and element structure of a 5PIC that integrates a DFB semiconductor laser and a semiconductor optical modulator manufactured using the present invention,
FIG. 6 is a diagram showing a manufacturing method and device structure of an integrated device of a two-wavelength semiconductor laser and a guiding waveguide manufactured using the present invention. FIG. 7 is a diagram showing the relationship between stripe width and growth rate, and FIG. 8 is a diagram showing the relationship between MQW elliptical structure well thickness and emission wavelength. FIG. 9 is a diagram illustrating the structure of an integrated device of a two-wavelength semiconductor laser and a leading waveguide, which is the same as that shown in FIG. 6, by a conventional manufacturing method. In the figure, 1-n-I n P substrate, 2=-n-1nP cladding layer, 3...InGaAsP active layer, 4...p
-InP cladding layer, 5-p-InP layer, 6 ・pIn
P layer, 7-p''-I nGaAski'l = Tsubu layer,
8...p-InP buried layer, 9...n-InP buried layer, 10.-n-I nGaAs guide layer, 11
. . . MQW active layer, 12 . . . n-InPn fetch layer, 13 ・High resistance InP buried layer, 141r+
G a A s P waveguide layer, 21 ・= S i○
2 membrane, 3 proton injection region, 32... p-side electrode, 3
B - n-side electrode.

Claims (1)

【特許請求の範囲】 1、平坦な半導体表面に誘電体薄膜を形成した後、2本
の平行なストライプ状に加工し、選択的に結晶成長を行
い、前記ストライプにはさまれた領域に成長した半導体
層を活性領域や光導波路などに加工することを特徴とす
る、光半導体素子の製造方法。 2、特許請求の範囲第1項記載の光半導体素子の製造方
法において、前記ストライプの幅を変化させることを特
徴とする、光半導体素子の製造方法。
[Claims] 1. After forming a dielectric thin film on a flat semiconductor surface, it is processed into two parallel stripes, and crystals are selectively grown in the region sandwiched between the stripes. A method for manufacturing an optical semiconductor device, which comprises processing a semiconductor layer into an active region, an optical waveguide, etc. 2. A method for manufacturing an optical semiconductor device according to claim 1, characterized in that the width of the stripes is varied.
JP2222928A 1990-08-24 1990-08-24 Method for manufacturing semiconductor optical integrated device Expired - Lifetime JPH0750815B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2222928A JPH0750815B2 (en) 1990-08-24 1990-08-24 Method for manufacturing semiconductor optical integrated device
DE69115596T DE69115596T2 (en) 1990-08-24 1991-08-26 Method of manufacturing an optical semiconductor device
DE69128097T DE69128097T2 (en) 1990-08-24 1991-08-26 Method of manufacturing an optical semiconductor device
US07/750,172 US5250462A (en) 1990-08-24 1991-08-26 Method for fabricating an optical semiconductor device
EP91114272A EP0472221B1 (en) 1990-08-24 1991-08-26 Method for fabricating an optical semiconductor device
EP94118307A EP0643461B1 (en) 1990-08-24 1991-08-26 Method for fabricating an optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2222928A JPH0750815B2 (en) 1990-08-24 1990-08-24 Method for manufacturing semiconductor optical integrated device

Related Child Applications (1)

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JP8170997A Division JP2842387B2 (en) 1996-07-01 1996-07-01 Manufacturing method of semiconductor optical integrated device

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Publication Number Publication Date
JPH04105383A true JPH04105383A (en) 1992-04-07
JPH0750815B2 JPH0750815B2 (en) 1995-05-31

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US5284791A (en) * 1991-08-09 1994-02-08 Nec Corporation Method of making tunable semiconductor laser
JPH06216464A (en) * 1993-01-20 1994-08-05 Nec Corp Manufacture of optical semiconductor element
JPH08236856A (en) * 1995-02-22 1996-09-13 Nec Corp Manufacture of optical semiconductor element
US5565693A (en) * 1993-01-07 1996-10-15 Nec Corporation Semiconductor optical integrated circuits
US5579155A (en) * 1993-11-11 1996-11-26 Nec Corporation Semiconductor optical amplifier
JPH08334657A (en) * 1996-07-01 1996-12-17 Nec Corp Production of semiconductor optical integrated element
JPH0946002A (en) * 1995-07-28 1997-02-14 Nec Corp Semiconductor optical device and method of manufacturing the same
JPH0992935A (en) * 1995-09-23 1997-04-04 Nec Corp Optical semiconductor element and its manufacture
US5703974A (en) * 1995-07-13 1997-12-30 Nec Corporation Semiconductor photonic integrated circuit and fabrication process therefor
JP2008251649A (en) * 2007-03-29 2008-10-16 Anritsu Corp Semiconductor light emitting device and manufacturing method thereof

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JPH01319986A (en) * 1988-06-21 1989-12-26 Matsushita Electric Ind Co Ltd Semiconductor laser device

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JPS50159971A (en) * 1974-06-13 1975-12-24
JPS6187385A (en) * 1984-10-05 1986-05-02 Nec Corp Buried-structure semiconductor laser
JPH01319986A (en) * 1988-06-21 1989-12-26 Matsushita Electric Ind Co Ltd Semiconductor laser device

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5284791A (en) * 1991-08-09 1994-02-08 Nec Corporation Method of making tunable semiconductor laser
JPH0563303A (en) * 1991-09-04 1993-03-12 Agency Of Ind Science & Technol Manufacture of optical functional element
US5565693A (en) * 1993-01-07 1996-10-15 Nec Corporation Semiconductor optical integrated circuits
US5770466A (en) * 1993-01-07 1998-06-23 Nec Corporation Semiconductor optical integrated circuits and method for fabricating the same
JPH06216464A (en) * 1993-01-20 1994-08-05 Nec Corp Manufacture of optical semiconductor element
US5579155A (en) * 1993-11-11 1996-11-26 Nec Corporation Semiconductor optical amplifier
JPH08236856A (en) * 1995-02-22 1996-09-13 Nec Corp Manufacture of optical semiconductor element
US5703974A (en) * 1995-07-13 1997-12-30 Nec Corporation Semiconductor photonic integrated circuit and fabrication process therefor
JPH0946002A (en) * 1995-07-28 1997-02-14 Nec Corp Semiconductor optical device and method of manufacturing the same
JPH0992935A (en) * 1995-09-23 1997-04-04 Nec Corp Optical semiconductor element and its manufacture
JPH08334657A (en) * 1996-07-01 1996-12-17 Nec Corp Production of semiconductor optical integrated element
JP2008251649A (en) * 2007-03-29 2008-10-16 Anritsu Corp Semiconductor light emitting device and manufacturing method thereof

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