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JPH04119667A - Optical connection integrated circuit - Google Patents

Optical connection integrated circuit

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Publication number
JPH04119667A
JPH04119667A JP23895790A JP23895790A JPH04119667A JP H04119667 A JPH04119667 A JP H04119667A JP 23895790 A JP23895790 A JP 23895790A JP 23895790 A JP23895790 A JP 23895790A JP H04119667 A JPH04119667 A JP H04119667A
Authority
JP
Japan
Prior art keywords
light
light emitting
emitting element
integrated circuit
elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23895790A
Other languages
Japanese (ja)
Other versions
JP2764127B2 (en
Inventor
Itsuo Hayashi
林 厳雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Optoelectronics Technology Research Laboratory
Original Assignee
Optoelectronics Technology Research Laboratory
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optoelectronics Technology Research Laboratory filed Critical Optoelectronics Technology Research Laboratory
Priority to JP2238957A priority Critical patent/JP2764127B2/en
Publication of JPH04119667A publication Critical patent/JPH04119667A/en
Application granted granted Critical
Publication of JP2764127B2 publication Critical patent/JP2764127B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Optical Integrated Circuits (AREA)

Abstract

PURPOSE:To hold down the delay of signal due to a metal wiring by a method wherein specific elements inside an integrated circuit are connected together through an optical waveguide formed on a wafer different from another wafer on which the integrated circuit has been formed. CONSTITUTION:A light emitting element 17 of A IV-V compound is connected to a specific terminal 16 of an electronic circuit 14 on an Si substrate 13, and an Si photodetective element 19 is connected to the other specific terminal 18 of the electronic circuit 14. Amplifiers 24 and 25, a light emitting element 26, and a photodetective element 27 are formed so as to connect a photodetective element 21 and a light emitting light element 22 provided onto a GaAs substrate 20 together with an optical waveguide 23. The elements 26 and 27 are formed of GaAs the same as the substrate 20. Wafers 11 and 12 are disposed in parallel and close to each other, the elements 17 and 21 are provided confronting each other, and the elements 19 and 22 are arranged facing each other. By this setup, the terminals 16 and 18 are connected together equivalent to that they are electrically connected together.

Description

【発明の詳細な説明】 [産業上の利用分野〕 本発明は、集積回路に関し、特に電子素子間を光で接続
する光接続集積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit, and more particularly to an optical connection integrated circuit that optically connects electronic elements.

[従来の技術] 単一の半導体基板上に複数の電子素子を集積して電子回
路を構成したIC(集積回路)、LSI(大規模集積回
路)、VLSI(超LSI)等が広く知られている。
[Prior Art] ICs (integrated circuits), LSIs (large scale integrated circuits), VLSIs (very large scale integrated circuits), etc., which constitute electronic circuits by integrating multiple electronic elements on a single semiconductor substrate, are widely known. There is.

これら従来の集積回路では、いずれの場合においても集
積回路を構成する電子素子間は、金属配線等によって電
気的に接続されている。
In any of these conventional integrated circuits, electronic elements constituting the integrated circuit are electrically connected by metal wiring or the like.

[発明が解決しようとする課題] しかしながら、近年の電子素子の高集積化に伴い、配線
の接続距離が増加し、金属配線による抵抗と静電容量の
増大が信号の遅延と、減衰をもたらすという問題点があ
る。加えて、高集積化によって各電子素子は微小化し、
その駆動に必要な電力の低下が、金属配線による抵抗と
静電容量の影響を大きくするという問題点もある。さら
に、金属配線では周囲の金属配線との間で信号の干渉が
生じるという問題点がある。
[Problem to be solved by the invention] However, as electronic devices become more highly integrated in recent years, the connection distance of wiring increases, and the increase in resistance and capacitance due to metal wiring causes signal delay and attenuation. There is a problem. In addition, due to high integration, each electronic element is becoming smaller and smaller.
There is also the problem that the reduction in the power required for driving increases the influence of the resistance and capacitance of the metal wiring. Furthermore, metal wiring has a problem in that signal interference occurs with surrounding metal wiring.

本発明は、金属配線による信号の遅延と減衰を減少させ
ると共に、信号の干渉を抑制することを目的とする。
An object of the present invention is to reduce signal delay and attenuation caused by metal wiring, and to suppress signal interference.

[課題を解決するための手段] 本発明によれば、複数の電子素子が集積され、該複数の
電子素子のうち、互いに電気的に接続されるべき第1の
特定の電子素子と第2の特定の電子素子にそれぞれ第1
の発光素子と第1の受光素子が接続されている第1のウ
ェハーと、該第1のウェハーに平行かつ近接させて配置
され、前記第1のウェハーに対向する面上であって、前
記第1の発光素子と第1の受光素子とに対向する位置に
それぞれ第2の受光素子と第2の発光素子とが設けられ
、該第2の受光素子と第2の発光素子とは光導波路によ
って光学的に接続されている第2のウェハーとを有する
ことを特徴とする光接続集積回路か得られる。
[Means for Solving the Problems] According to the present invention, a plurality of electronic devices are integrated, and among the plurality of electronic devices, a first specific electronic device and a second specific electronic device to be electrically connected to each other are integrated. The first
a first wafer to which a light-emitting element and a first light-receiving element are connected; A second light receiving element and a second light emitting element are provided at positions facing the first light emitting element and the first light receiving element, respectively, and the second light receiving element and the second light emitting element are connected to each other by an optical waveguide. An optically connected integrated circuit is obtained, characterized in that it has a second wafer that is optically connected.

[実施例] 以下に図面を参照して本発明の詳細な説明する。[Example] The present invention will be described in detail below with reference to the drawings.

第1図は、本発明の一実施例の光接続集積回路の略断面
図である。第1図に示すように本実施例の集積回路は、
ウェハー11及び12を有している。
FIG. 1 is a schematic cross-sectional view of an optical connection integrated circuit according to an embodiment of the present invention. As shown in FIG. 1, the integrated circuit of this example is
It has wafers 11 and 12.

ウェハー11は、Si基板13を有し、その上部には電
子素子(図示せず)を集積した電子回路14か形成され
ている。この電子回路14は、部の配線を除いて完全な
1つの電子回路網を構成している。即ち、配線が完全で
あれば、LSIとして機能する。また、この電子回路1
4の電子素子相互間の接続には金属配線(図示せず)が
用いられており、金属配線は配線スペース15内に収め
られている。
The wafer 11 has a Si substrate 13, on which an electronic circuit 14 in which electronic elements (not shown) are integrated is formed. This electronic circuit 14 constitutes a complete electronic circuit network except for wiring. That is, if the wiring is perfect, it functions as an LSI. In addition, this electronic circuit 1
Metal wiring (not shown) is used to connect the electronic elements 4 to each other, and the metal wiring is housed within the wiring space 15.

電子回路14の特定の端子16には面発光素子17が、
また、他の特定の端子18には面光光素子19が接続さ
れている。ここで端子16と端子18とは、電子回路設
計上、電気的に接続されていなければならない端子であ
る。なお、面発光素子17は、■−v族化合物のレーザ
またはLED(発光ダイオード)であり、面光光素子1
9は、Si系または■−V族化合物の受光素子である。
A surface emitting element 17 is provided at a specific terminal 16 of the electronic circuit 14.
Further, a surface light optical element 19 is connected to another specific terminal 18 . Here, the terminal 16 and the terminal 18 are terminals that must be electrically connected in terms of electronic circuit design. The surface light emitting device 17 is a laser or LED (light emitting diode) of a ■-v group compound, and the surface light emitting device 1
9 is a light-receiving element made of Si-based or ■-V group compound.

ウェハー12は、GaAs基板20上に形成された受光
素子21と発光素子22とを有している。
The wafer 12 has a light receiving element 21 and a light emitting element 22 formed on a GaAs substrate 20.

そして、この受光素子21と発光素子22とを光導波路
23により接続するために、増幅器24゜25、及び発
光素子26と受光素子27とが形成されている。この発
光素子26と受光素子27とは、基板と同じGaAs系
の素子である。これらのウェハー11.12は互いに平
行に、かつ近接させて配置され、発光素子17と受光素
子21、受光素子19と発光素子22とがそれぞれ正対
している。これによって、端子16と端子 18とが電
気的に接続されたのと等価になる。
In order to connect the light receiving element 21 and the light emitting element 22 through an optical waveguide 23, amplifiers 24 and 25, and a light emitting element 26 and a light receiving element 27 are formed. The light emitting element 26 and the light receiving element 27 are GaAs based elements, which are the same as the substrate. These wafers 11 and 12 are arranged parallel to each other and close to each other, and the light emitting element 17 and the light receiving element 21, and the light receiving element 19 and the light emitting element 22 are facing each other. This is equivalent to electrically connecting the terminals 16 and 18.

本実施例では、例えば、金属配線での伝送時間が数ns
〜数IQnsかかるところを、0.1ns程度にするこ
とができる。しかも、光のパワーに無関係に一定速度で
伝送できる。
In this embodiment, for example, the transmission time in metal wiring is several ns.
What would take up to several IQns can be reduced to about 0.1 ns. Moreover, it can be transmitted at a constant speed regardless of the optical power.

ウェハー11とウェハー12との間隔は、100μm以
下、望ましくは10μm程度である。2つのウェハー1
1.12の間隔を狭くしておけば、発光素子17と受光
素子22との間(発光素子22と受光素子19との間)
での光信号の送受の際の光の拡がりによる漏れが減少し
、信号の減衰を防止できる。ここで、2枚のウェハー1
1.12間の間隔を均一にするために、2枚のウエノ1
−11.12の間に無色透明のスペーサを挟んで、接着
しても良い。この様に、光接続部分をそれぞれ異なるウ
ェハーに分離することにより、それぞれのウェハーの製
作が容易になり、それぞれ個別のテストも可能となり歩
留まりが改善される。
The distance between the wafers 11 and 12 is 100 μm or less, preferably about 10 μm. two wafers 1
1. If the interval 12 is narrowed, the distance between the light emitting element 17 and the light receiving element 22 (between the light emitting element 22 and the light receiving element 19)
This reduces leakage due to the spread of light when transmitting and receiving optical signals, and prevents signal attenuation. Here, two wafers 1
1. In order to make the spacing between
A colorless and transparent spacer may be inserted between -11 and 12 and bonded. By separating the optical connection portions into different wafers in this manner, each wafer can be manufactured easily, and individual testing can be performed, thereby improving yield.

発光素子17,22、及び受光素子19.21は、共に
そのサイズは小さいほうが駆動電流が小さくてすむみ、
かつ高速動作が可能となる。そして、その大きさは、〜
10μm10μm程はそれ以下が好ましい。
The smaller the size of both the light emitting elements 17, 22 and the light receiving element 19.21, the smaller the drive current will be required.
In addition, high-speed operation is possible. And its size is ~
The thickness is preferably about 10 μm or less.

また、光導波路23の幅ωは、ω−1〜10μm程度で
ある。
Further, the width ω of the optical waveguide 23 is approximately ω-1 to 10 μm.

上記例では特定の2点間を接続することについて述べた
が、本発明によれば、複数組の特定の2点間を接続した
り、1対多または多対1の接続も可能である。そのこと
を第2図を参照して説明する。
Although the above example describes connecting two specific points, according to the present invention, it is also possible to connect a plurality of sets of two specific points, or to connect one-to-many or many-to-one. This will be explained with reference to FIG.

第2図には、ウェハー12上に形成された受光素子26
aと発光素子27a、受光素子26bと発光素子27b
、を光導波路23a、23bによって接続した場合が示
されている。なお、ウニ/1−11側の説明は省略する
FIG. 2 shows a light receiving element 26 formed on the wafer 12.
a and the light emitting element 27a, the light receiving element 26b and the light emitting element 27b
, are shown connected by optical waveguides 23a and 23b. Note that the explanation of the sea urchin/1-11 side will be omitted.

図のように光導波路23aと23bとを互いに交差させ
ても(α々90°の場合)光導波路23aと23b内に
伝送される光信号には相互干渉(カップリング)はほと
んど生じない。また、光導波路23bは屈曲させること
もできる。従って、複数組の特定の2点間を比較的自由
に接続することができる。
Even if the optical waveguides 23a and 23b cross each other as shown in the figure (if α is 90°), almost no mutual interference (coupling) will occur in the optical signals transmitted within the optical waveguides 23a and 23b. Moreover, the optical waveguide 23b can also be bent. Therefore, multiple sets of specific two points can be connected relatively freely.

さらに、カップリング手段28を利用すれば、光導波路
23b内を伝導する光信号を複数の光導波路29内に分
割して導くこともてきる。また、逆に複数の光導波路2
9からの光信号を一つの導波路内に導くこともできる。
Furthermore, if the coupling means 28 is used, the optical signal transmitted in the optical waveguide 23b can be divided and guided into a plurality of optical waveguides 29. Moreover, conversely, a plurality of optical waveguides 2
It is also possible to guide the optical signals from 9 into one waveguide.

即ち、パスライン等に利用することかできる。That is, it can be used as a pass line or the like.

この様に、光導波路を電子回路が形成されたウェハーと
は異なるウェハー上に形成するようにしたことで、電子
回路の如何なる2点間でも高速かつ相互干渉のない信号
接続か可能となり、電子回路の設計の自由度か広がる。
In this way, by forming the optical waveguide on a wafer different from the wafer on which the electronic circuit is formed, it is possible to connect signals at high speed and without mutual interference between any two points in the electronic circuit, and the electronic circuit The freedom of design is expanded.

なお、上記実施例では、一方のウェハーにのみ電子回路
が形成されている場合に付いて説明したか、電子回路の
一部を他方のウェハー上に形成するようにしても良い。
In the above embodiments, the case where the electronic circuit is formed only on one wafer has been described, or a part of the electronic circuit may be formed on the other wafer.

また、上記実施例では2枚のウェハーを用いた場合につ
いて説明したが、これに限られるものではなく、2枚以
上のウェハーを重ね合わせることもできる。
Further, in the above embodiment, a case was explained in which two wafers were used, but the present invention is not limited to this, and two or more wafers may be stacked on top of each other.

[発明の効果] 本発明によれば、集積回路内の特定素子間の接続を、集
積回路が形成されたウェハーとは異なるウェハー上に形
成した光導波路を用いて接続するようにしたことで、金
属配線による信号の遅延を抑えることができる。
[Effects of the Invention] According to the present invention, specific elements in an integrated circuit are connected using optical waveguides formed on a wafer different from the wafer on which the integrated circuit is formed. Signal delay due to metal wiring can be suppressed.

また、配線間の信号の干渉を抑えることができる。Furthermore, signal interference between wiring lines can be suppressed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の位置実施例の略断面図、第2図は光導
波路を説明するための図である。 11.12・・・ウェハー 13・・・81基板、14
・・・電子回路、15・・・配線スペース、16.18
・・・端子、17.22・・・面発光素子、19.21
・面発光素子、20・・・GaAs基板、23・・・光
導波路、24.25・・・増幅器、26・・・発光素子
、27・・・受光素子、28・・・カップリング手段、
29・・・光導波路。
FIG. 1 is a schematic sectional view of an embodiment of the present invention, and FIG. 2 is a diagram for explaining an optical waveguide. 11.12...Wafer 13...81 substrate, 14
...Electronic circuit, 15...Wiring space, 16.18
... terminal, 17.22 ... surface emitting element, 19.21
- Surface emitting element, 20... GaAs substrate, 23... optical waveguide, 24.25... amplifier, 26... light emitting element, 27... light receiving element, 28... coupling means,
29... Optical waveguide.

Claims (1)

【特許請求の範囲】 1、複数の電子素子が集積され、該複数の電子素子のう
ち、互いに電気的に接続されるべき第1の特定の電子素
子と第2の特定の電子素子にそれぞれ第1の発光素子と
第1の受光素子が接続されている第1のウェハーと、 該第1のウェハーに平行かつ近接させて配置され、前記
第1のウェハーに対向する面上であって前記第1の発光
素子と第1の受光素子とに対向する位置にそれぞれ第2
の受光素子と第2の発光素子とが設けられ、該第2の受
光素子と第2の発光素子とは光導波路によって光学的に
接続されている第2のウェハーと、 を有することを特徴とする光接続集積回路。
[Claims] 1. A plurality of electronic devices are integrated, and among the plurality of electronic devices, a first specific electronic device and a second specific electronic device that are to be electrically connected to each other are each provided with a second specific electronic device. a first wafer to which a first light-emitting element and a first light-receiving element are connected; A second light-emitting element and a second light-receiving element are respectively located at positions facing the first light-emitting element and the first light-receiving element.
A second wafer is provided with a light receiving element and a second light emitting element, and the second light receiving element and the second light emitting element are optically connected by an optical waveguide. optical interconnection integrated circuit.
JP2238957A 1990-09-11 1990-09-11 Optical connection integrated circuit Expired - Fee Related JP2764127B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2238957A JP2764127B2 (en) 1990-09-11 1990-09-11 Optical connection integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2238957A JP2764127B2 (en) 1990-09-11 1990-09-11 Optical connection integrated circuit

Publications (2)

Publication Number Publication Date
JPH04119667A true JPH04119667A (en) 1992-04-21
JP2764127B2 JP2764127B2 (en) 1998-06-11

Family

ID=17037814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2238957A Expired - Fee Related JP2764127B2 (en) 1990-09-11 1990-09-11 Optical connection integrated circuit

Country Status (1)

Country Link
JP (1) JP2764127B2 (en)

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
OPTICAL AND QUANTUMN ELECTRONICS 20=1988 *
PROCEEDINGS OF THE IEEE=1984 *

Also Published As

Publication number Publication date
JP2764127B2 (en) 1998-06-11

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