JPH04148217A - Processor status display device for multi-computer system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a multi-computer system composed of a plurality of unit processors, and particularly relates to a multi-computer system that displays the operating status of each unit processor. The present invention relates to a processor status display device.

(Prior art) Generally, in a multi-computer system composed of a plurality of unit processors, each unit processor is
Each unit printed wiring board is mounted on one unit printed wiring board (hereinafter abbreviated as PC board), and each unit printed wiring board is removably attached to one main printed wiring board (hereinafter abbreviated as main PC board) using, for example, a signal connector. ing.

By providing the unit PC board on which each unit processor is mounted in a removable manner to the main PC board, the number of unit processors to be used can be adjusted according to the amount of information processing performed by this multi-computer system and the scale of the object to be controlled. The number of unit processors can be changed, or inspection and repair of each unit processor can be simplified.

Therefore, in such a multi-computer system, it is very important for the operator to accurately grasp the operating state of each unit processor.

FIG. 4 is a block diagram showing a processor status display device for a multi-computer system composed of, for example, four unit processors. The status setting panel 1 shows whether the unit PC board of each unit processor numbered 0 to 3 is attached to the main PC board, or if the unit processor is intentionally separated from the multi-computer system, the operator can There are four switches 2a, 2b, 2c, and 2d operated by the operator. Turning on each switch 28 to 2d indicates that the corresponding unit processor is connected, and opening each switch 2a to 2d indicates that the corresponding unit processor is disconnected from the system.

Each switch 2a, 2b, 2c, 2d is connected to each inverter 3a, 3b while each switch 2a to 2d is turned on.
, 3c, 3d, the attachment status signal al*a2
+a3+a4 is output and applied to each - input terminal of AND gates 5a, 5b, 5c, and 5d having three input terminals. The other input terminals of each AND gate 5a to 5d are supplied with online status signals b+, b2. b3. b4 is input. Further, inverters 4a, 4b are connected to another input terminal of each AND gate 5a, 5b, 5c, 5d.

Wait state signals CI+2+C3+04 are inputted to 4c and 4d from each unit processor.

The online state signals S and -b4 indicate that each unit processor is in an online state with respect to the main control unit via the main PC board, and the wait state signals C1 to C4
indicates the state of waiting for a command from the main control unit. In addition, the above-mentioned wearing status signals a1 to a4 are output from the main PC and the main PC in each unit.
It shows whether the signal line between the board and the board is physically connected or disconnected, and whether it is intentionally set to the disconnected state.

Each AND signal output from each AND gate 5a, 5b, 5c, 5d is sent to a gate circuit 6a.

Drive circuits 7a, 7b via 6b, 6c, 6d.

It is input to 7c and 7d. Further, a DC power supply VCC is supplied to each drive circuit 7a, 7b, 7c, 7d, and each display lamp 10a, 10b arranged on the display panel 9 via a protective resistor 8a, 8b, 8c, 8d. , 10c
, 10d. Each indicator lamp 10
a, 10b.

The other ends of 10c and 10d are the respective drive circuits 7a.

It is connected to the output ends of 7b, 7c, and 7d.

Therefore, when an H level AND signal is output from each AND gate 5a to 5d, the output terminal of each drive circuit 7a to 7d becomes an L level, current flows to each display lamp 10a to 10d, and each display lamp 10a to 10d lights up.

In the processor status display device for a multi-computer system having such a configuration, the operator copies the copy register of each unit processor to the PSW copy register once, as shown in FIG. Among them, wait-by-soto of each unit processor is extracted.

The operator monitors the status and determines which unit processor to disconnect from this multi-computer system or which unit processor to incorporate into this multi-computer system by operating the switches 28 to 2d of the status setting X channel 1. decide.

When the switches 2a to 2d are opened, the indicator lamps 10a to 10d, which indicate the operating status of the unit processor corresponding to the opened switch, are unconditionally turned off.

Conversely, when the switches 2a to 2d are turned on, the unit processor or the mounted unit PC corresponding to the turned-on switch
The display lamps 10a to 10d corresponding to the unit processor are lit only when the board is attached to the main PC board, the unit processor is on-line, and the unit processor is not in a wait state. That is, only the display lamps 10a to 10d indicating the unit processors currently operating normally are lit.

However, the processor status display device for the multi-computer system shown in FIG. 4 also has the following problem.

That is, since the operator sets the on/off state of each switch 2a to 2d on the status setting panel 1 while checking the actual mounting state of each unit PC board to the main PC board, there is no possibility that the operator may set it incorrectly. Therefore, there may be cases where the setting states of the switches 2 to 2d and the actual mounting states do not match. In this case, a problem arises in that even if a command is sent from the main control section, a unit processor that is not actually installed will not operate.

In addition, each time the operator attaches and detaches the unit PC board to the main PC board,
You have to reconfigure the settings, which is very troublesome.

Furthermore, since it is necessary to attach the status setting panel 1 externally, problems arise in terms of appearance and securing a mounting location.

(Problem to be Solved by the Invention) As described above, in the conventional processor status display device for a multi-computer system, it is difficult for an operator to check whether or not a unit PC board on which a unit processor is mounted is actually attached to the main PC board. Check each switch 2a on the status setting panel 1.
2d closing and opening operations were being performed. Therefore, incorrect settings may occur, and the burden on the operator may increase.

The present invention was made in view of these circumstances, and
By inserting a hot insertion/removal connector between each unit PC board and the main PC board, and installing an installation status signal generation circuit on the unit PC board side of this connector, each unit processor can be connected to the unit PC board of the main PC board. When installed, the installation status signal is automatically output, allowing the operating status of each unit processor to be displayed correctly without the operator having to perform the same operations.
An object of the present invention is to provide a processor status display device for a multi-computer system that can improve operability and reliability of the device.

[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the present invention provides a plurality of signal connectors or a main printed wiring board to which a plurality of unit processors are respectively mounted. A unit printed wiring board in which each unit printed wiring board is detachably installed via a dedicated signal connector, each unit processor is in an online state, the relevant unit processor is not in a wait state, and the relevant unit processor is further mounted. A processor status display device for a multi-computer system that indicates that a processor is installed on the main printed wiring board is installed between the main printed wiring board and each unit printed wiring board, and is connected to a power source for each unit printed wiring board. A plurality of active insertion/removal connectors that connect the installation status signals of unit processors and unit processors with a time difference are provided between each terminal of each active insertion/removal connector on the unit marked wiring board side, and each unit printed wiring board is connected to an active insertion/removal connector. and a plurality of mounting state signal generation circuits that transmit mounting state signals to the main printed wiring board while mounted on the main printed wiring board via signal connectors, and The inverted signal of the wait status signal sent from each unit processor via the connector, the online status signal sent from each unit processor side via each signal connector, and each attachment status signal generated via each online insertion/removal connector. Displays the operating status of each unit processor according to the signal level of the AND signal output from multiple AND circuits and the AND signal output from each AND circuit. The device is equipped with a plurality of display devices.

(Function) In the processor status display device for a multi-computer system configured as described above, the unit PC board on which the unit processor is mounted and the main PC board are connected through a signal connector and a connector for active insertion/removal. The signal connector passes various data and various status signals such as the online status and wait status of the unit processor. On the other hand, as is well known, an active insertion/removal connector has a plurality of connection terminals including a power supply terminal and a signal terminal, and when connecting, the power supply terminal is connected first and then the signal terminal is connected.

Conversely, when disconnecting, the signal power terminal is disconnected first and then the power source terminal is disconnected. That is, the connection of signal terminals,
Disconnection is always performed with the power turned on.

Therefore, when the unit PC board is installed on the main PC board, the installation status signal is output from the installation status signal generation circuit connected to each terminal on the unit PC board side of the active insertion/removal connector.
Sent to the C board side. Therefore, when the unit processor mounted on the attached unit PC board goes online, releases the wait state, and actually starts processing, the display of the unit processor displays the operating state.

Conversely, if the unit PC board is separated from the main PC board,
Since the installation state signal is cut off, the operation state display on the display of the corresponding unit processor is canceled.

(Example) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is an external view showing a multi-computer system incorporating the processor status display device of the embodiment. In the figure, 21 is a main PC board connected to, for example, an input/output device or a controlled object (not shown). Signal sockets 22a, 22b, 22 constituting one side of the signal connector on this main PC board 21
c.

22d, =-, 22n, 23a, 23b, 23c23d
,...23n is installed. Furthermore, power sockets 24a and 24b constituting one of the connectors for active insertion/removal are provided at intermediate positions between the respective signal sockets.

24c and 24d are attached.

Further, in the figure, 25a, 25b, 25c, and 25d are unit PC boards each having a unit processor mounted thereon. Signal plugs 26d and 27d, which are inserted into signal sockets 22d and 23d attached to the main PC board 21, are obliquely formed on one side of the unit PC board 25d. Further, the main PC is connected between each signal plug 26d and 27d.
A power plug 28d is attached to be inserted into a power socket 24d attached to the board 21. Although not shown, there is another unit PC board 25a.

25b and 25c also have a main P as in the unit PC board 25d.
A signal plug and a power plug to be inserted into each signal socket and power socket attached to the C board 21 are attached.

Figure 3 shows the main PC board 21 that constitutes the active insertion/removal connector.
FIG. 3 is a schematic diagram showing a schematic configuration of a power socket 24d and a power plug 28d of a unit PC board 25d. Contacts 2 are inserted into each of the four holes cut into the power socket 24d.
9a, 29b.

29c and 29d are installed, and each contact 29
Among the terminals 30a, 30b, 30d, and 30d of terminals 30a, 29b, 29c, and 29d on the main PC board 21 side, the terminal 30a,
3Ql) is a power supply terminal, the terminal 30a is a ground terminal, and the terminal 39b is a (+) terminal. Further, the terminal 30d is grounded by a grounding pattern 31. The terminal 30c is a signal terminal for taking out a mounting state signal.

The power plug 28d facing the power socket 24d has a
Each of the contacts 29a, 29b.

Four pins 32a corresponding to 29c and 29d.

32b, 32c, and 33d are provided, and among the pins 32a and 32b to which power is supplied, the ground side pin 32a is the longest, the (+) side pin 32b is the next longest, and the signal pin 3
2c and 32d are the shortest. And unit PC board 25d
Each pin 32a on the side.

Each terminal 33a corresponds to 32b, 32c, and 33d.

Terminal 33a among 33b, 33c, and 33d.

33b is a power receiving terminal. And terminal 33C133d
A short circuit pattern 34 is provided between the two as a mounting state signal generating circuit.
is formed.

In such a connector for hot insertion/removal, the power plug 2
8d to the power socket 24d, first connect the ground side pin 32a of the power supply pins 32a and 32b.
contact 29a, and then (+) side pin 32
b contacts contact 29b. Therefore, at this point, the unit processor mounted on the unit PC board 25d becomes operational. Next, the signal pin 32c.

32d contacts contacts 29c and 29d.

As a result, the signal terminal 30d of the main PC board 21 becomes the ground potential.

In addition, other unit PC boards: 25a, 25b.

Each active insertion/removal connector provided between 25c and the main PC board 21 is also connected to the unit PC board 25d and the main PC board 25d shown in FIG.
It has the same configuration as each active insertion/removal connector provided between the C board 21 and the active insertion/removal connector.

FIG. 1 is a block diagram showing a schematic configuration of a processor status display device incorporated in this multi-computer system. The same parts as in FIG. 4 are given the same reference numerals. Therefore, detailed explanation of the overlapping parts will be omitted.

Each power socket 24 having the configuration shown in FIG.
The signal levels of the output signals of the respective signal terminals 30c of a to 24d are inverted by inverters 38 to 3d, respectively, and are inputted to one input terminal of AND gates 5a to 5d as mounting state signals a, to a4. Further, signal sockets 22a to 22d, 23a to 2 are sent from the unit processors of each unit PC board 25a to 25d mounted on the main PC board 21.
Each of the online state signals S to B4 inputted to the main PC board 21 side via 3d is inputted to the other input terminal of each AND gate 5a to 5d. Furthermore, each signal socket 22a-22d from each unit processor.

Each of the weight state signals C1 to C4 manually input to the main PC board 21 side via 23a to 23d is transmitted to each inverter 48 to 4.
After the signal level is inverted at step d, it is input to the last blade terminal of each of the AND gates 5a to 5d. I wanted to,
Each of the AND gates 5a to 5d receives attachment state signals a1 to a4.
is at H level, online state signals b1 to b4 are at H level, and wait signal C1-(:4 is at L level.

Each AND signal output from each AND gate 5a, 5b, 5c, 5d is sent to a gate circuit 6a.

Drive circuits 7a, 7b via 6b, 6c, 6dG.

It is input to 7c and 7d. Further, a DC power supply VCC is supplied to each drive circuit 7a, 7b, 7c, 7d, and each display lamp 10a, 10b arranged on the display panel 9 via a protective resistor 8a, 8b, 8c, 8d. , 10c
, 10d. Each indicator lamp 10
a, 10b.

The other ends of 10c and 10d are the respective drive circuits 7a.

It is connected to the output ends of 7b, 7c, and 7d.

Therefore, when an H level AND signal is output from each AND gate 5a to 5d, the output terminal of each drive circuit 7a to 7d becomes an L level, current flows to each display lamp 10a to 10d, and each display lamp 10a to 10d lights up.

Next, the operation of the processor status display device of the multi-computer system configured as described above will be explained.

First, the various electronic components mounted on the main PC board 21 are powered on. For example, if the unit PC boards 25a to 25d are not attached to the main PC board 21 in this state, the signal terminal 30c of the active insertion/removal connector on the main PC board 21 side is open, so each inverter 3
Attachment state signals a, -a4 inputted to AND gates 5a-5d via a-3d are at L level. Therefore, each of the AND gates 5a to 5d is not established, and each of the display lamps 10a to 10d remains off.

Next, for example, one unit PC board 25d is connected to the main PC board 25d.
1, the main PC board 21 of the active insertion/removal connector
The side signal terminal 30c is grounded and becomes L level. Therefore, the mounting state signal a4 inputted to the AND gate 5d via the inverter 3d changes to H level. Unit PC
When the board 25d is attached to the main PC board 21, power is supplied from the main PC board 21 to the unit PC board 25d, and the unit processor mounted on the unit PC board 25d becomes operational. When this unit processor enters the online state with respect to the main PC board 21 or the main control unit connected via this main PC board 21, the unit processor sends a signal to the H level online state via the sockets 22d and 23d. Signal b4 is the main PC board 2
It is sent to the 1st side. At the same time, the corresponding unit processor enters a wait state and outputs an H-level wait state signal c4. Since the signal level of this wait state signal c4 is inverted by the inverter 4d, the AND gate 5d does not hold. Therefore, in this state, the display lamp 10d of the corresponding unit processor does not light up yet.

Then, when the corresponding unit processor actually starts a processing operation in response to a command from the main control section, the wait state is canceled and the wait state signal C4 changes to the L level. Therefore, the TE signal level is inverted by the inverter 4d and becomes H level, so the AND gate 5d is established. As a result, an H-level AND signal is output from the AND gate 5d, so that the display lamp 10d of the corresponding unit processor lights up.

The display operation of each of the display lamps 10a to 10c of the corresponding unit processor corresponding to the mounting operation of the other unit PC boards 25a to 25c to the main PC board 21 is also the same as the display operation of the display lamp 10d corresponding to the unit PC board 25d described above. It is.

Then, from the main PC board 21 to each unit PC board 25a to 2
When removing the terminal PC board 5d, confirm that the indicator lamp corresponding to the terminal PC board to be removed is off, and then remove the corresponding unit PCM board.

With such a processor status display device, the main PC board 2 can be displayed by simply attaching and detaching each unit PC board 25a to 25d on which each unit processor is mounted to and from the main PC board 21.
A wearing state signal is automatically sent to the first side, and is automatically cut off. Therefore, in addition to normal attachment/detachment operations, the operator does not need to check the attachment status and set the status using a switch or the like, unlike in the case of conventional devices. Therefore,
The burden on the operator can be reduced, and the operation side of the entire multi-computer system can be greatly improved.

Further, since the attachment/detachment state is automatically detected, the indicator lamps 10a to 10d will not be erroneously turned on or turned off due to a setting error by the operator.

Therefore, the reliability of the Brosset state display device can be improved.

Furthermore, each unit PC board 25a to 25d and the main PC board 2
Since the main PC board 21 is equipped with an active insertion/removal connector for transmitting and receiving power and signals with a time difference between the
With the power turned on, each unit PC board 25a to 25
d can be attached and detached.

That is, it is not necessary to cut off the power to the main PC board 21 every time the unit PC boards 25a to 25d are attached to or removed from the main PC board 21. Therefore, continuity of processing of the entire multi-computer system can be ensured.

[Effects of the Invention] As explained above, according to the processor status display device for a multi-computer system of the present invention, each unit PC board and the main
A connector for active insertion/removal is inserted between the C board and the unit PC board, and a simple installation state signal generating circuit such as a short circuit pattern is installed between the terminals of this connector on the unit PC board side. Therefore, the unit PC board on which each unit processor is mounted is the main PC board.
The installation status signal is automatically output when installed on the C board, allowing the operating status of each unit processor to be displayed correctly without the operator having to perform the same operations, greatly improving operability and reliability of the device. can.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a processor status display device for a multi-computer system according to an embodiment of the present invention, FIG. 2 is an external view showing the entire system of the device according to the embodiment, and FIG. FIG. 4 is a block diagram showing the schematic configuration of a processor status display device in a conventional multi-computer system. FIG. FIG. 5 a, 5 b, 5 c, 5 d-
--And gate, 10a, 10b, 10c, 10d・
・・Indication lamp, 21-・・Main PC board, 22a, 22
b, 22c. 22d, 23a, 23b, 23c, 23d--signal socket, 24a, 24b, 24c, 24d--power socket, 25a, 25b, 25c. 25d...Unit PC board, 26d, 27d...Signal plug, 28d...Power plug, 31...Grounding pattern, 34...Short circuit pattern.

Claims (1)

[Scope of Claims] A plurality of unit printed wiring boards each having a unit processor mounted thereon are detachably attached to a main printed wiring board to which a plurality of signal connectors are attached via dedicated signal connectors, and , a multi-computer system that displays that each of the unit processors is in an online state, that the relevant unit processor is not in a wait state, and that a unit printed wiring board on which the relevant unit processor is mounted is mounted on the main printed wiring board; In the processor status display device of the present invention, a plurality of active insertion/removal devices are provided between the main printed wiring board and each unit printed wiring board, and connect a power supply and a mounting status signal of the unit processor to each unit printed wiring board with a time difference. and each terminal of each of the active insertion/removal connectors on the unit printed circuit board side, and each of the unit printed wiring boards is attached to the main printed wiring board via the active insertion/removal connector and the signal connector. a plurality of mounting state signal generation circuits for transmitting the mounting state signals to the main printed wiring board in a state in which the mounting state signals are mounted; Like the inverted signal of the wait state signal, an online state signal sent from each unit processor side via each of the signal connectors, and a mounting state signal sent from each of the mounting state signal generation circuits via each of the active insertion/removal connectors. a plurality of AND circuits that output AND signals of the AND signals; and a plurality of indicators that display the operating status of each of the unit processors according to the signal level of each AND signal output from each of the AND circuits. A processor status display device for a multi-computer system equipped with