JPH04154148A - Forming of substrate for soi - Google Patents

Abstract

PURPOSE:To enable fine recess and projection to be formed by laminating two types or more thin films with a different etching rate on an insulation substrate where a recessed part is formed until the recessed part is filled up, and then abrading them and then etching them for forming the recess and projection. CONSTITUTION:A recessed part 23 is formed on an insulation substrate 21 by etching. Then, two types or more thin films 25 and 27 with different etching rate are laminated until the recessed part 23 is filled up, and a thin-film laminated body 29 is formed. The laminated body 29 is abraded until sections 31a-31c of a part which is laminated on a side wall of the recessed part 23 are exposed. A laminated body after abrasion is etched, and recess and projection 33 are formed.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a substrate having irregularities for forming a semiconductor single crystal thin film on an insulating substrate, so-called S○I (Se
(microconductor on inductor)
The present invention relates to a method for forming a substrate, particularly a method for forming the above-mentioned unevenness.

(Conventional technology) SOI technology is a technology for growing semiconductor crystals on an insulating substrate in order to realize high-speed, high-density two-dimensional ICs, large-area devices such as displays, and even three-dimensional ICs. Research is being carried out energetically.

For example, the literature (Applied Physics Letters)
Appl, Phys, Let t,) 35(1), 19
79.7.1. p. 71) discloses a graphite taxi method, which is a type of SOI technology.

In this method, as shown in M2 diagram (A) or (8),
Fine irregularities 13 are formed on an insulating insulating substrate 11 (in the example of a substrate corresponding to FIG. 2 (A) described in the literature, the depth P of the irregularities is 3.8 um and the depth D of the recesses is 0.8 μm). An SOI substrate] 5 having irregularities of about 1 um is used. When a semiconductor thin film is deposited on this SOI substrate 15 by vapor phase growth, the surface energy of the semiconductor crystal nucleus to be deposited at the corner 13a of the unevenness 13,
Due to the difference in surface energy between the unevenness 13 and the flat portion 13b, the crystal nuclei are oriented in a certain direction, and thus a semiconductor single crystal is formed on the insulating substrate 11. It has been experimentally confirmed that semiconductor single crystals can be formed using this method.

(Problem to be Solved by the Invention) However, when forming the unevenness on the S○■ substrate using the current photolithography technology and etching technology, the pitch of the unevenness is at the limit of approximately Ium.

Considering that if the planar surface of the unevenness of the SOI substrate is wide, crystal nuclei will occur irregularly and the grown thin film will become polycrystalline, so a technology that can make the pitch of the unevenness finer is desired.

Furthermore, if the uneven edges of the SOI substrate are wide, the unevenness will be reflected on the growth layer, resulting in unevenness in the growth layer. From this point of view as well, a technology that can make the edges of the unevenness more finely is desired.

The present invention has been made in view of the above points, and therefore, an object of the present invention is to provide a substrate for S○■ having an uneven structure for growing a semiconductor single crystal thin film on an insulating substrate. The object of the present invention is to provide a method that enables finer formation than conventional methods.

(Means for Solving the Problems) In order to achieve this object, according to the present invention, a semiconductor single crystal on an insulating substrate! To form the above-mentioned irregularities on the SOI substrate having irregularities for growing an I film, a recess is formed in the insulating substrate, and a predetermined etching process is performed on the insulating substrate on which the recess has been formed. At least two radial necks with different etching rates for the means!
l membranes are laminated one after another until at least the above-mentioned recesses are filled with these thin films, and the thin film laminate obtained by the lamination is subjected to the above-mentioned earthquake of at least a part of the membranes constituting the laminated body. Concave side! The polished thin layer laminate is etched by a predetermined amount using the etching means described above, and the recess is formed by the etching jig traces of the thin film whose etching rate is faster than that of the etching means. is,
The present invention is characterized in that the unevenness is formed by forming convex portions in a thin film portion whose etching rate is slow with respect to the etching means.

Note that the insulating substrate here refers to, for example, an amorphous substrate such as a glass substrate or a fused quartz substrate, a substrate on which a silicon oxide film is formed on a semiconductor substrate, or a substrate on which an element or the like is fabricated. It can be a substrate etc.

Furthermore, the depth, plane, and cross-sectional shape of the recess can be arbitrarily determined according to the design, and the angle of the side wall of the recess with respect to the substrate surface can also be arbitrarily determined according to the design.

In addition, the constituent materials of the two or more thin films that exhibit different etching rates for a given etching method are determined from among various conventionally known materials, taking into consideration their compatibility with the semiconductor single crystal to be formed. It is preferable to use a film that can be continuously formed using the same film forming apparatus.
The thickness of each thin film is determined with this point in mind, since this film thickness is a major factor in determining the width of the recesses and the widths of the projections, that is, the pitch of the unevenness. Specifically, in order to make the pitch of the unevenness finer, the thickness of each thin film is from several [0] to several 100.
Preferably, it is a person.

In addition, the above-mentioned predetermined etching means is a means determined in relation to two or more types of thin film materials having different etching rates, and any means capable of selectively etching thin films can be used regardless of dry or wet etching. It is clear that there is no such thing.

In addition, the above-mentioned polishing includes, for example, physical polishing using an abrasive, chemical polishing by etching,
It is also possible to perform polishing using a combination of these.

(Function) According to the configuration of the present invention, two or more types of thin films having different etching rates are sequentially laminated on an insulating substrate having a recessed portion to form a thin film laminate. Therefore, in the portion of the thin film laminate above the above-mentioned recess, each thin film appears to be on the side of the recess due to the influence of the step of the recess. The structure has a structure in which the layers are sequentially stacked in a direction parallel to .

Roughly speaking, according to the configuration of the present invention, this thin film laminate is polished by a predetermined amount. Therefore, on the above-mentioned concave portion of the polished thin film laminate, there are two or more types of thin films with different etching rates on the side of the concave portion! Cross sections aligned in a direction parallel to appear.

Further, according to the configuration of the present invention, etching is performed on the thin film stack having such a cross section. At this time, each thin film is etched according to its etching rate, so parts of the thin film with a slow etching rate become convex parts, and parts of the thin film with a fast etching rate become concave parts. The unevenness of the film thickness level of each *S constituting is formed.

Further, according to the configuration of the present invention, the pitch of the unevenness is
Since it is mainly determined by the thickness of two or more types of thin films with different etching rates and the polishing condition of the thin film structure, it is possible to create unevenness on the substrate with i! Compared to the conventional method in which i-tangular acid formation is performed, it is easier to control it.

In addition, since the recess that is first formed in the insulating substrate can be formed in any shape and in any position, for example, it is possible to form a semiconductor single crystal only in the area of the insulating substrate where the channel of the active element is planned to be formed. It is also possible to form a substrate for SO processing with unevenness. However, since the recesses can be larger than in the conventional method in which the recesses and recesses are directly formed on the substrate, it is easy to form them.

(Example) Hereinafter, with reference to Atsushi 1 Figures (A) to (D), S
An example of a method for forming an OI substrate will be described. Incidentally, these figures are process diagrams showing the SOI substrate element in cross-sectional view at the main steps in the forming process of the embodiment. However, these drawings only schematically show the dimensions and shapes of each component to the extent that the present invention can be understood.

First, an insulating substrate 2] is prepared. As the insulating substrate 2], for example, an amorphous substrate such as fused silica can be used.

Next, a recess 23 is formed in an arbitrary region of the insulating substrate 21, for example, a region where a channel of an active element (for example, a thin film transistor) is to be formed, by conventionally known photolithography and etching techniques (FIG. 1(A)). The concave portion 23 of this embodiment has a substantially rectangular planar shape, a depth of d, a length of one side of S, and a length of the other side (not shown) of T.

Next, on the insulating substrate 21 in which the recesses 23 have been formed, two or more types of *S with different etching rates for a predetermined etching means are placed in the first register 1125 in this embodiment.
and second thin films 1127 are laminated alternately until at least the recess 23 is filled with these first and second thin films 25, 27 to form a thin film laminate 29 (FIG. 1(B)"). , in order to fill the recess 23 with the thin film laminate 29, the total thickness of the thin film laminate t'IJ< t≧s
The first and second thin films 25.2
7 may be alternately laminated, and more preferably, the first and the thin layers 11 of the vines 2 may be laminated so that t=d and t=s/2 are satisfied.
25 and 27 should be stacked alternately. In this way, the bottom of the pus in the top layer of the thin film stack 29 (Fig. 1 (8)
The middle portion (indicated by Bt) corresponds to the height of the upper surface of the insulating substrate 21.

Here, the constituent materials of the thin 1!25.27 of the tray 1 and the vine 2 may be those that exhibit different etching rates with respect to a predetermined etching means, and more preferably, they can be etched continuously using the same film forming apparatus. However, those that cannot withstand the deposition temperature during semiconductor single crystal formation, and those that deteriorate the characteristics of the semiconductor single crystal (these are referred to as having poor consistency) ) etc. are excluded. Straw 1 and 2 ill! A combination of materials suitable for use as 25.27 is SiO2 film and S I N x
Examples include a film, an SiO2 film and a Si film, an insulating film and a metal film, and the like.

Note that the predetermined etching method is determined relatively considering the constituent materials of the first thin film 25 and the second thin film 27, and may be either dry etching or wet etching. 25 to 5i021i!
The thin film 27 of Atsushi 2 is made of SiN, film or 5itl.
In this case, the etching means is, for example,
Dry etching using a fluorocarbon gas (for example, a mixed gas of CF gas and 02 gas) can be used. According to this, the SINX film and the S1 film can be selectively etched.

In addition, as a method for growing the first and second thin films 25 and 27, various methods such as evaporation, sputtering, and CVD can be used, but no matter which method is used,
It is necessary to form the film under conditions with good step coverage.

In addition, since the thickness of each of the first and second thin films 25 and 27 is a major factor in determining the pitch of the unevenness for semiconductor single crystal formation, it is preferable to set the thickness to an appropriate value according to the design. Specifically, the base on which these thin films are formed (here, the base is P! having the recesses 23 in the case of forming the first layer).
The second and subsequent layers are the first thin film 25 or the second 11127. ) It is desirable that the value be less than or equal to the mean free path on the surface of radicals adsorbed on the surface, and therefore it is preferably from several 10 to several 100.

Next, the thin film laminate 29 is polished until the cross section of at least some of the thin films constituting the laminate 29 laminated on the side wall of the recess 23 is exposed. In this example,
The thin film laminate is polished until the surface of the portion of the first thin film 25, which is first laminated on the insulating substrate 21 on which the recess 23 has been formed, is exposed (FIG. 1(C)). . As a result, in this case, cross sections 31a, 31b, and 31c of the second, third, and fourth layer thin films parallel to the substrate surface are exposed, respectively, in portions parallel to the side walls of the recessed portions 23. Note that polishing can be done mechanically, chemically, or by a combination of both methods, but a method that can flatten the polished surface is preferable, and the amount of polishing allowance U can be determined depending on the design. , it is preferable to set the cross section W of each layer constituting the thin film laminate 29 (cross section corresponding to 31a to 31c) to be exposed.

Next, the polished thin film stack is etched by a predetermined amount using a predetermined etching means. This etching means, as explained above, etches the first thin film 25 and the second thin film 27.
It is determined in relation to the constituent materials. By using this etching means, when the side of the first and second thin films of the polished thin film laminate having a higher etching rate is etched to a depth approximately equal to the film thickness of the thin film, the surface of the polished thin film laminate will have a film thickness. The unevenness 33 with a pitch of several 10 to several 100 levels is formed, and thus the SOI substrate 35 of the embodiment is formed (FIG. 1(D)).

(Effect of the invention) As is clear from the above explanation, the SOI of this invention
According to the method for forming a substrate for SOI, it is possible to form a substrate for SOI having unevenness at a finer pitch than before using currently used film forming techniques and processing techniques. Of course, the unevenness can be formed in any region of the insulating substrate, for example, in the region corresponding to the region where the channel is to be formed in the glass substrate TPT for the TFT array.

Therefore, SOI technology is used to make semiconductor thin film crystals w! It can be expected that it can be grown well in any region of a rigid substrate.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1(A) to (D) are process diagrams for explaining the embodiment, and FIGS. 2(A) and (B) are diagrams for explaining the prior art. ]... Insulating substrate, 23... Concavity 5... First thin film, 27... Second thin film 9... Thin film laminate] a to 31c... Cross section exposed by polishing 3...
Irregularities 5 according to the present invention: SOI substrate of the embodiment. Patent applicant: Oki Electric Industry Co., Ltd. Figure 2 for explanation of the prior art

Claims (2)

[Claims] (1) In forming the unevenness of an SOI substrate having an unevenness for growing a semiconductor single crystal thin film on an insulating substrate, forming a recess in the insulating substrate, At least two types of thin films having different etching rates for a predetermined etching means are sequentially laminated on the substrate until at least the recess is filled with these thin films, and the thin film laminate obtained by the lamination is polishing at least some of the thin films constituting the body until a cross section of the portion laminated on the side wall of the recess is exposed; etching the polished thin film laminate by a predetermined amount by the etching means; A method for forming a substrate for SOI, characterized in that concavities are formed by etching traces of a thin film having a high etching rate, and convex portions are formed by thin film parts having a slow etching rate with respect to the etching means. (2) The method for forming an SOI substrate according to claim 1, wherein the formation region of the recess formed in the insulating substrate is a region of the insulating substrate where a channel of an active element is planned to be formed. Method for forming a substrate for SOI.