JPH04188762A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

FIG. 2 is a process cross-sectional view showing a conventional method for manufacturing a semiconductor device. Here, after island and field formation, channel dope implantation for controlling the threshold voltage of a transistor will be explained. In Figure 2, (1) is a P-well region where an Nch transistor is formed, (2) is an N-well region where a Pch transistor is formed, (3) is a field oxide film for element isolation, and (4) is a polygonal well region. Silicon film, (
5) is a silicide film as a gate electrode, (6a) is an N
MOS part, (6b) is a resist film for forming the gate electrode of the PMOS part, (7) is a resist film for masking the Pch Tr part to form the source/drain region of the Nch Tr, (8) is the source of the Pch Tr Resist for masking the Nch Tr part to form the drain region, (9) is the Nch Tr drain region, and Ql is the Pc
h Tr source/drain region.

Next, the operation will be explained. First, v of Tr? B For full control, oxide film such as B (3) iNMOS part (
1) and the entire surface of PMO8 section (2). (FIG. 2 (I!L)) Here, different ion species may be implanted into the NMOS and PMOS parts. Next, a gate dielectric film (3) is formed, polysilicon (4) and the like are further deposited, and a silicide film (5) which will become a gate electrode is formed using a method such as sputtering. A resist film (6a) with a desired gate width is formed on the NMOS part (1) (above the -P well) and the 2M08 part (2) (above the N well) by photolithography.

(6b) is formed, and the silicide film and polysilicon film are etched by dry etching (FIG. 2(b)) to form a gate electrode. After forming the gate electrode, the 2M08 section is masked with a resist film (7) by photolithography to form the source and drain of the NMOS section, and P, As, etc. are implanted. (Fig. 2 (C)) Next, in order to form the source drain (9) of the PMO8 part, photolithography is performed in the same way as the NMOS part's source drain forming process, and the NMOS part is masked with a resist film (8). Inject 2M
A source/drain region αQ at a portion 08 is formed. (FIG. 2(d)) After the above steps, heat treatment is performed and source/drain diffusion is performed. (hereinafter referred to as interlayer insulation film debo, contact), AL
After a wiring process, a Tr is formed.

When forming an LDD@structure transistor, after forming the gate electrode, N-
After P-source drain implantation and P-source drain implantation,
An oxide film is deposited, sidewalls are formed by anisotropic etching, and N+ source/drain implantation and P+ source/drain implantation are performed. These apply to all Tr.

[Problem to be solved by the invention]

The conventional method for manufacturing a semiconductor device is carried out as described above. Since the gate electrodes of the NMOB part and the 2M08 part are formed at the same time, the source and drain must be formed separately, which increases the number of steps and increases the number of steps. When forming a D DQ transistor, an oxide film serving as a sidewall spacer is formed on all the transistors, so that there are open points due to limitations in pattern density.

The present invention has been made to solve the above-mentioned problems, and by separately performing gate formation and source/drain implantation in the NMO3 part and the 2M08 part, the number of steps can be reduced.
Also, Tr with LDDq structure and T without LDDJ structure
It is an object of the present invention to obtain a method for manufacturing a semiconductor device in which r is individually manufactured.

[Means to solve the problem]

The method for manufacturing a semiconductor device according to the present invention includes an NMOS section and two
The gate electrodes of the M08 portion are formed separately, and the source and drain implantations are performed simultaneously.

[Effect]

In the IB manufacturing method of a semiconductor device according to the present invention, in the step of gate electrode photolithography source drain implantation, NMOS
By performing the photolithography of the gate electrodes of the PMOB section and the PMOB section separately and simultaneously performing the source/drain implantation, the number of photolithography steps can be reduced.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

In Figure 1, (1) is a P-well region that forms an Nch transistor, (2) is an N-well region that forms a PCh transistor, (3) is a field oxide film for element isolation, and (4) is a polygonal oxide film. Silicon film, (5) is a silicide film as a gate electrode, (6) is a resist film for masking the 2M08 part while forming the gate electrode of the RNMOS part, (7) is a resist film for masking the 2M08 part at the same time as forming the gate electrode of the 2M08 part. Resist Il for masking the part
l, (8) is the source/drain region of the Nch Tr,
(9) is the source/drain region of the PchTr.

Next, the operation will be explained. The polysilicon film (4) and silicide film (5) are formed in the same manner as in the conventional method up to the photolithography of the gate. After forming the silicide film (5) by sputtering etc., photolithography of the gate is performed.
Here, first, for example, only the gate of the NMOS section is subjected to photolithography, and the 2M08 section is masked with resist. Next, using (6) as a mask, the silicide film (5) and polysilicon film (4) are etched by a method such as dry etching to form a gate electrode of the NMOS section.

After that, the resist film (6) is not removed to form the source/drain region of the NMOS part (P-?A51).
etc. to form source and drain regions. (Fig. 1(b)) After the above steps, the resist film (6) is removed.
Next, photolithography was performed only on the gate of the 2M08 part, and the NMOB
The parts are masked with resist. Furthermore, in order to form a source/drain region in the %PMO6 part, without removing the resist film (7), B or the like is implanted to form a source/drain region (Fig. 1(C)). After that, heat treatment is performed to diffuse the source and drain regions.The subsequent steps are the same as the conventional method.When forming a transistor having an 0 LDD structure (for example, NMOS), P implantation is performed after gate photolithography of the NMOS part. After that, it is possible to form a sidewall using the conventional sidefall formation method in which the oxide film is debossed and anisotropically etched the entire surface, and by implanting AM or the like, it is possible to have an LDD structure Tr only in the NMOS part. becomes.

That is, after performing the first source/drain implantation, by forming and etching an oxide film, etc., F), LDD
It is possible to form a q-structure transistor only in either one.

〔Effect of the invention〕

As described above, according to the present invention, after performing photolithography of the gate electrode of the NMOS part, source/drain implantation of the NMOS part is performed, and then after photolithography of the gate electrode of the PMO 8 part, the gate electrode of the PMO 8 part is Since we perform source-drain implantation,
The conventional NMOS part and the PMO8 part are subjected to gate electrode photolithography processing at the same time.

After etching, the number of photolithography steps can be reduced compared to a method in which source/drain implantation into the NMOS section and the PMO8 section is performed through two photolithography steps. Also, LDD4
In forming a transistor having a 1I structure, it is possible to form a transistor without an LDD structure within the same chip.

[Brief explanation of drawings]

FIGS. 1(a) to (C) are process cross-sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 2(a) to (Q
1 is a process cross-sectional view of a conventional semiconductor device manufacturing method. In the figure, (1) is a P-well region, (2) is an N-well region, (3) is a field oxide film, (4) is a polysilicon film, (5) is a silicide film, (6) is a resist film, (
7) is a resist film, (8) is a source/drain region, (
9) is a source/drain region. In addition, in FIG. 1, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] CM with NMOS part and PMOS part on semiconductor substrate
In a method for manufacturing a semiconductor device of an OS type transistor,
The method is characterized in that the source/drain implantation is performed only after gate photolithography of either the NMOS section or the PMOS section, and then the source/drain implantation is performed after the gate photolithography of the other NMOS section or the PMOS section. A method for manufacturing a semiconductor device.