JPH04283837A - Program loading method - Google Patents

Abstract

PURPOSE:To eliminate the need for a ROM stored with a program loader by storing the program loader and an update program on a memory card. CONSTITUTION:The program loader and update program are stored in an EPROM on the memory card 3. Then an inverter 5 has a pull-up resistance for a Vcc whose input is connected to a GND through the pattern of the memory card 3 only when the memory card 3 is connected. The output of the inverter 5 is inputted to a memory control circuit 4 as a memory card connection/ nonconnection signal. The memory control circuit 4 enables a flush type EPROM 2 when the memory card 3 is not connected and enables the EPROM on the memory card 3 when the memory card is connected. For the purpose, the memory card 3 is connected to put the program loader in operation and the update program stored in the EPROM can be written in the flush type EPROM 2.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program loading method in a device operated under microcomputer control, and more particularly to a program loading method that does not require a ROM storing a program loader or a ROM storing all programs.

0002

[Prior Art] In the prior art, program loading for devices that operate under microcomputer control involves storing the main program in RAM, storing the program loader in ROM, and then loading the program from a higher-level control device or an external storage device via a transmitting/receiving circuit. This was done by storing the main program in RAM. In addition, when selling a single device to an OEM user and connecting it to a higher-level control device from another company, all programs must be stored in ROM because loading programs from the higher-level control device or external storage device cannot be expected.
The program was stored in the ROM, and changes to the program were made by replacing the ROM.

[0003] Related to the above-mentioned prior art, Japanese Patent Application Laid-Open No. 124930/1982 and Japanese Patent Application Laid-open No. 1620/1982
13, JP-A-59-109927, JP-A-59-109927, JP-A-59-148918
There are inventions disclosed in Japanese Patent Application Publication No. 62-126452, etc.

0004

SUMMARY OF THE INVENTION The above-mentioned conventional technology requires a RAM and a ROM, which poses a problem in that memory costs are high.

[0005] Furthermore, when selling a single device to an OEM user and connecting it to a higher-level control device of another company, as mentioned above, program changes are made in the form of ROM replacement, so the cost of ROM regeneration and replacement is reduced. There is a problem that occurs.

The present invention has been made in view of the problems of the prior art described above, and specifically aims to provide a program loading method that does not require a ROM.

[0007]

[Means for Solving the Problems] The program loading method of the present invention provides a CPU that controls a system, a CPU that controls a system,
It is applied to a device equipped with a rewritable memory that stores a program for operating the U, and updates the program stored in the rewritable memory, and in particular, a program loader and a storage means storing an update program are installed in the device. The update program stored in the storage means is stored in the rewritable memory by connecting the CPU and operating the CPU according to a program loader stored in the storage means.

[0008]

According to the present invention, by configuring the storage means using a memory card or the like, it becomes possible to update the program simply by connecting the storage means to the device. Therefore, the R
Programs can be updated without requiring OM.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in more detail with reference to embodiments shown in the accompanying drawings. FIG. 1 is a block diagram showing a first embodiment of the present invention. In Figure 1, the CPU
1 has a bus 6 consisting of a data bus, an address bus, and a control bus for transmitting read/write signals. As shown in the figure, this bus 6 includes an electrically erasable and rewritable flash type E that stores programs.
PROM2 (hereinafter referred to as FEPROM) and EPR
A memory card 3 equipped with an OM, a memory control circuit 4, and a RAM 11 are connected.

Here, as shown in the figure, the memory control circuit 4 receives a chip enable signal 8 of the FEPROM 2, a chip enable signal 9 of the EPROM in the memory card 3, an erase control signal, a write control signal, and a mode of the FEPROM 2. These devices each output a control signal 10 including a control signal.

Furthermore, in the first embodiment shown in FIG. 1, only when the memory card 3 is connected, a pull-up resistor to Vcc whose input is connected to GND is connected via the pattern of the memory card 3. An inverter 5 is provided. The output of the inverter 5 is input to the memory control circuit 4 as a memory card connection presence/absence signal 7 which outputs "1" when the memory card is connected and outputs "0" when the memory card is not connected. In response to this memory card connection signal 7, the memory control circuit 4 enables the FEPROM 2 when the memory card 3 is not connected, and enables the EPROM in the memory card 3 when the memory card 3 is connected.
Enable M. Note that the chip enable signals 8 and 9 are generated by decoding address signals allocated to the same address area (area A) of the CPU 1.

Next, the operation of the embodiment shown in FIG. 1 will be explained using FIGS. 2 to 4. As described above, when the memory card 3 is not connected, the FEPROM 2 is enabled. Therefore, as shown in FIG.
FEPROM 2 is allocated to address area A of . Furthermore, the chip enable signal 8 of FEPROM2
also enables another address area B that does not overlap with address area A. Therefore, when the memory card 3 is not connected, the CPU 1 executes the program in the FEPROM 2.

[0013] When the memory card is connected, the EPROM in the memory card 3 is enabled. Therefore, as shown in FIG. 3, the CPU 1 executes the program stored in the EPROM.

Furthermore, when copying the program in the memory card 3 to the FEPROM 2, the following operation is performed. That is, by connecting the memory card 3, the program loader stored in a part of the EPROM in the memory card 3 is executed. As a result, as shown in FIG. The program will be transferred.

Therefore, according to the first embodiment shown in FIG. 1, even if the device does not have a non-volatile memory (such as an EPROM) for storing a program loader, by connecting the memory card 3, the data stored in the memory card 3 can be saved. The program of the EPROM can be written to the FEPROM2.

[0016] If the address size of CPU 1 is insufficient and two address areas A and B cannot be defined,
Rewrite the program as follows. That is, the program loader stored in the EPROM in the memory card 3 is transferred to the RAM 11, and the program loader is executed on the RAM. Furthermore, the RAM 11 is used as a work area. As a result, first, the memory card 3 is enabled by the chip enable signal 9, and the data in the EPROM in the memory card 3 is transferred to the RAM 11. Subsequently, the chip enable signal 8 causes the FEPRO
Enable M2 and transfer data from RAM11 to FEPROM2. This allows the program to be rewritten. Note that when the address size of the RAM 11 is small, the above operation may be performed in multiple steps.

FIG. 5 is a block diagram showing a second embodiment of the present invention, in which the same parts as in the first embodiment shown in FIG. 1 are given the same reference numerals. The first embodiment shown in FIG. 1 and FIG.
The difference in the second embodiment shown in FIG.
The reason is that SRAM12 is used instead of M2. S
The operation of the second embodiment using RAM12 is as follows:
The operation is the same as that of the first embodiment using PROM22. However, if SRAM is used, a backup battery 13 is required.

[0018] Furthermore, in the first embodiment, FEPRO
It is also possible to use EEPROM instead of M2. The operation in this case is also similar to the operation when using the FEPROM2.

Although the above description has been made using the memory card 3 as an example, the present invention is not limited to this, and needless to say, a memory board or the like may be used.

[0020]

[Effects of the Invention] As explained above, according to the present invention,
By simply connecting a memory card or the like, programs can be updated without the need for any other special device or ROM for program loading.

Furthermore, when changing the program, the EPROM in the memory card can be changed to a new program, and the program of the device can be changed on-board using the memory card. Costs can be significantly reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing the address area of the CPU when a memory card is not connected in the first embodiment shown in FIG. 1;

FIG. 3 is an explanatory diagram showing the address area of the CPU when a memory card is connected in the first embodiment shown in FIG. 1;

FIG. 4 is an explanatory diagram showing the address area of the CPU when a memory card is connected and a program is updated in the first embodiment shown in FIG. 1;

FIG. 5 is a block diagram showing a second embodiment of the present invention.

[Explanation of symbols]

1 CPU 2 FEPROM 3. Memory card 4 Memory control circuit 5 Inverter 6 Bus 8 Chip enable signal 9 Chip enable signal 10 Control signal 11 RAM 12 SRAM 13 Backup battery

Claims (2)

[Claims] 1. A program loading method for updating a program stored in the rewritable memory, which is applied to a device including a CPU that controls a system and a rewritable memory that stores a program for operating the CPU. The update program stored in the storage means can be rewritten by connecting a storage means storing a program loader and an update program to the device and operating the CPU according to the program loader stored in the storage means. A program loading method characterized by storing it in memory. 2. The program loading method according to claim 1, wherein the storage means is a memory card equipped with a rewritable memory.