JPH04317332A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enhance the processing accuracy of an interconnection by a method wherein a gold-plated film constituting the interconnection is made thin. CONSTITUTION:A silicon oxide film 2 is formed on a silicon substrate 1; after that, an opening part 3 is formed. Then, a platinum silicide layer 4 and a tungsten film 5 are formed only inside the opening part 3. Then, a titanium tungsten film 6 and a gold film 7 are formed on the whole surface; after that, a photoresist film 8 having an interconnection pattern is formed. Then, a gold- plated film 9 by an electrolytic plating method is formed and a silicon oxide film 2A by a liquid growth method is formed by making use of the photoresist film 8 as a mask. Then, the photoresist film 8 is removed; after that, the gold film 7 and the titanium tungsten film 6 are etched by making use of the silicon oxide film 2A as a mask.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a metal wiring and a method for forming the same.

0002

2. Description of the Related Art Conventionally, a plating method has been known as a technique for forming metal wiring for semiconductor devices. A method for forming metal wiring by gold plating will be described below with reference to FIG.

First, as shown in FIG. 2A, an opening is provided in a silicon oxide film 2 on a silicon substrate 1, and then a platinum silicide layer 4 is provided on the bottom of the opening. Next, the entire surface is covered with a titanium/tungsten (TiW) film 6A and a gold film 7.
After depositing A, a photoresist film 8A having a wiring pattern is formed. Next, a gold plating film 9A is formed by a plating method. The titanium/tungsten film 6A has a film thickness of 200 to 30% in order to improve the adhesion between the silicon oxide film 2 and the gold film 7A, and to maintain the diffusion barrier properties between silicon and gold in the opening.
A film thickness of 0 nm is required.

Next, as shown in FIG. 2(b), after removing the photoresist film 8A, the gold film 7A is etched using the gold plating film 9A as a mask, and then the titanium/tungsten film 6A is etched. 9A and gold film 7
A wiring layer consisting of A and titanium/tungsten film 6A is formed.

In this method, when the gold film 7A and the titanium/tungsten film 6A are etched, the gold plating film 9A is also etched, so the titanium/tungsten film 6A as a barrier film is etched.
The thicker the gold plating film 9A becomes, the more the gold plating film 9A will be etched. Therefore, in order to ensure the desired thickness of the wiring layer after etching, it is necessary to deposit the gold plating film 9A thicker than the desired thickness in advance, taking into account the reduction in film thickness due to etching.

[0006]

[Problems to be Solved by the Invention] In the manufacturing process of this conventional semiconductor device, the gold plating film 9 used as a wiring layer is
Since A is used as a mask during etching of the gold film 7A and the titanium/tungsten film 6A, it is necessary to deposit the gold plating film 9A thickly in advance to account for the reduction in film thickness due to etching. As a result, machining accuracy deteriorates. or,
In addition to variations in the thickness of the gold plating film 9A, the gold film 7
Since the etching variations in the gold plating film 9A in etching the titanium/tungsten film 6A are also added, the variations in the thickness of the finished gold wiring film become extremely large. For this reason, it is difficult to form high-performance fine wiring using conventional methods.

[0007]

[Means for Solving the Problems] A semiconductor device according to a first aspect of the invention includes an insulating film formed on a semiconductor substrate, an opening for wiring connection formed in this insulating film, and only the inside of this opening. A silicide layer and a first metal film formed sequentially on the
It includes a wiring layer mainly composed of a metal plating film formed on a metal film.

The method for manufacturing a semiconductor device according to the second invention includes the steps of forming an insulating film on a semiconductor substrate and then patterning it to form an opening for wiring connection, and forming a silicide layer and a silicide layer only in the opening. 1 step of sequentially forming metal films;
a step of sequentially forming a second metal film and a third metal film to be plated on the insulating film including the first metal film;
forming a photoresist film having a wiring pattern on the metal film; and using the photoresist film as a mask, the third
a step of sequentially forming a metal plating film by electrolytic plating and a thin film having a slower etching rate than the metal plating film on the metal film; and after removing the photoresist film, using the thin film as a mask, forming the third metal film. The method includes a step of removing the second metal film.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIGS. 1A to 1D are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1(a), a desired element is formed on a silicon substrate 1 by a desired PN junction or the like, and then a silicon oxide film 2 is formed thereon. Next, after an opening 3 is provided in the silicon oxide film 2, a platinum silicide layer 4 is provided within the opening 3. This platinum silicide layer 4 can be formed by depositing a platinum film to a thickness of about 50 nm on the silicon oxide film 2 with openings, heat-treating it at 500°C for about 15 minutes, and etching with aqua regia. . Next, a tungsten film 5 having a thickness of about 300 nm is provided as a first metal film on this platinum silicide layer 4 by selective vapor deposition.

Next, as shown in FIG. 1(b), a titanium/tungsten film 6 and a gold film 7 are used as the second and third metal films.
be coated with. The main purpose of the tungsten film 5 is to have barrier properties for the diffusion of gold into the silicon substrate, and its thickness is 100 to 200 nm.
It is sufficient if it is about m. Moreover, the opening 3 of the silicon oxide film 2
It can also be used for the purpose of burying the silicon oxide film 2, and in this case, it is preferable that the film thickness be approximately the same as that of the silicon oxide film 2.
It is not necessarily necessary to bury it completely; it is sufficient to just reduce the level difference. The titanium/tungsten film 6 and the gold film 7 may have a thickness of approximately 500 nm and 50 to 200 nm, respectively. Next, a photoresist film 8 having a wiring pattern is formed using photolithography.

Next, as shown in FIG. 1C, a gold plating film 9 having a thickness of approximately 1 μm is deposited on the gold film 7 by electrolytic plating using the photoresist film 8 as a mask. Next, a silicon oxide film 2A with a thickness of about 200 nm is selectively deposited on the gold plating film 9 by liquid phase growth.

Next, as shown in FIG. 1(d), after removing the photoresist film 8, the gold film 7 is removed using the silicon oxide film 2A as a mask by ion etching using argon gas. At this time, the etching rate ratio of the silicon oxide film 2A and the gold film 7 is 1:30, and the thickness is 100 nm.
When etching the gold film 7 of m, it is sufficient that the silicon oxide film 2A has a thickness of about 4 nm or more. Subsequently, the titanium/tungsten film 6 is removed using a reactive ion etching method using Freon gas as a base, using the silicon oxide film 2A as a mask. At this time, the etching rate ratio of the silicon oxide film 2A and the titanium/tungsten film 6 is 1:2, and the thickness is 5
When etching the 0 nm titanium/tungsten film 6, the silicon oxide film 2A only needs to be 25 nm or more thick. In other words, the silicon oxide film 2A used as a mask for etching the gold film 7 and the titanium/tungsten film 6 may have a thickness of about 30 nm or more, and preferably 100 nm. In this way, a semiconductor device having a wiring layer mainly composed of gold plating film 9 is completed.

In the above embodiment, a platinum silicide layer is used as the silicide layer, but a tungsten silicide layer or a palladium silicide layer may also be used. This film is selected from a material that has good electrical properties with the silicon substrate and does not attack the silicon substrate during selective growth of tungsten. Further, although it is preferable that the tungsten film 5 is selectively grown, it can also be formed only in the opening by an etch-back method after being grown on the entire surface of the silicon substrate. Further, titanium nitride or molybdenum may be used as the material. A titanium film or a chromium film can also be used as the second metal film instead of the titanium/tungsten film. Platinum or tantalum may be used instead of gold as the third metal film. Further, a copper plating film may be used instead of the gold plating film, and a plating metal is selected. The silicon oxide film 2A may be deposited by sputtering or vapor growth. In this case, since it is also deposited on the photoresist film 8, it can be provided only on the gold plating film 9 using the lift-off method. The thin film used as a mask is not limited to silicon oxide film 2A, but also silicon nitride film, titanium, etc.
Materials with lower etch rates than gold can be used.

[0015]

Effects of the Invention As explained above, the present invention provides a thin film for a mask on the metal plating film constituting the wiring layer, thereby reducing the metal plating during etching of the metal film for adhesion and the metal film for plating. Since etching of the film can be prevented, the thickness of the metal plating film constituting the metal wiring can be reduced, and the processing accuracy of the metal wiring can be improved. Further, in the conventional technique, there were factors such as variations in the deposited film thickness and variations in the etching rate, but in the present invention, the factors causing the variations in the etching rate are eliminated, and the film thickness accuracy can also be improved.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining one embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip for explaining a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

1 Silicon substrate 2, 2A Silicon oxide film 3 Opening portion 4 Platinum silicide layer 5 Tungsten film 6, 6A Titanium/tungsten film 7, 7A
Gold film 8, 8A Photoresist film 9, 9A Gold plating film

Claims (2)

[Claims] Claim 1: An insulating film formed on a semiconductor substrate;
The main components are an opening for wiring connection formed in this insulating film, a silicide layer and a first metal film sequentially formed only in this opening, and a metal plating film formed on this first metal film. 1. A semiconductor device comprising a wiring layer. 2. A step of forming an insulating film on a semiconductor substrate and then patterning it to form an opening for wiring connection;
a step of sequentially forming a silicide layer and a first metal film only within the opening; and a step of sequentially forming a second metal film and a third metal film to be plated on the insulating film including the first metal film. a step of forming a photoresist film having a wiring pattern on the third metal film; a metal plating film formed by electrolytic plating on the third metal film using the photoresist film as a mask; a semiconductor device comprising the steps of sequentially forming thin films having a slow etching rate; and removing the third metal film and the second metal film using the thin film as a mask after removing the photoresist film. manufacturing method.