JPH0454794A - Test pattern signal generating circuit - Google Patents

Abstract

PURPOSE:To make the thickness of longitudinal lines of a test pattern to be generated always constant even when a horizontal synchronizing signal frequency of a signal source differs by controlling an operating point of a waveform shaping means or a potential of a differentiating waveform so that a width of a pulse outputted from the waveform shaping means is always constant. CONSTITUTION:A horizontal synchronizing signal 100 is inputted to a PLL circuit 1 and a frequency voltage conversion circuit 6 and also inputted to a reset terminal of a frequency derides 2. The PLL circuit 1 generates a pulse signal phase-locked with the inputted horizontal synchronizing signal 100 and the signal is outputted to the frequency divider 2. The frequency divider 2 frequency-divides the received pulse signal and outputs the resulting pulse signal with lower frequency to a capacitor 3. A pulse signal 200 is differentiated by a differentiating circuit comprising a capacitor 3 and a resistor 48 and the differentiated signal is inputted to a buffer gate 5. The buffer gate 5 outputs a high level when the inputted differentiating signal exceeds a threshold level VTH and outputs when the inputted differentiating signal is less than the threshold level VTH, then its output signal is formed to be a rectangular pulse 400. The width of the rectangular pulse is independent of the frequency of the horizontal synchronizing signal.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention is used for convergence adjustment in an automatic follow-up synchronization type receiver that can receive image (video) signal sources with different synchronization frequencies. The present invention relates to a test pattern signal generation circuit that generates test pattern signals.

(Prior art) Computer monitors and projection receivers that display text and graphic information on the screen require a higher degree of convergence accuracy than general television receivers, etc., and in order to meet this requirement, Generally, adjustments are made by displaying a crosshatch test pattern on the screen. As is well known, this crosshatch test pattern is a grid-like test pattern composed of a plurality of vertical lines and horizontal lines.

In addition, in order to routinely correct convergence drift in projection type receivers, including those used at home, a cross-shaped test pattern consisting of vertical lines - books and horizontal lines - books is displayed on the screen. , the user is supposed to adjust the misconvergence.

There are many ways to generate test pattern signals used for such convergence adjustment, but a monitor receiver with an automatic tracking synchronization system that can receive images by switching and selecting image (video) signal sources with different synchronization frequencies is one of them. The test pattern signal generating circuit provided in the test pattern signal generator, etc. has a configuration as shown in FIG. That is, the PLL circuit 1 oscillates at an integral multiple of the horizontal synchronizing signal frequency 100, and outputs the oscillated pulse signal to the frequency divider 2. The frequency divider 2 divides the frequency of the input pulse signal to create a signal 200 with a horizontal period constituting the vertical lines of the test pattern.
is output to a differentiating circuit composed of a resistor 4 and a resistor 4. This horizontal period signal 200 is differentiated by the differentiating circuit, and then waveform-shaped by the waveform shaping circuit (buffer gate) 5 and output. By using such a circuit, it is possible to always obtain the same number of vertical lines even if the frequency of the horizontal synchronizing signal of the input image signal is different.

FIG. 6 is a block diagram showing another example of a conventional circuit for generating a test pattern signal used for convergence adjustment. 7 is an oscillation circuit that transmits a pulse signal at a frequency higher than the horizontal synchronization signal frequency 100;
(or horizontal retrace pulse) etc., the transmission start point of the pulse signal is synchronized. The pulse signal output from this oscillation circuit 7 is differentiated by a differentiating circuit consisting of a capacitor 3 and a resistor 4, and then waveform-shaped by a buffer gate (waveform shaping circuit) 5 and output, and this signal constitutes a test pattern. Used as a vertical line.

As mentioned above, a test pattern signal generated from a conventional test pattern generation circuit is displayed on the screen of a monitor receiver with an automatic tracking synchronization system that can receive images by switching and selecting image (video) sources with different horizontal synchronization frequencies. However, there were drawbacks as described below.

That is, the pulse width of the pulse signal output from the test pattern generation circuit shown in FIG. 5 or FIG.
Always a constant value. However, in the automatic follow-up synchronization type monitor receiver described above, the input horizontal synchronization frequency changes and is not constant, so when this frequency changes, the ratio of the pulse width of the vertical line signal to the horizontal period changes. This appears as a phenomenon in which the thickness of the vertical line of the test pattern displayed on the screen changes depending on the horizontal synchronization frequency input to the automatic tracking synchronization monitor receiver. The lower the horizontal synchronization frequency, the thinner the vertical line becomes, and the higher the horizontal synchronization frequency, the thicker the vertical line becomes.

If this phenomenon occurs, for example, convergence adjustment when receiving a signal source with a high horizontal synchronization frequency will result in thick vertical lines and lack accuracy; conversely, when receiving a signal source with a low horizontal synchronization frequency, The problem with convergence adjustment when doing so was that the vertical lines were thin and the screen brightness decreased, making it difficult to adjust.

(Problem to be Solved by the Invention) When a test pattern generated by a conventional test pattern signal generation circuit is displayed on the screen of a monitor receiver using the automatic follow-up synchronization method as described above, the horizontal Due to the difference in synchronization frequency, the thickness of the vertical lines that make up the test pattern changes, making it difficult to perform convergence adjustment or making it impossible to perform highly accurate adjustment.

SUMMARY OF THE INVENTION Therefore, the present invention aims to eliminate the above-mentioned drawbacks, and provides a test pattern signal generation circuit that can make the thickness of the vertical lines of the generated test pattern almost constant even if the horizontal synchronization frequency of the signal source is different. It is intended to.

[Structure of the invention]

(Means for Solving the Problems) The present invention provides a receiver using a synchronous frequency automatic tracking synchronization system capable of receiving a plurality of types of signal sources having different horizontal synchronous frequencies. A frequency-to-voltage conversion means for generating a voltage, a pulse generation means for generating at least one pulse during a horizontal scanning period, a differentiating means for differentiating the pulse generated from the pulse generating means, and a pulse generated by the differentiating means. and a waveform shaping means for shaping a differential waveform, and the operating point of the waveform shaping means or the potential of the differential waveform is controlled by the DC voltage output from the frequency-voltage converting means.

(Function) In the test pattern signal generation circuit of the present invention, the frequency-voltage conversion means generates a DC voltage that depends on the horizontal synchronization frequency or the horizontal deflection frequency.

The pulse generating means generates at least one pulse during the horizontal scanning period. The differentiating means differentiates the pulses generated by the pulse generating means. The waveform shaping means shapes the differential waveform generated by the differentiating means. The DC voltage output from the frequency-voltage conversion means controls the operating point of the waveform shaping means or the potential of the differential waveform so that the pulse width output from the waveform shaping means is always constant.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the test pattern signal generation circuit of the present invention. 1 is P that transmits a pulse signal synchronized with the phase of the input horizontal synchronization signal (original signal)
LL circuit, 2 is a frequency divider that divides the pulse signal output from PLL circuit 1 to adjust the number of vertical lines of the test pattern signal, 3 is a capacitor that constitutes an integrating circuit, and 4 is an integral circuit. A resistor, 5 a buffer gate that shapes the waveform of the input signal, 6 a frequency-voltage conversion circuit that generates a voltage proportional to the frequency of the input signal, and 7 a polarity inverter that inverts the polarity of the input voltage. The circuit 8 is a resistor inserted between the output side of the polarity inversion circuit 7 and the connection point between the capacitor 3 and the resistor 4.

Next, the operation of this embodiment will be explained. A horizontal synchronizing signal 100 as shown in FIG.

As a result, the PLL circuit 1 receives the input horizontal synchronizing signal 1.
A pulse signal whose phase is synchronized with 00 is transmitted and outputted to the frequency divider 2. The frequency divider 2 divides the frequency of the input pulse signal as shown in FIG. 2(B) and outputs a low frequency pulse signal to the capacitor 3. However, since this frequency divider 2 is reset by the horizontal synchronizing signal 100, the frequency-divided pulse signal 200 is output at the same timing every cycle, as shown in FIG. 2(B). The frequency-divided pulse signal 200 is differentiated by a differentiating circuit composed of a capacitor 3 and a resistor 4.8, and is inputted to the buffer gate 5 as a differentiated signal as shown in FIG. 2(C). However, the time constant of the differentiating circuit is 200 ms of the pulse signal.
is sufficiently smaller than the period of . buffer gate 5
If the input differential signal exceeds the thresholds ■, □, it will be high level, and if it is below ■, □, it will be low level, so
The output signal becomes a rectangular pulse 400 as shown in FIG.

On the other hand, the frequency-voltage conversion circuit 6 generates a voltage proportional to the frequency of the input horizontal synchronization signal 100 and outputs it to the polarity inversion circuit 7. Therefore, the polarity inverting circuit 7 outputs a negative polarity voltage obtained by inverting the polarity of the input voltage to the differentiating circuit via the resistor 8. Since the DC voltage VDC output from the polarity inverting circuit 7 is a voltage proportional to the frequency of the horizontal synchronizing signal 100 made negative in polarity, the higher the frequency, the lower the DC voltage VDC becomes. Moreover, this DC voltage oc matches the average value of the differentiated voltage if the input current of the buffer gate 5 is ignored, so the voltage waveform obtained at the connection point of the capacitor 3 and resistor 4 is This is shown by the solid line in the figure, and when the frequency is low, it is shown by the broken line. However, at this time, since the threshold value ■TH is constant, the rectangular wave pulse 40 output from the buffer gate 5
As shown in FIG. 3, the pulse width of 0 becomes narrower as the frequency is higher, and wider as the frequency is lower. This is ■D
This is contrary to the conventional example in which c is not applied to the average voltage of the differential pulse, so the pulse width of the rectangular wave pulse no longer depends on the frequency of the horizontal synchronizing signal.

Here, the relationship between the period T and the frequency f of the horizontal synchronizing signal 100 is T=1/f. Furthermore, if the peak value of the potential at the falling portion of the differential waveform is V, then there is a relationship of .multidot..epsilon.-7. However, there is a relationship of τ=t/(C・R), where t is time,
C is the capacitance of the capacitor 3, and R is the combined resistance value of the resistor 4.8.

Considering that the aforementioned Dc is proportional to f, it is impossible to make the width of the rectangular wave pulse 400 obtained by waveform shaping completely proportional to the period T, but it is possible to approach this relationship. . That is, the tracking characteristic for the width of the rectangular wave pulse 400 can be adjusted by appropriately setting the resistance value of the resistor 8, the conversion coefficient of the frequency-voltage conversion circuit 6, and the voltage gain of the polarity inversion circuit 7 shown in FIG. You can get closer to the ideal.

Therefore, as the frequency of the horizontal synchronizing signal 100 increases, the average voltage of the differential pulse increases, and when the frequency decreases, the average value of the differential pulse decreases. The pulse width remains approximately constant regardless of the frequency of the horizontal synchronizing signal 100.

According to this embodiment, the average value of the voltage differentiated by the capacitor 3 and the resistor 4.8 is controlled by a negative polarity voltage proportional to the frequency of the horizontal synchronizing signal, thereby making it dependent on the frequency of the horizontal synchronizing signal 100. Buffer Gate 5
The pulse width of the rectangular wave pulse 400 outputted from can be made substantially constant. Therefore, when performing convergence adjustment by displaying the above-mentioned test pattern signal generated from this test pattern signal generation circuit on the screen of a monitor receiver using an automatic follow-up synchronization method, it is possible to easily perform convergence adjustment, and to adjust the convergence. This has the effect of improving accuracy.

FIG. 4 is a block diagram showing another embodiment of the present invention. In this example, the output voltage of the frequency-voltage conversion diagram NI6, which generates a voltage proportional to the frequency of the horizontal synchronizing signal, is used as the voltage source VDD of the buffer gate 5. Here, the input threshold voltage ■■H of the buffer gate 5 is V DD/2
It depends on ■DD.

By the way, when ■TH is not controlled by ■DD, the pulse width of the rectangular wave pulse 400 tends to be wide if the frequency of the horizontal synchronizing signal 100 is high, and narrow if the frequency is low. If the threshold value TH is set high when the frequency of the signal is high, and set low when the frequency of the horizontal synchronizing signal 100 is low, the output from the buffer gate 5 is independent of the waveform of the differential pulse input to the buffer gate 5. The pulse width of the rectangular wave pulse can be made almost constant, and the same effect as above can be obtained.

Note that the frequency-voltage conversion circuit used in Figures 1 and 4 is normally included in automatic follow-up synchronization type monitor receivers, so it can be used in common for the test pattern signal generation circuit without intentionally adding it. I can do it. Furthermore, the present invention can be applied not only to a test pattern signal generation circuit such as the above embodiment that generates a crosshatch test pattern, but also to a test pattern signal generation circuit for generating a crosshatch test pattern to achieve the same effect. Obtainable.

〔Effect of the invention〕

As described above, according to the test pattern signal generation circuit of the present invention, the thickness of the vertical line of the generated test pattern can be made substantially constant even if the horizontal synchronization frequency of the signal source is different.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the test pattern signal generation circuit of the present invention, FIG. 2 is a signal waveform diagram showing the operation of the circuit shown in FIG. 1, and FIG. 3 is a block diagram showing the operation of the circuit shown in FIG. signal 3
4 is a block diagram showing another embodiment of the present invention, FIG. 5 is a block diagram showing an example of a conventional test pattern generation circuit, and FIG. 6 is a conventional test pattern diagram. FIG. 7 is a block diagram showing another example of the pattern generation circuit. 1... PLL circuit 2... Frequency divider 3... Capacitor 4.8... Resistor 5... Buffer gate 6... Frequency voltage conversion circuit 7... Polarity inversion circuit agent Patent attorney Nori Chika Ken Yudo Uji Hiroki Diagram

Claims (1)

[Claims] In a receiver of a synchronous frequency automatic tracking synchronization system capable of receiving multiple types of signal sources with different horizontal synchronous frequencies, a frequency-voltage conversion means for generating a DC voltage depending on the horizontal synchronous frequency or horizontal deflection frequency, and a horizontal scanning a pulse generating means for generating at least one pulse during a period; a differentiating means for differentiating the pulses generated from the pulse generating means; and a waveform shaping means for shaping the differential waveform generated from the differentiating means. A test pattern signal generation circuit comprising: an operating point of the waveform shaping means or a potential of the differential waveform, which is controlled by the DC voltage output from the frequency-voltage converting means.