JPH0464225A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPH0464225A JPH0464225A JP17901490A JP17901490A JPH0464225A JP H0464225 A JPH0464225 A JP H0464225A JP 17901490 A JP17901490 A JP 17901490A JP 17901490 A JP17901490 A JP 17901490A JP H0464225 A JPH0464225 A JP H0464225A
- Authority
- JP
- Japan
- Prior art keywords
- chlorine
- vacuum
- substrate
- adsorbed
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】 〔概 要] 半導体基板表面の乾式エンチング方法に関し。[Detailed description of the invention] 〔overview] Concerning a dry etching method for the surface of a semiconductor substrate.
有機物を含有するレジストを用いず且つイオン衝撃によ
る損傷を与えることなく半導体基板表面を乾式エツチン
グ可能とすることを目的とし。The purpose of this invention is to enable dry etching of the surface of a semiconductor substrate without using a resist containing organic substances and without causing damage due to ion bombardment.
半導体基板の清浄化された一表面に反応性物質を吸着さ
せ、該表面の所定領域に該反応性物質と該表面との間に
反応を生じさせない範囲の量子エネルギーを有する電子
ビームを照射して該所定領域から該反応性物質を除去し
、吸着した該反応性物質と該表面との間に反応を生じさ
せることができる範囲の量子エネルギーを有する紫外線
を該反応性物質が除去された該半導体基板表面全体に照
射することにより該所定領域周囲の該半導体基板をエツ
チングする諸工程を含むことから構成される。A reactive substance is adsorbed on a cleaned surface of a semiconductor substrate, and a predetermined region of the surface is irradiated with an electron beam having a quantum energy within a range that does not cause a reaction between the reactive substance and the surface. The semiconductor from which the reactive substance has been removed is exposed to ultraviolet light having a quantum energy in a range capable of removing the reactive substance from the predetermined region and causing a reaction between the adsorbed reactive substance and the surface. The method includes steps of etching the semiconductor substrate around the predetermined region by irradiating the entire surface of the substrate.
(産業上の利用分野]
本発明は、半導体基板表面のドライエツチング方法に関
する。(Industrial Application Field) The present invention relates to a method for dry etching the surface of a semiconductor substrate.
半導体装置の高速度化および高集積化に必要な高精度の
微細パターンを形成するためにドライエツチングが必須
となっている。また、上記ドライエツチングにおけるマ
スクとして、感光性有機物から成るレジスト層が用いら
れている。Dry etching has become essential in order to form fine patterns with high precision necessary for increasing the speed and integration of semiconductor devices. Further, a resist layer made of a photosensitive organic material is used as a mask in the dry etching.
[発明が解決しようとする課題]
その結果、半導体基板表面に残留するレジストやレジス
トの分解生成物、さらには、レジストに含有されている
ナトリウム等の不純物による汚染が避けられなかった。[Problems to be Solved by the Invention] As a result, contamination by resist remaining on the surface of the semiconductor substrate, decomposition products of the resist, and impurities such as sodium contained in the resist cannot be avoided.
また、ドライエ・ンチングにおいて、加速されたイオン
によって半導体基板表面が損傷を受ける問題があった。Furthermore, in dry etching, there is a problem in that the surface of the semiconductor substrate is damaged by accelerated ions.
本発明は上記のようなレジストを用いることに起因する
汚染やイオン損傷を生じることなく、半導体基板を高精
度でエツチング可能な方法を提供することを目的とする
。SUMMARY OF THE INVENTION An object of the present invention is to provide a method capable of etching a semiconductor substrate with high precision without causing contamination or ion damage caused by using a resist as described above.
上記目的は、半導体基板の清浄化された一表面に該表面
との反応性を有する物質を吸着させる工程と、吸着した
該反応性物質と該表面との間に反応を生じさせない範囲
の量子エネルギーを有する第1の電磁波のビームを該表
面の所定領域に選択的に照射して該所定領域から該反応
性物質を除去する工程と、吸着した該反応性物質と該表
面との間に反応を生じさせることができる範囲の量子エ
ネルギーを有する第2の電磁波を前記のようにして該反
応性物質が選択除去された該半導体基板表面全体に照射
することにより該所定領域周囲における該半導体基板を
エツチングする工程とを含むことを特徴とする本発明に
係る半導体装置の製造方法によって達成される。The above purpose is to adsorb a substance that is reactive with the surface onto a cleaned surface of a semiconductor substrate, and to use a quantum energy within a range that does not cause a reaction between the adsorbed reactive substance and the surface. selectively irradiating a predetermined region of the surface with a first beam of electromagnetic waves having a first electromagnetic wave beam to remove the reactive substance from the predetermined region; and causing a reaction between the adsorbed reactive substance and the surface. Etching the semiconductor substrate around the predetermined region by irradiating the entire surface of the semiconductor substrate from which the reactive substance has been selectively removed as described above with a second electromagnetic wave having a quantum energy in a range that can be generated. This is achieved by a method for manufacturing a semiconductor device according to the present invention, which is characterized by including the steps of:
[作 用]
例えば、真空中加熱により酸化膜を除去されたシリコン
基板表面を塩素ガス雰囲気に曝して、その表面に数原子
層の塩素を吸着させる。このシリコン基板のエツチング
しない所定領域に対し100ないし数100eVの電子
ビームを選択的に照射してこの領域の表面の吸着塩素原
子を選択的に離脱させる。そののち、基板表面に真空紫
外光を照射することにより、残留する吸着塩素原子とシ
リコン基板が反応し、揮発性のシリコン塩化物を生成し
て真空中へ離脱する。このようにして、前記所定領域周
囲のシリコン基板をエツチングする。[Function] For example, the surface of a silicon substrate from which an oxide film has been removed by heating in a vacuum is exposed to a chlorine gas atmosphere, and several atomic layers of chlorine are adsorbed onto the surface. A predetermined region of the silicon substrate that is not etched is selectively irradiated with an electron beam of 100 to several 100 eV to selectively remove adsorbed chlorine atoms from the surface of this region. Thereafter, by irradiating the substrate surface with vacuum ultraviolet light, the remaining adsorbed chlorine atoms react with the silicon substrate to generate volatile silicon chloride, which is released into vacuum. In this way, the silicon substrate around the predetermined region is etched.
上記の方法には1次のような利点がある。The above method has the following first-order advantages.
■レジストマスクを用いることなくシリコン基板のエツ
チングが可能となる。■ Etching of a silicon substrate is possible without using a resist mask.
■レジストマスクのパターン精度グを要しないため1通
常の電子ビーム露光法におけるよりも高いパターン精度
が得られる。(2) Pattern accuracy of resist mask is not required; (1) Higher pattern accuracy than in normal electron beam exposure method can be obtained.
■反応性ガスの加速イオンを用いないため、シリコン基
板の損傷が生じない。■Since accelerated ions of reactive gas are not used, there is no damage to the silicon substrate.
■露光マスクの作製やレジストマスクの形成等に関係す
るリングラフ工程が省略される。(2) A phosphorography process related to the production of an exposure mask, the formation of a resist mask, etc. is omitted.
〔実施例] 以下本発明の実施例を図面を参照して説明する。〔Example] Embodiments of the present invention will be described below with reference to the drawings.
第1図は本発明の実施例の工程説明図である。FIG. 1 is a process explanatory diagram of an embodiment of the present invention.
すなわち1通常の表面処理と同様に、シリコン基板1を
2弗酸(HF)中への浸漬と、硝酸(HNO3)と過酸
化水素(H20□)の混合溶液中での煮沸およびアンモ
ニア水(NH,OH) とH20□の混合溶液中での煮
沸とを繰り返し、最後に塩酸()IcI) とH20
□との混合溶液中での煮沸を行って、同図(a)に示す
ように、その表面に厚さ10人程度の酸化膜3を形成す
る。That is, 1.Similar to normal surface treatment, silicon substrate 1 is immersed in dihydrofluoric acid (HF), boiled in a mixed solution of nitric acid (HNO3) and hydrogen peroxide (H20□), and treated with aqueous ammonia (NH , OH) and H20□ were repeated, and finally, hydrochloric acid ()IcI) and H20
By boiling in a mixed solution with □, an oxide film 3 with a thickness of about 10 mm is formed on the surface, as shown in FIG.
次いで、同図(b)に示すように、到達真空度がlX
10− ” Torr以下の超高真空装置4内にシリコ
ン基板1を設置したのち、ヒータ5により、約800℃
で30分間真空加熱する。その結果、シリコン基板1表
面の酸化膜3が除去され、清浄表面が表出する。Next, as shown in the same figure (b), the ultimate vacuum degree is 1X
After placing the silicon substrate 1 in an ultra-high vacuum device 4 at a temperature of 10-” Torr or less, the silicon substrate 1 is heated to approximately 800°C by a heater 5.
Heat under vacuum for 30 minutes. As a result, the oxide film 3 on the surface of the silicon substrate 1 is removed and a clean surface is exposed.
次いで、ヒータ5による加熱を停止し、シリコン基板1
を室温に戻したのち、同図(C)に示すように、真空装
置4内に塩素ガスを導入する。この導入は、真空装置4
内における塩素の分圧がI Torrとなるように制御
し、100秒間行う。その結果、シリコン基板1表面に
吸着塩素原子層6が生成する。Next, heating by the heater 5 is stopped, and the silicon substrate 1 is heated.
After returning the temperature to room temperature, chlorine gas is introduced into the vacuum device 4, as shown in FIG. 4(C). This introduction
The partial pressure of chlorine in the reactor was controlled to be I Torr, and the test was carried out for 100 seconds. As a result, an adsorbed chlorine atomic layer 6 is generated on the surface of the silicon substrate 1.
吸着塩素原子層6の厚さは、第2図に示すように。The thickness of the adsorbed chlorine atom layer 6 is as shown in FIG.
塩素ガスの分圧と導入時間とで制御される。第2図の横
軸はラングミュア単位(L;IL= I Xl0−bT
orr・5ec)で表した塩素導入量であり、縦軸は、
塩素吸着量(原子層数)である。同図から前記I To
rrで100秒間の導入量、すなわち、 10”Lによ
り、シリコン基板1表面には、平均で約2原子層の塩素
が吸着していることが分かる。It is controlled by the partial pressure of chlorine gas and the introduction time. The horizontal axis in Figure 2 is the Langmuir unit (L; IL = I Xl0-bT
The amount of chlorine introduced is expressed in (orr・5ec), and the vertical axis is
It is the amount of chlorine adsorption (number of atomic layers). From the same figure, the above I To
It can be seen that approximately 2 atomic layers of chlorine are adsorbed on the surface of the silicon substrate 1 on average based on the amount of chlorine introduced for 100 seconds at rr, that is, 10''L.
再び第1図を参照して、同図(d)に示すようにシリコ
ン基板1表面のエツチングしない領域11に対して選択
的に5 KeVの電子ビーム8を、10秒間照射する。Referring again to FIG. 1, as shown in FIG. 1(d), an unetched region 11 on the surface of the silicon substrate 1 is selectively irradiated with a 5 KeV electron beam 8 for 10 seconds.
その結果、エツチングしない領域11から吸着塩素が真
空中へ離脱してシリコン基板1表面が表出する。As a result, the adsorbed chlorine leaves the non-etched region 11 into the vacuum and the surface of the silicon substrate 1 is exposed.
次いで、同図(e)に示すように、シリコン基板1表面
金体に、波長2537人の真空紫外光9を照射する。そ
の結果、吸着塩素原子層6とシリコン基板1との反応に
より+ S I Cl 31 S s C1a等の揮発
性のシリコン化合物7が生成し、真空中に離脱する。こ
のようにして1エツチングしない領域11の周囲におけ
るシリコン基板1がエツチングされる。前述のように、
10”Lの導入量により2原子層の塩素が吸着してい
る。したがって、この吸着塩素とシリコン基板1とが反
応して5iC14を生成するとして一回の塩素ガス導入
によりシリコン基板1の172原子層相当の厚さがエツ
チングされることになる。Next, as shown in FIG. 4E, the gold body on the surface of the silicon substrate 1 is irradiated with vacuum ultraviolet light 9 having a wavelength of 2537. As a result, a volatile silicon compound 7 such as + S I Cl 31 S s C1a is generated by the reaction between the adsorbed chlorine atom layer 6 and the silicon substrate 1, and is released into the vacuum. In this way, the silicon substrate 1 around the area 11 that is not etched is etched. As aforementioned,
Two atomic layers of chlorine are adsorbed by the introduced amount of 10"L. Therefore, assuming that this adsorbed chlorine reacts with the silicon substrate 1 to produce 5iC14, 172 atoms of the silicon substrate 1 are absorbed by one introduction of chlorine gas. The thickness equivalent to the thickness of the layer will be etched.
したがって1第1図(C)ないしくe)の工程を繰り返
して行うことにより、高精度で所定厚さのエツチングが
可能である。また、エツチングしない領域11の横方向
の寸法は、はぼ電子ビーム8の照射精度によって決まる
。したがって、電子ビーム露光法によりパターンニング
されたレジストマスクを用いる場合に比べて、高精度が
得られる。Therefore, by repeating the steps shown in FIGS. 1(C) to 1(e), it is possible to perform etching to a predetermined thickness with high precision. Further, the lateral dimension of the region 11 that is not etched is determined by the irradiation accuracy of the electron beam 8. Therefore, higher accuracy can be obtained than when using a resist mask patterned by electron beam exposure.
第3図は、塩素が吸着したシリコン基板1表面のオージ
ェ電子スペクトル、第4図は塩素吸着したのち電子ビー
ム照射を行ったシリコン基板1のオージェ電子スペクト
ルを示す。すなわち、第3図は、前記108Lの塩素導
入を行った直後の表面であって、 100eVの位置に
シリコンのピークが、また200eνの位置に塩素のピ
ークが現れている。第4図は、前記塩素導入後に、第1
図(d)に示すように5にeVの電子ビーム8照射を行
ったのちの表面を示し、 200eVにおける塩素のピ
ークが消失しており、上記電子ビーム8の照射によって
、吸着塩素が除去されることが分かる。FIG. 3 shows the Auger electron spectrum of the surface of the silicon substrate 1 on which chlorine has been adsorbed, and FIG. 4 shows the Auger electron spectrum of the silicon substrate 1 on which chlorine has been adsorbed and then irradiated with an electron beam. That is, FIG. 3 shows the surface immediately after the introduction of 108 L of chlorine, and a silicon peak appears at a position of 100 eV, and a chlorine peak appears at a position of 200 eν. Figure 4 shows that after the introduction of chlorine, the first
As shown in Figure (d), the surface is shown after being irradiated with the electron beam 8 at 5 eV, and the chlorine peak at 200 eV has disappeared, indicating that the adsorbed chlorine is removed by the irradiation with the electron beam 8. I understand that.
なお、上記実施例においては、エツチングしない領域に
おける吸着塩素原子の除去に電子ビーム照射を、また、
吸着塩素原子とシリコン基板との反応の励起に紫外光を
用いたが、これらは、シリコン基板との反応を生じずに
吸着塩素原子を離脱可能なその他の電磁波、および、吸
着塩素原子とシリコン基板との反応を励起可能なその他
のii電磁波それぞれ置き換えても差支えない。さらに
。In the above example, electron beam irradiation was used to remove adsorbed chlorine atoms in the area not to be etched, and
Ultraviolet light was used to excite the reaction between the adsorbed chlorine atoms and the silicon substrate, but these can be used with other electromagnetic waves that can release the adsorbed chlorine atoms without causing a reaction with the silicon substrate, or with other electromagnetic waves that can excite the adsorbed chlorine atoms and the silicon substrate. There is no problem in replacing each of the other electromagnetic waves that can excite the reaction with ii. moreover.
シリコン基板以外の半導体基板についても、これと反応
性を有するガスを用いて実施することができることは言
うまでもない。It goes without saying that the process can also be carried out using a gas that is reactive with semiconductor substrates other than silicon substrates.
以上説明したように9本発明によれば、レジストマスク
を用いることな(シリコン基板表面をドライエツチング
可能であり、レジストに起因する有機物汚染等がなく、
また1通常の加速イオンを用いるドライエツチングにお
けるようなイオン衝撃による損傷を生しるおそれもない
。さらに、レジストマスクを用いる通常の電子ビーム露
光に比べて、高精度のエンチングが可能である。本発明
によって形成されたメサ状の領域またはエツチングされ
た溝状の領域を有するシリコン基板を用いることにより
、量子細線のような半導体装置が実現可能となる。さら
にまた、エツチングに必要なりソグラフ工程が省略され
、半導体装置の製造工数の低減が可能となる。As explained above, according to the present invention, it is possible to dry-etch the silicon substrate surface without using a resist mask, and there is no organic contamination caused by the resist.
Furthermore, there is no risk of damage caused by ion bombardment, unlike in dry etching using normal accelerated ions. Furthermore, highly accurate etching is possible compared to normal electron beam exposure using a resist mask. By using a silicon substrate having a mesa-like region or an etched groove-like region formed according to the present invention, a semiconductor device such as a quantum wire can be realized. Furthermore, the lithographic process required for etching can be omitted, making it possible to reduce the number of manufacturing steps for semiconductor devices.
第1図は本発明の実施例の工程説明図。
第2図は塩素導入量と塩素吸着量の関係を示すグラフ。
第3図は塩素が吸着したシリコン基板表面のオージェ電
子スペクトル。
第4図は塩素吸着後に電子ビーム照射が行われたシリコ
ン基板表面のオージェ電子スペクトルである。
図において。
1はシリコン基板、 3は酸化膜。
4は真空装置、 5はヒータ。
6は吸着塩素原子層。
7は揮発性のシリコン化合物。
8は電子ビーム、 9は真空紫外光。
11は工・ンチングしない領域
である。
#0’?r子、へ
才非気示へ
木登P月Q実)色イ列/71才U偵明m第 1 図(ぞ
の2)
J4L九斤、へ
クトイ芒明の′実方色θ・1の工、才1頃沙とa月図第
1 図(千01)
塩素導入量と塩素数A量の間T升、FIG. 1 is a process explanatory diagram of an embodiment of the present invention. Figure 2 is a graph showing the relationship between the amount of chlorine introduced and the amount of chlorine adsorbed. Figure 3 shows the Auger electron spectrum of the silicon substrate surface on which chlorine has been adsorbed. FIG. 4 shows an Auger electron spectrum of the surface of a silicon substrate subjected to electron beam irradiation after chlorine adsorption. In fig. 1 is a silicon substrate, 3 is an oxide film. 4 is a vacuum device, 5 is a heater. 6 is an adsorbed chlorine atomic layer. 7 is a volatile silicon compound. 8 is an electron beam, 9 is a vacuum ultraviolet light. Reference numeral 11 indicates an area in which no engineering/nching is performed. #0'? R child, he is not talented, Kito P Moon Q real) Color I row / 71 years old U scout m Figure 1 (Zono 2) J4L 9 catty, Hekutoi Aunmei's real square color θ・1 Figure 1 (1001) Between the amount of chlorine introduced and the amount of chlorine A,
Claims (2)
応性を有する物質を吸着させる工程と、 吸着した該反応性物質と該表面との間に反応を生じさせ
ない範囲の量子エネルギーを有する第1の電磁波のビー
ムを該表面の所定領域に選択的に照射して該所定領域か
ら該反応性物質を除去する工程と、 吸着した該反応性物質と該表面との間に反応を生じさせ
ることができる範囲の量子エネルギーを有する第2の電
磁波を前記のようにして該反応性物質が選択除去された
該半導体基板表面全体に照射することにより該所定領域
周囲における該半導体基板をエッチングする工程 とを含むことを特徴とする半導体装置の製造方法。(1) A step of adsorbing a substance that is reactive with the surface onto a cleaned surface of a semiconductor substrate, and applying quantum energy within a range that does not cause a reaction between the adsorbed reactive substance and the surface. selectively irradiating a predetermined region of the surface with a beam of first electromagnetic waves having a first electromagnetic wave of 100 nm to remove the reactive substance from the predetermined region; and causing a reaction between the adsorbed reactive substance and the surface. etching the semiconductor substrate around the predetermined region by irradiating the entire surface of the semiconductor substrate from which the reactive substance has been selectively removed as described above with a second electromagnetic wave having a quantum energy in a range that can A method for manufacturing a semiconductor device, comprising the steps of:
射と該第2電磁波の照射を繰り返して該所定領域に該半
導体基板のメサを形成することを特徴とする請求項1記
載の半導体装置の製造方法。(2) The semiconductor according to claim 1, wherein the mesa of the semiconductor substrate is formed in the predetermined region by repeating adsorption of the reactive substance, irradiation with the first electromagnetic wave beam, and irradiation with the second electromagnetic wave. Method of manufacturing the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17901490A JPH0464225A (en) | 1990-07-04 | 1990-07-04 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17901490A JPH0464225A (en) | 1990-07-04 | 1990-07-04 | Manufacturing method of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0464225A true JPH0464225A (en) | 1992-02-28 |
Family
ID=16058611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17901490A Pending JPH0464225A (en) | 1990-07-04 | 1990-07-04 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0464225A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001052309A1 (en) * | 2000-01-13 | 2001-07-19 | Fsi International, Inc. | Method of surface preparation |
| US8133554B2 (en) * | 2004-05-06 | 2012-03-13 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
-
1990
- 1990-07-04 JP JP17901490A patent/JPH0464225A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6465374B1 (en) | 1997-10-21 | 2002-10-15 | Fsi International, Inc. | Method of surface preparation |
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| US8133554B2 (en) * | 2004-05-06 | 2012-03-13 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
| US9023436B2 (en) | 2004-05-06 | 2015-05-05 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
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