JPH05152181A - Manufacturing method and system for soi substrate - Google Patents

Abstract

(57) [Abstract] [Purpose] Bonded SO for semiconductor integrated circuit device formation
Regarding the manufacturing method and the manufacturing apparatus of the I substrate, it is possible to align the pattern of the element formation region of the semiconductor substrate for element formation by aligning the facet lines of the supporting substrate forming the SOI substrate. To A semiconductor substrate 2 for element formation on which an element pattern is formed at least once is placed on a support substrate 1 via an insulating film, and facet lines 3 of this support substrate 1 and the element formation Facet line 3 of semiconductor substrate 2
The SOI substrate is manufactured by aligning and bonding so that the angle formed by is a specified angle that is an integer multiple of 0 ° or 90 °. Further, in order to perform this alignment, an angle alignment mechanism including at least two fixing points that come into contact with the facet lines 3 of each substrate and a unit that presses each substrate against the fixing points is used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for manufacturing a bonded SOI substrate for forming a semiconductor integrated circuit device. SOI (Silicon On Insul
The (ator) structure is a structure in which a thick insulating film is interposed between the element and the supporting substrate, and it is easy to completely separate the elements by an insulator, so that it will be put to practical use as a future structure of high-speed / highly integrated circuits. Is expected.

[0002]

2. Description of the Prior Art Prior to the description of the present invention, a conventional SOI
An example of a method of manufacturing an integrated circuit device using a substrate will be described. 2A to 2F are explanatory views of the manufacturing process of the integrated circuit device using the conventional SOI substrate.

In this figure, 21 is a silicon substrate for element formation, 22 is a SiO ₂ film, 23 is a CVD SiO ₂ layer,
Reference numeral 24 is a support substrate, 25 is a gate insulating film, 26 is a gate electrode, 27 is a source region, and 28 is a drain region. A method of manufacturing an integrated circuit device using a conventional SOI substrate will be described with reference to the manufacturing process explanatory diagram.

First step (see FIG. 2 (A)) By etching using a resist pattern, other regions of about 0.2 μm are left on the surface of the element forming silicon substrate 21 so as to leave protrusions for forming elements. Etch away selectively at depth.

[0005] After the entire surface of the second step (see FIG. 2 (B)) element forming silicon substrate 21 to form a SiO ₂ film 22 having a thickness of 300Å is thermally oxidized, CVD SiO ₂ layer having a thickness of 1μm on the upper surface 23 is formed. This SiO
_{The 2nd} film 22 is a good quality insulating film as compared with the CVD SiO ₂ layer 23 and can reduce the leakage current of the element to be formed later.

Third Step (see FIG. 2C) The surface of the CVD SiO ₂ layer 23 formed by the above steps is polished to a level of about 0.5 μm to be flattened.

Fourth step (see FIG. 2D) CVDSiO ₂ polished and flattened by the above steps
The supporting substrate 24 is placed on the surface of the layer 23, and the whole is placed at 800 ° C.
While heating to a certain degree, a pulse voltage is applied and bonding is performed.

Fifth Step (See FIG. 2E) Most of the element forming silicon substrate 21 is polished to isolate islands which will be element forming regions. During this polishing, S
The iO ₂ film 22 serves as a polishing stopper and is polished with good controllability.

Sixth step (see FIG. 2F) The gate insulating film 25, the gate electrode 26, and the source region 2 are formed in the island-shaped element forming regions which are polished and isolated in the above steps.
7. A drain region 28 is formed to form a MOS transistor.

In the above-mentioned conventional manufacturing method, when the support substrate and the semiconductor substrate for element formation are bonded together, there is no particular consideration for exactly matching the directions of the facet lines. The example in which the silicon substrate is used as the element forming semiconductor substrate has been described above. However, even if another semiconductor substrate is used, the same steps as those described above can be performed by only making a change such as forming the SiO ₂ film 22 by the CVD method. SOI substrates can be used to fabricate integrated circuit devices.

[0011]

[Problems to be Solved by the Invention]
As a basic feature of the method for manufacturing an integrated circuit device using a substrate, the shape of the whole diameter of the SOI substrate, the substrate thickness, etc., or the alignment when setting the manufacturing device is determined by the shape of the supporting substrate, On the other hand, when positioning an exposure mask pattern for forming an element, it is possible to optically detect the alignment mark formed on the element forming substrate and use it as a position reference.

However, due to this feature, a problem arises in the stepper alignment process of the exposure step in the step of forming an element on the element forming silicon substrate.

That is, the alignment of the stepper is generally (1) fixing the SOI substrate with reference to the facet line of the semiconductor substrate for element formation of the supporting substrate, (2)
Rough alignment is performed by using several coarse adjustment alignment marks on the element forming semiconductor substrate. (3) Pre-process by detecting several fine adjustment alignment marks on the element forming semiconductor substrate. The rough alignment and the offset between the designated angles are corrected in this order.

FIG. 3 is a diagram for explaining the positional relationship of a conventional SOI substrate. In this figure, 31 is a support substrate, 32 is a semiconductor substrate for element formation, and 33 is an element formation region. As shown in this figure, according to the conventional method for manufacturing an integrated circuit device using an SOI substrate, the directions of the facet lines of the supporting substrate 31 and the element forming semiconductor substrate 32 do not coincide with each other. This means that the facet lines and the element formation regions 33 on the element formation semiconductor substrate 32 do not match in the vertical and horizontal directions.

Then, when the support substrate 31 is supported on the sample support base of the stepper with reference to its facet line, the sample support base of the stepper and the semiconductor substrate 32 for forming elements are formed.
The upper and lower element forming regions 33 have different vertical and horizontal directions, which causes inconvenience in mask exposure.

That is, since the facet line of the supporting substrate 31 determines the outline of the position of the SOI substrate of the stepper,
When the support substrate 31 and the element-forming semiconductor substrate 32 are attached to each other, if the facet lines are misaligned with each other,
Even if the facet line of the supporting substrate 31 is aligned, the alignment of the exposure mask pattern that directly controls the element forming region of the element forming substrate 32 is not aligned.

Therefore, it is necessary to perform the rotation correction in the coarse alignment step (2) of the stepper alignment procedure, but most of the steppers currently available have a correction value within 3 °. Therefore, there is a limit to the range in which the rotation can be corrected.

Therefore, when the element forming semiconductor substrate 32 is bonded onto the supporting substrate 31, the facet lines thereof are parallel to each other or to any side of a rectangular chip including a side parallel to the facet line. , A realistic solution is to match the facet line to an angle that is an integral multiple of 90 °.

According to the present invention, the support substrate and the semiconductor substrate for element formation are bonded to each other so that there is no angular deviation between the facet lines, and the facet lines of the support substrate are aligned to form the element on the element formation substrate. The purpose is to align the pattern of areas.

[0020]

In the method for manufacturing an SOI substrate of the present invention, in order to solve the above-mentioned problems, a semiconductor substrate for element formation in which an element pattern is formed on a supporting substrate via an insulating film. The step of placing and mounting the facet line of the support substrate and the facet line of the semiconductor substrate for element formation at a specified angle that is an integral multiple of 0 ° or 90 °. Adopted.

In this case, the insulating film is formed on the supporting substrate,
The semiconductor substrate for element formation on which the element pattern is formed is mounted while the angle formed by the facet line of the support substrate and the facet line of the semiconductor substrate for element formation is within 3 ° with respect to the designated angle. After that, the process of aligning at the specified angle and pasting was adopted.

Further, in the SOI substrate manufacturing apparatus of the present invention, at least two fixing points which come into contact with the facet lines of the supporting substrate and the element forming semiconductor substrate, and the supporting substrate and the element forming semiconductor substrate are respectively provided. An angle adjusting mechanism including means for pressing the fixed point is adopted.

Further, in another SOI substrate manufacturing apparatus of the present invention, a supporting substrate supporting mechanism comprising at least two fixing points for abutting the facet lines of the supporting substrate and means for pressing the supporting substrate to the fixing points. An element forming substrate support mechanism comprising at least two fixing points for abutting the facet lines of the element forming semiconductor substrate and means for pressing the element forming substrate to the fixing points, the supporting substrate supporting mechanism and the element forming A mechanism that adjusts the angle of the substrate support mechanism is used.

[0024]

Like the SOI substrate of the present invention, an element forming semiconductor substrate having an element pattern formed thereon is placed on a supporting substrate via an insulating film, and facet lines of the supporting substrate and the element forming semiconductor are mounted. If the facet lines of the substrate are aligned and bonded so that the angle is an integer multiple of 0 ° or 90 °, when the supporting substrate is supported on the sample support table of the stepper with reference to the facet line, the element pattern The direction of is also set to a desired direction.

Further, as in the SOI substrate manufacturing apparatus of the present invention, at least two fixing points which come into contact with the facet lines of the supporting substrate and the element forming semiconductor substrate, and the supporting substrate and the element forming semiconductor substrate are respectively provided. When the angle adjusting mechanism including the means for pressing the fixed point is adopted, the facet lines of both substrates can be made to coincide with each other by one operation of pressing the supporting substrate and the semiconductor substrate for element formation by the pressing means.

[0026]

EXAMPLES Examples of the present invention will be described below. (First Embodiment) In a method of manufacturing an integrated circuit device using an SOI substrate of this embodiment, an element pattern for at least one step is formed on a supporting substrate made of silicon or the like with an insulating film interposed. An element forming semiconductor substrate such as silicon is placed, and the angle formed by the facet line of the supporting substrate and the facet line of the element forming semiconductor substrate is 0 ° or 9 °.
Positioning and heating are performed so as to be an integral multiple of 0 °, and a current pulse is applied to bond them.

As described above, when the angle formed by the mutual facet lines is set to 0 ° or an integral multiple of 90 °, the element formation region surrounded by orthogonal parallel lines formed on the element formation semiconductor substrate is vertically or horizontally. Since the sides of the support substrate and the facet line of the support substrate can be made parallel, if the SOI substrate is set on the sample table of the stepper with reference to the facet line of the support substrate, the element formation substrate is also aligned with the sample table of the stepper. Therefore, the subsequent exposure mask alignment, scribing, and measurement can be performed in a consistent state.

In the above case, the element forming semiconductor substrate is placed on the supporting substrate, and the facet line angle deviation is 0 °, 90 °.
When placed within an error range of 3 ° with respect to the designated angles of 180 °, 180 °, and 270 °, a stepper that has been conventionally used causes several rough adjustment positions on the semiconductor substrate for element formation. Perform rough alignment using alignment marks, then detect several precision alignment marks on the semiconductor substrate for device formation, and correct the misalignment between the coarse alignment and the specified angle to attach them. You can Further, in order to align the semiconductor substrate for element formation with the facet line on the support substrate, it is possible to use a device having an extremely simple structure.

FIGS. 1A and 1B show the SOI of one embodiment.
It is a principal part explanatory view of a manufacturing apparatus of an integrated circuit device using a substrate. In this figure, 1 is a support substrate, 2 is a semiconductor substrate for element formation, 3 is a facet line, 4 is a two-point facet stopper, 5 is a linear facet stopper, and 6 is a pressing means.

FIG. 1A illustrates an essential part of an apparatus for manufacturing an SOI substrate using a two-point facet stopper. The structure of this device is as shown in the drawing, and the supporting substrate 1
The semiconductor substrate 2 for element formation is placed on the above, and the facet line 3 of each substrate is set to the two-point facet stopper 4
To press the substrates toward the two-point facet stopper 4 by the pressing means 6 to align the facet lines 3 of both substrates all at once.

FIG. 1B illustrates a main part of an apparatus for manufacturing an SOI substrate using a linear facet stopper. The structure of this device is as shown in the drawing, and the supporting substrate 1
The element forming semiconductor substrate 2 is placed on the substrate, the facet lines 3 of the respective substrates are directed toward the linear facet stopper 5, and the two substrates are pressed by the pressing means 6 in the direction of the linear facet stopper 5. By doing so, the facet lines 3 of both substrates are aligned and aligned.

According to this embodiment, the above problem is solved by equipping the sample support of the substrate bonding apparatus with the facet line alignment device having the structure shown in FIG. 1 (A) or 1 (B). It can be solved easily.

(Second Embodiment) In the first embodiment, the supporting substrate 1 and the element forming semiconductor substrate 2 are brought into contact with their facet lines 3 to the facet stoppers 4 or 5 to form the facet lines 3 of both substrates. Although aligned, the support substrate support mechanism that presses the facet line of the support substrate against the facet stopper and the element formation substrate support mechanism that presses the facet line of the element forming semiconductor substrate against the facet stopper are formed separately. Then
The supporting substrate supporting mechanism and the element forming substrate supporting mechanism are held by an angle adjusting mechanism which has been conventionally used, and the supporting substrate and the element forming semiconductor substrate are aligned at an arbitrary angle to manufacture an SOI substrate. You can also

In this embodiment, it is necessary to form a V groove or the like on the semiconductor substrate for element formation by etching, and when the direction of the V groove does not always coincide with the direction of the facet line or becomes an integral multiple of 90 °. The angle adjustment mechanism described above has an advantage that both substrates can be aligned at an arbitrary angle.

[0035]

As described above, according to the present invention,
Positioning of the exposure mask when forming elements on the element forming semiconductor substrate became easy, and the facet lines of the supporting substrate and the element forming substrate did not match. There is no need to modify the positioning mechanism of the table.

[Brief description of drawings]

FIGS. 1A and 1B are explanatory views of a main part of an integrated circuit device manufacturing apparatus using an SOI substrate according to an embodiment.

FIGS. 2A to 2F are explanatory views of a manufacturing process of an integrated circuit device using a conventional SOI substrate.

FIG. 3 is a diagram illustrating a positional relationship of a conventional SOI substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Support substrate 2 Semiconductor substrate for element formation 3 Facet line 4 2 Point facet stopper 5 Linear facet stopper 6 Pressing means

Claims (4)

[Claims] 1. A semiconductor substrate for element formation, on which an element pattern is formed, is placed on a supporting substrate via an insulating film,
An SOI substrate which is aligned and bonded so that an angle formed by a facet line of the supporting substrate and a facet line of the semiconductor substrate for element formation is a specified angle that is an integer multiple of 0 ° or 90 °. Manufacturing method. 2. An angle formed by a facet line of the support substrate and a facet line of the element formation semiconductor substrate is specified for the element formation semiconductor substrate having an element pattern formed on the support substrate via an insulating film. 2. The SO according to claim 1, wherein after being placed with an error of 3 ° or less with respect to the angle of 1), it is aligned and bonded to a specified angle.
I substrate manufacturing method. 3. An angle adjustment comprising at least two fixing points that come into contact with facet lines of the supporting substrate and the element forming semiconductor substrate, and means for pressing each of the supporting substrate and the element forming semiconductor substrate to the fixing points. An apparatus for manufacturing an SOI substrate, comprising a mechanism. 4. A support substrate supporting mechanism including at least two fixing points for abutting the facet lines of the supporting substrate and a means for pressing the supporting substrate to the fixing points, and at least a facet line of the semiconductor substrate for element formation abutting. An element forming substrate supporting mechanism including two fixing points and means for pressing the element forming substrate to the fixing point, and a mechanism for adjusting an angle between the supporting substrate supporting mechanism and the element forming substrate supporting mechanism. An apparatus for manufacturing an SOI substrate, characterized in that