JPH05166958A - Semiconductor element housing package - Google Patents
Semiconductor element housing packageInfo
- Publication number
- JPH05166958A JPH05166958A JP3330593A JP33059391A JPH05166958A JP H05166958 A JPH05166958 A JP H05166958A JP 3330593 A JP3330593 A JP 3330593A JP 33059391 A JP33059391 A JP 33059391A JP H05166958 A JPH05166958 A JP H05166958A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- metallized
- metal layer
- metal frame
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
(57)【要約】
【目的】容器の気密封止の信頼性を高いものとなし、内
部に収容する半導体集積回路素子を長期間にわたり正
常、且つ安定に作動させることができる半導体素子収納
用パッケージを提供することにある。
【構成】絶縁基体1の表面に設けたメタライズ金属層8
に金属枠体9をロウ付けするとともに該金属枠体9に金
属製蓋体2を取着し、内部に半導体素子4を気密に収容
するようになした半導体素子収納用パッケージであっ
て、前記メタライズ金属層8の厚みを25μm 以上とし
た。
(57) [Abstract] [Purpose] A package for storing a semiconductor element, which has high reliability in hermetically sealing a container and can operate a semiconductor integrated circuit element accommodated therein normally and stably for a long period of time. To provide. [Structure] Metallized metal layer 8 provided on the surface of insulating substrate 1
A package for storing a semiconductor element, wherein a metal frame body 9 is brazed to the metal frame body, a metal lid body 2 is attached to the metal frame body 9, and a semiconductor element 4 is hermetically housed therein. The metallized metal layer 8 had a thickness of 25 μm or more.
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体素子を収容する半
導体素子収納用パッケージの改良に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a semiconductor element housing package for housing a semiconductor element.
【0002】[0002]
【従来の技術】従来、半導体素子、特にLSI等の半導
体集積回路素子を収容するための半導体素子収納用パッ
ケージは一般にアルミナセラミックス等の電気絶縁材料
から成り、その上面略中央部に半導体集積回路素子を収
容するための凹部及び該凹部周辺より外周端にかけて導
出されたタングステン、モリブデン、マンガン等の高融
点金属粉末から成るメタライズ配線層を有する絶縁基体
と、半導体集積回路素子を外部電気回路に電気的に接続
するために前記メタライズ配線層に銀ロウ等のロウ材を
介しロウ付けされた外部リード端子と、金属製蓋体とか
ら構成されており、絶縁基体の凹部底面に半導体集積回
路素子を接着剤を介し接着固定するとともに該半導体集
積回路素子の各電極をボンディングワイヤを介してメタ
ライズ配線層に接続し、しかる後、絶縁基体上面に金属
製蓋体を溶接し、絶縁基体と金属製蓋体とから成る容器
内部に半導体集積回路素子を気密に封止することによっ
て最終製品としての半導体装置となる。2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element such as an LSI, is generally made of an electrically insulating material such as alumina ceramics, and a semiconductor integrated circuit element is provided at a substantially central portion of its upper surface. An insulating substrate having a metallization wiring layer made of a refractory metal powder such as tungsten, molybdenum, and manganese, which is led out from the periphery of the recess to the outer peripheral edge, and the semiconductor integrated circuit element is electrically connected to an external electric circuit. It is composed of an external lead terminal brazed to the metallized wiring layer via a brazing material such as silver brazing for connecting to the The electrodes of the semiconductor integrated circuit element are bonded and fixed to the metallized wiring layer through bonding wires. After that, a metal lid is welded to the upper surface of the insulating base, and the semiconductor integrated circuit element is hermetically sealed inside the container made of the insulating base and the metal lid, thereby forming a semiconductor device as a final product. ..
【0003】尚、前記従来の半導体素子収納用パッケー
ジは通常、絶縁基体の上面にコバール金属や42アロイ等
の金属材料から成る金属枠体を予めロウ付けしておくと
ともに該金属枠体に金属製蓋体をシームウエルド法等に
より溶接させることによって金属製蓋体は絶縁基体の上
面に取着され、これによって絶縁基体と金属製蓋体とか
ら成る容器が気密に封止される。In the conventional package for accommodating semiconductor elements, a metal frame body made of a metal material such as Kovar metal or 42 alloy is usually brazed on the upper surface of an insulating substrate, and the metal frame body is made of metal. The metal lid is attached to the upper surface of the insulating base by welding the lid by the seam weld method or the like, whereby the container made of the insulating base and the metal lid is hermetically sealed.
【0004】また前記絶縁基体への金属枠体のロウ付け
はまず絶縁基体の上面に金属枠体より若干大きめの面積
にタングステン、モリブデン、マンガン等の高融点金属
粉末から成るメタライズ金属層を従来周知のスクリーン
印刷法等の厚膜手法を採用することによって被着形成
し、次に前記メタライズ金属層上に銀ロウ等のロウ材と
金属枠体とを順次載置させ、最後に前記ロウ材に約800
℃の温度を印加し、ロウ材を加熱溶融させることによっ
て行われる。For brazing a metal frame to the insulating base, a metallized metal layer made of a refractory metal powder of tungsten, molybdenum, manganese, etc. is first formed on the upper surface of the insulating base in a slightly larger area than the metal frame. The film is formed by applying a thick film technique such as the screen printing method, and then a brazing material such as a silver brazing material and a metal frame are sequentially placed on the metallized metal layer, and finally the brazing material is applied to the brazing material. About 800
It is performed by applying a temperature of ° C and heating and melting the brazing material.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージにおいては、絶縁基体
に金属枠体をロウ付けするためのメタライズ金属層が従
来周知のスクリーン印刷法を採用することによって形成
されており、その厚みが10〜20μm と薄く、応力吸収機
能をあまり有していないことから金属枠体に金属製蓋体
をシームウエルド法により溶接し、半導体集積回路素子
を気密封止する場合、金属枠体及び金属製蓋体に熱が印
加されて膨張すると絶縁基体と金属枠体との間に介在す
るメタライズ金属層に大きな熱応力が作用し、該熱応力
によってメタライズ金属層が絶縁基体より剥離し、容器
の気密封止が破れて内部に収容する半導体集積回路素子
を長期間にわたり正常、且つ安定に作動させることがで
きなくなるという欠点を有していた。However, in this conventional package for accommodating semiconductor elements, the metallized metal layer for brazing the metal frame to the insulating substrate is formed by employing the conventionally known screen printing method. When the metal lid is welded to the metal frame by the seam weld method and the semiconductor integrated circuit element is hermetically sealed, its thickness is as thin as 10 to 20 μm and it does not have much stress absorbing function. When heat is applied to the metal frame body and the metal lid body to expand, a large thermal stress acts on the metallized metal layer interposed between the insulating base and the metal frame, and the thermal stress causes the metallized metal layer to become an insulating base. It is peeled off more, the airtight sealing of the container is broken, and the semiconductor integrated circuit element accommodated inside cannot be operated normally and stably for a long period of time. The had.
【0006】[0006]
【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は容器の気密封止を常に完全とし、内部に
収容する半導体集積回路素子を長期間にわたり正常、且
つ安定に作動させることができる半導体素子収納用パッ
ケージを提供することにある。SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and its object is to keep the airtight sealing of a container always, and to operate a semiconductor integrated circuit element housed inside normally and stably for a long period of time. Another object of the present invention is to provide a package for housing a semiconductor device that can be made.
【0007】[0007]
【課題を解決するための手段】本発明は絶縁基体の表面
に設けたメタライズ金属層に金属枠体をロウ付けすると
ともに該金属枠体に金属製蓋体を取着し、内部に半導体
素子を気密に収容するようになした半導体素子収納用パ
ッケージであって、前記メタライズ金属層の厚みを25μ
m 以上としたことを特徴とするものである。According to the present invention, a metal frame is brazed to a metallized metal layer provided on the surface of an insulating substrate, a metal lid is attached to the metal frame, and a semiconductor element is provided inside. A package for housing a semiconductor element that is hermetically sealed, wherein the metallized metal layer has a thickness of 25 μm.
It is characterized by being set to m or more.
【0008】[0008]
【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1 及び図2 は本発明の半導体素子収納用パッケー
ジの一実施例を示し、1 は絶縁基体、2 は金属製蓋体で
ある。この絶縁基体1 と金属製蓋体2 とで半導体集積回
路素子を収容するための容器3 が構成される。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings. 1 and 2 show an embodiment of a package for housing a semiconductor device of the present invention, in which 1 is an insulating base and 2 is a metallic lid. The insulating base 1 and the metallic lid 2 constitute a container 3 for housing a semiconductor integrated circuit device.
【0009】前記絶縁基体1 はその上面中央部に半導体
集積回路素子4 を収容するための空所を形成する凹部1a
が設けてあり、該凹1a底面には半導体集積回路素子4 が
樹脂、ガラス、ロウ材等の接着剤を介して取着される。The insulating substrate 1 has a concave portion 1a which forms a space for accommodating the semiconductor integrated circuit element 4 in the central portion of the upper surface thereof.
The semiconductor integrated circuit element 4 is attached to the bottom surface of the recess 1a through an adhesive such as resin, glass, or brazing material.
【0010】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体等の電気絶縁材料から成り、例えば酸化
アルミニウム質焼結体から成る場合はアルミナ(Al 2O
3 ) 、シリカ(SiO2 ) 、カルシア(CaO) 、マグネシア(M
gO) 等の原料粉末に適当な有機溶剤、溶媒を添加混合し
て泥漿状となすとともにこれを従来周知のドクターブレ
ード法やカンダーロール法を採用することによってセラ
ミックグリーンシート( セラミック生シート)を得、し
かる後、前記セラミックグリーンシートに適当な打ち抜
き加工を施すとともに複数枚積層し、高温( 約1600℃)
の温度で焼成することよって製作される。The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body. Alumina (Al 2 O
3 ), silica (SiO 2 ), calcia (CaO), magnesia (M
(gO) and other raw material powders are mixed with an appropriate organic solvent and solvent to form a slurry, and a ceramic green sheet (ceramic green sheet) is obtained by applying the well-known doctor blade method and kander roll method. After that, appropriate punching process is applied to the ceramic green sheet and multiple sheets are laminated at high temperature (about 1600 ℃)
It is manufactured by firing at the temperature.
【0011】また前記絶縁基体1 には凹部1a周辺から容
器3の外部にかけて導出するメタライズ配線層5 が被着
形成されており、該メタライズ配線層5 の凹部1a周辺部
には半導体集積回路素子4 の各電極がボンディングワイ
ヤ6 を介して電気的に接続され、また容器3 の外部に導
出された部位には外部電気回路と接続される外部リード
端子7 が銀ロウ等のロウ材を介し取着される。A metallized wiring layer 5 extending from the periphery of the recess 1a to the outside of the container 3 is adhered to the insulating substrate 1, and the semiconductor integrated circuit element 4 is formed around the recess 1a of the metallized wiring layer 5. Each electrode is electrically connected via a bonding wire 6, and an external lead terminal 7 connected to an external electric circuit is attached to a portion led out of the container 3 through a brazing material such as silver solder. To be done.
【0012】前記メタライズ配線層5 はタングステン
(W) 、モリブデン(Mo)、マンガン(Mn)等の高融点金属粉
末から成り、該タングステン等の高融点金属粉末に適当
な有機溶剤、溶媒を添加混合して得た金属ペーストを従
来周知のスクリーン印刷法等の厚膜手法を採用し、絶縁
基体1 となるセラミックグリーンシートに予め被着させ
ておくことによって絶縁基体1 の凹部1a周辺から容器3
の外部にかけて被着形成される。The metallized wiring layer 5 is made of tungsten.
(W), molybdenum (Mo), consisting of refractory metal powder such as manganese (Mn), a suitable organic solvent to the refractory metal powder such as tungsten, a metal paste obtained by adding and mixing a solvent conventionally known By using a thick film technique such as a screen printing method and attaching the ceramic green sheet to be the insulating substrate 1 in advance, the insulating substrate 1 is covered with the container 3 from the periphery of the recess 1a.
Is formed on the outside of the substrate.
【0013】尚、前記メタライズ配線層5 はその露出す
る表面にニッケル(Ni)、金(Au)等の良導電性で、且つ耐
蝕性に優れた金属をメッキ法等により1.0 乃至20.0μm
の厚みに層着させておくとメタライズ配線層5 の酸化腐
食を有効に防止することができるとともにメタライズ配
線層5 とボンディングワイヤ6 との接続及びメタライズ
配線層5 と外部リード端子7 とのロウ付け取着が極めて
強固なものとなる。従って、メタライズ配線層5 の酸化
腐食を防止し、メタライズ配線層5 とボンディングワイ
ヤ6 との接続及びメタライズ配線層5 と外部リード端子
7 とのロウ付けを強固なものとなすにはメタライズ配線
層5 の露出表面にニッケル、金等を1.0乃至20.0μm の
厚みに層着させておくことが好ましい。The exposed surface of the metallized wiring layer 5 is made of nickel (Ni), gold (Au) or the like having a good conductivity and a corrosion-resistant metal by plating such as 1.0 to 20.0 μm.
The metallized wiring layer 5 can be effectively prevented from being oxidized and corroded by connecting the metallized wiring layer 5 to the bonding wire 6 and the metallized wiring layer 5 and the external lead terminals 7 are brazed to each other. The attachment becomes extremely strong. Therefore, the oxidization corrosion of the metallized wiring layer 5 is prevented, the connection between the metallized wiring layer 5 and the bonding wire 6 and the metallized wiring layer 5 and the external lead terminal are prevented.
In order to make the brazing with 7 strong, it is preferable to deposit nickel, gold or the like on the exposed surface of the metallized wiring layer 5 to a thickness of 1.0 to 20.0 μm.
【0014】また前記メタライズ配線層5 にロウ付け取
着される外部リード端子7 は内部に収容する半導体集積
回路素子4 を外部電気回路に接続する作用を為し、外部
リード端子7 を外部電気回路に接続することによって内
部に収容される半導体集積回路素子4 はメタライズ配線
層5 及び外部リード端子7 を介して外部電気回路に電気
的に接続されることとなる。The external lead terminals 7 which are brazed and attached to the metallized wiring layer 5 serve to connect the semiconductor integrated circuit element 4 housed therein to an external electric circuit, and the external lead terminals 7 are connected to the external electric circuit. The semiconductor integrated circuit element 4 housed inside is electrically connected to the external electric circuit via the metallized wiring layer 5 and the external lead terminal 7 by connecting to the.
【0015】前記外部リード端子7 はコバール金属(Fe-
Ni-Co 合金) や42アロイ(Fe-Ni合金) 等の金属材料から
成り、コバール金属等のインゴット( 塊) を圧延加工法
や打ち抜き加工法等、従来周知の金属加工法を採用する
ことによって所定の板状に形成される。The external lead terminal 7 is made of Kovar metal (Fe-
Ni-Co alloy), 42 alloy (Fe-Ni alloy), and other ingots (lumps) made of Kovar metal, etc., by adopting well-known metal processing methods such as rolling and punching. It is formed in a predetermined plate shape.
【0016】前記絶縁基体1 はまたその上面にメタライ
ズ金属層8が被着形成されており、該メタライズ金属層8
には金属枠体9 が銀ロウ等のロウ材10を介しロウ付け
されている。The insulating substrate 1 also has a metallized metal layer 8 deposited on the upper surface thereof.
A metal frame body 9 is brazed to this via a brazing material 10 such as silver brazing.
【0017】前記絶縁基体1 上面のメタライズ金属層8
はタングステン、モリブデン、マンガン等の高融点金属
粉末から成り、その厚みHが25μm 以上となっている。A metallized metal layer 8 on the upper surface of the insulating substrate 1
Is made of a refractory metal powder such as tungsten, molybdenum, or manganese, and has a thickness H of 25 μm or more.
【0018】前記絶縁基体1 に被着形成したメタライズ
金属層8 はその厚みHが25μm 以上と厚いことから応力
吸収機能に優れ、その結果、金属枠体9 に金属製蓋体2
をシームウエルド法により溶接し、半導体集積回路素子
4 を気密封止する際、金属枠体9 及び金属製蓋体2 に熱
が印加されて大きく膨張し、絶縁基体1 と金属枠体9と
の間に介在するメタライズ金属層8 に大きな熱応力が作
用したとしても、該熱応力はメタライズ金属層8 の内部
で吸収され、メタライズ金属層8 が絶縁基体1より剥離
することはない。従って、容器3 の気密封止は常に維持
され、内部に収容する半導体集積回路素子4 を長期間に
わたり正常、且つ安定に作動させることができる。The metallized metal layer 8 formed on the insulating substrate 1 has a thickness H of 25 μm or more, and thus has a great stress absorbing function. As a result, the metal frame 9 and the metal lid 2 are formed.
Are welded by the seam weld method to form a semiconductor integrated circuit device.
When airtightly sealing 4, the metal frame 9 and the metal lid 2 are heated and greatly expand, and a large thermal stress is applied to the metallized metal layer 8 interposed between the insulating substrate 1 and the metal frame 9. The thermal stress is absorbed inside the metallized metal layer 8 even if is applied, and the metallized metal layer 8 is not separated from the insulating substrate 1. Therefore, the airtight sealing of the container 3 is always maintained, and the semiconductor integrated circuit element 4 housed inside can be normally and stably operated for a long period of time.
【0019】尚、前記メタライズ金属層8 はその厚みが
25μm 未満であるとメタライズ金属層8 における応力吸
収機能が低下し、金属製蓋体2 を金属枠体9 にシームウ
エルド法により溶接する際の熱応力によって絶縁基体1
より剥がれてしまう。従って、前記メタライズ金属層8
はその厚みH が25μm 以上に特定される。The metallized metal layer 8 has a thickness of
When it is less than 25 μm, the stress absorbing function in the metallized metal layer 8 is deteriorated, and the insulating base 1 is caused by the thermal stress when the metal lid 2 is welded to the metal frame 9 by the seam weld method.
It will come off more. Therefore, the metallized metal layer 8
Has a thickness H of 25 μm or more.
【0020】また前記メタライズ金属層8 はその厚みが
45μm を越えるとメタライズ金属層8 の上面部が絶縁基
体1 に強固に接合せず、メタライズ金属層8 に金属枠体
9 をロウ材10を介してロウ付けしても金属枠体9 を絶縁
基体1 に強固に接合させることが困難となる。従って、
前記メタライズ金属層8 はその厚みH を45μm 以下とし
ておくことが好ましい。The metallized metal layer 8 has a thickness
When the thickness exceeds 45 μm, the upper surface of the metallized metal layer 8 does not firmly bond to the insulating substrate 1, and the metallized metal layer 8 has a metal frame body.
Even if the brazing material 9 is brazed via the brazing material 10, it becomes difficult to firmly bond the metal frame body 9 to the insulating base body 1. Therefore,
The metallized metal layer 8 preferably has a thickness H 4 of 45 μm or less.
【0021】更に前記メタライズ金属層8 はその表面に
ニッケル(Ni)、金(Au)等のロウ材10と濡れ性が良く、且
つ耐蝕性に優れた金属をメッキ法等により1.0 乃至20.0
μmの厚みに層着させておくとメタライズ金属層8 の酸
化腐食を有効に防止することができるとともにメタライ
ズ金属層8 と金属枠体9 とのロウ付け取着を極めて強固
なものとなすことができる。従って、メタライズ金属層
8 の表面にはロウ材と濡れ性が良く、且つ耐蝕性に優れ
た金属を1.0 乃至20.0μm の厚みに層着させておくこと
が好ましい。Further, the metallized metal layer 8 has a surface on which a metal having good wettability with the brazing material 10 such as nickel (Ni) or gold (Au) and having excellent corrosion resistance is applied by a plating method or the like to 1.0 to 20.0.
When the metallized metal layer 8 is deposited to a thickness of μm, the oxidative corrosion of the metallized metal layer 8 can be effectively prevented, and the brazed attachment of the metallized metal layer 8 and the metal frame 9 can be made extremely strong. it can. Therefore, the metallized metal layer
It is preferable to deposit a metal having good wettability with the brazing material and excellent corrosion resistance on the surface of 8 in a thickness of 1.0 to 20.0 μm.
【0022】前記メタライズ金属層8 はタングステン等
の高融点金属粉末に適当な有機溶剤、溶媒を添加混合し
て得た金属ペーストを従来周知のスクリーン印刷法で複
数層に印刷塗布し、厚みを25μm 以上とするとともにこ
れを高温で焼き付けることによって絶縁基体1 の上面に
被着形成される。The metallized metal layer 8 is formed by applying a metal paste obtained by adding and mixing a suitable organic solvent or solvent to a refractory metal powder such as tungsten in a plurality of layers by a conventionally known screen printing method to have a thickness of 25 μm. In addition to the above, it is deposited on the upper surface of the insulating substrate 1 by baking it at a high temperature.
【0023】また前記メタライズ金属層8 にロウ材10を
介してロウ付けされる金属枠体9 は金属製蓋体2 を絶縁
基体1 に取着する際の下地金属部材として作用し、金属
枠体9 に金属製蓋体2 をシームウエルド法等により溶接
することによって金属製蓋体2 は絶縁基体1 上に取着さ
れる。前記金属枠体9 はコバール金属や42アロイ等の金
属材料から成り、該コバール金属等のインゴット( 塊)
を圧延加工法、打ち抜き加工法等、従来周知の金属加工
法を採用することによって所定の枠状に形成される。The metal frame 9 which is brazed to the metallized metal layer 8 through the brazing material 10 acts as a base metal member when the metal lid 2 is attached to the insulating base 1, The metal lid body 2 is attached to the insulating base 1 by welding the metal lid body 2 to 9 by the seam weld method or the like. The metal frame 9 is made of a metal material such as Kovar metal or 42 alloy, and the ingot (lump) of the Kovar metal or the like is used.
Is formed into a predetermined frame shape by adopting a conventionally known metal processing method such as a rolling processing method or a punching processing method.
【0024】また前記金属枠体9 は絶縁基体1 の上面に
被着させたメタライズ金属層8 上に銀ロウ等のロウ材10
を枠状に成形したプリフォームと金属枠体9 とを順次載
置させ、しかる後、前記ロウ材10から成るプリフォーム
を加熱溶融させることによって絶縁基体1 の上面にロウ
付けされる。The metal frame body 9 is a brazing material 10 such as silver braze on the metallized metal layer 8 deposited on the upper surface of the insulating substrate 1.
A preform molded into a frame shape and a metal frame body 9 are sequentially placed, and then the preform made of the brazing material 10 is heated and melted to be brazed to the upper surface of the insulating base 1.
【0025】かくして本発明の半導体素子収納用パッケ
ージによれば絶縁基体1 の凹部1a底面に半導体集積回路
素子4 を接着剤を介して取着するとともに半導体集積回
路素子4 の各電極をメタライズ配線層5にボンディング
ワイヤ6 を介して電気的に接続し、しかる後、絶縁基体
1 の上面にロウ付けした金属枠体9 に金属製蓋体2 をシ
ームウエルド法等により溶接し、絶縁基体1 と金属製蓋
体2 とから成る容器3内部に半導体集積回路素子4 を気
密に封止することによって最終製品としての半導体装置
となる。Thus, according to the package for accommodating semiconductor elements of the present invention, the semiconductor integrated circuit element 4 is attached to the bottom surface of the concave portion 1a of the insulating substrate 1 with an adhesive and each electrode of the semiconductor integrated circuit element 4 is metalized wiring layer. 5 electrically through the bonding wire 6 and then the insulating substrate
The metal lid body 2 is welded to the metal frame body 9 brazed to the upper surface of 1 by the seam weld method or the like, and the semiconductor integrated circuit element 4 is hermetically sealed inside the container 3 composed of the insulating base body 1 and the metal lid body 2. By encapsulating, a semiconductor device as a final product is obtained.
【0026】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能である。The present invention is not limited to the above-mentioned embodiments, but various modifications can be made without departing from the gist of the present invention.
【0027】[0027]
【発明の効果】本発明によれば絶縁基体の表面に設けた
メタライズ金属層の厚みを25μm 以上の厚いものとなし
たことからメタライズ金属層の応力吸収機能を高いもの
となすことができ、その結果、金属枠体に金属製蓋体を
シームウエルド法により溶接し、半導体集積回路素子を
気密封止する際、金属枠体及び金属製蓋体に熱が印加さ
れて大きく膨張し、絶縁基体と金属枠体との間に介在す
るメタライズ金属層に大きな熱応力が作用したとして
も、該熱応力はメタライズ金属層の内部で吸収され、メ
タライズ金属層が絶縁基体より剥離することはない。従
って、容器の気密封止は常に維持され、内部に収容する
半導体集積回路素子を長期間にわたり正常、且つ安定に
作動させることができる。According to the present invention, since the metallized metal layer provided on the surface of the insulating substrate has a thickness of 25 μm or more, it is possible to enhance the stress absorption function of the metallized metal layer. As a result, when the metal lid body is welded to the metal frame body by the seam weld method to hermetically seal the semiconductor integrated circuit element, heat is applied to the metal frame body and the metal lid body to greatly expand the insulating body. Even if a large thermal stress acts on the metallized metal layer interposed between the metallized metal layer and the metal frame, the thermal stress is absorbed inside the metallized metal layer, and the metallized metal layer is not separated from the insulating substrate. Therefore, the airtight sealing of the container is always maintained, and the semiconductor integrated circuit element housed inside can be normally and stably operated for a long period of time.
【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing an example of a semiconductor element housing package of the present invention.
【図2】図1に示すパッケージの要部拡大断面図であ
る。FIG. 2 is an enlarged cross-sectional view of a main part of the package shown in FIG.
1・・・・・絶縁基体 2・・・・・金属製蓋体 3・・・・・容器 5・・・・・メタライズ配線層 7・・・・・外部リード端子 8・・・・・メタライズ金属層 9・・・・・金属枠体 10・・・・・ロウ材 1 ... Insulating substrate 2 ... Metal lid 3 ... Container 5 ... Metallized wiring layer 7 ... External lead terminal 8 ... Metallized Metal layer 9 ... Metal frame 10 ... Brazing material
Claims (1)
に金属枠体をロウ付けするとともに該金属枠体に金属製
蓋体を取着し、内部に半導体素子を気密に収容するよう
になした半導体素子収納用パッケージであって、前記メ
タライズ金属層の厚みを25μm 以上としたことを特徴と
する半導体素子収納用パッケージ。1. A metal frame is brazed to a metallized metal layer provided on the surface of an insulating substrate, and a metal lid is attached to the metal frame so that a semiconductor element is hermetically housed therein. A package for storing a semiconductor element, wherein the metallized metal layer has a thickness of 25 μm or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3330593A JPH05166958A (en) | 1991-12-13 | 1991-12-13 | Semiconductor element housing package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3330593A JPH05166958A (en) | 1991-12-13 | 1991-12-13 | Semiconductor element housing package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05166958A true JPH05166958A (en) | 1993-07-02 |
Family
ID=18234393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3330593A Pending JPH05166958A (en) | 1991-12-13 | 1991-12-13 | Semiconductor element housing package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05166958A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9006582B2 (en) | 2012-03-14 | 2015-04-14 | Ngk Spark Plug Co., Ltd. | Ceramic substrate and process for producing same |
| CN112216655A (en) * | 2020-11-03 | 2021-01-12 | 中国电子科技集团公司第四十三研究所 | LTCC-based SiP packaging shell and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5081066A (en) * | 1973-11-15 | 1975-07-01 | ||
| JPS60123044A (en) * | 1983-12-07 | 1985-07-01 | Fujitsu Ltd | semiconductor equipment |
-
1991
- 1991-12-13 JP JP3330593A patent/JPH05166958A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5081066A (en) * | 1973-11-15 | 1975-07-01 | ||
| JPS60123044A (en) * | 1983-12-07 | 1985-07-01 | Fujitsu Ltd | semiconductor equipment |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9006582B2 (en) | 2012-03-14 | 2015-04-14 | Ngk Spark Plug Co., Ltd. | Ceramic substrate and process for producing same |
| KR20160089540A (en) | 2012-03-14 | 2016-07-27 | 니혼도꾸슈도교 가부시키가이샤 | Ceramic substrate and process for producing same |
| CN112216655A (en) * | 2020-11-03 | 2021-01-12 | 中国电子科技集团公司第四十三研究所 | LTCC-based SiP packaging shell and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH11126847A (en) | Electronic component storage package | |
| JP2883235B2 (en) | Package for storing semiconductor elements | |
| JPH05144956A (en) | Package for storing semiconductor devices | |
| JPH05166958A (en) | Semiconductor element housing package | |
| JP3318453B2 (en) | Electronic component storage package | |
| JPH11126836A (en) | Package for storing piezoelectric vibrator | |
| JP2750232B2 (en) | Electronic component storage package | |
| JPH08316352A (en) | Package for storing semiconductor devices | |
| JP2543236Y2 (en) | Package for storing semiconductor elements | |
| JPH0669364A (en) | Package for storing semiconductor devices | |
| JP3318452B2 (en) | Electronic component storage package | |
| JP2948990B2 (en) | Package for storing semiconductor elements | |
| JP2849869B2 (en) | Package for storing semiconductor elements | |
| JPH08115990A (en) | Package for storing semiconductor devices | |
| JPH06169025A (en) | Package for storing semiconductor devices | |
| JP3176246B2 (en) | Package for storing semiconductor elements | |
| JP3372812B2 (en) | Electronic component storage package | |
| JP3426741B2 (en) | Package for storing semiconductor elements | |
| JPH05160283A (en) | Semiconductor device containing package | |
| JP2543149Y2 (en) | Package for storing semiconductor elements | |
| JP2948991B2 (en) | Package for storing semiconductor elements | |
| JPH05144966A (en) | Package for containing semiconductor element | |
| JP2670208B2 (en) | Package for storing semiconductor elements | |
| JP2685159B2 (en) | Electronic component storage package | |
| JP2740606B2 (en) | Package for storing semiconductor elements |