JPH05167064A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] To improve the breakdown voltage of the junction of a pn diode or a Schottky diode and the collector of a bipolar transistor. [Configuration] Low-concentration region 3 around the Schottky junction 3a
After ion implantation into the substrate, heat treatment is performed at 300 ° C. or more and 600 ° C. or less to form the high resistance region 2 having a depth from the surface of at least 100 nm or more. The present manufacturing method is applicable to a pn junction to obtain the same effect. With this structure, electric field concentration around the Schottky electrode 1 on the surface is relaxed, the leak current in the high resistance region 2 is reduced, and the breakdown voltage of the Schottky junction 3a is improved to the maximum breakdown voltage determined by the semiconductor material.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device for improving the breakdown voltage of a pn diode, a Schottky diode, a collector of a bipolar transistor and the like.

[0002]

2. Description of the Related Art It is extremely important to secure a sufficient breakdown voltage in a semiconductor device, particularly a power semiconductor device. In the conventional method for manufacturing a semiconductor device, a defect is caused on the surface and inside of the semiconductor substrate around the electrode by the impact of ion implantation, and the resistance outside the active region is increased to improve the breakdown voltage.

[0003]

However, in the above-mentioned conventional structure, the withstand voltage can be improved only by about several tens of V and cannot be increased to the maximum withstand voltage determined by the semiconductor material, and the withstand voltage is the dose amount of ion implantation. Strongly depends on
When the dose is high, there is a problem that the leak current increases and the breakdown voltage deteriorates.

The present invention solves the above-mentioned conventional problems, and provides a method of manufacturing a semiconductor device having a large process margin by suppressing the leak current of the junction and improving the maximum breakdown voltage determined by the semiconductor material. To aim.

[0005]

In order to achieve this object, a method of manufacturing a semiconductor device according to the present invention has a structure in which a junction exists on the surface of the semiconductor device, and an ion near the junction is used as a mask in a self-aligned manner. Implanting causes a defect on the low-concentration side in the vicinity of the junction due to the impact, increases the resistance in all regions except the active region, and eliminates defects that contribute to the leakage current in the high-resistance region after ion implantation, and Defects that contribute to carrier compensation remain above 300 ℃ 600 ℃
The following heat treatment is performed.

[0006]

With this structure, the withstand voltage of the junction can be increased to the maximum withstand voltage of the semiconductor material by eliminating the extra defect that deteriorates the withstand voltage due to the leak current and leaving only the defect contributing to the high resistance.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention, showing an example of a gallium arsenide (GaAs) Schottky barrier diode. In FIG. 1, 1 is a Schottky electrode, 2 is a high resistance region, 3 is an n ⁻ type GaAs layer, 3a is a Schottky junction, 4 is an n ⁺ type GaAs layer, 5 is an ohmic electrode, 6
The n ^- n by laminating a type GaAs layer 3 and the n ⁺ -type GaAs layer 4 ^- / n ⁺ GaAs
It is an epi substrate (hereinafter referred to as a substrate). As shown in FIG. 1, as a Schottky electrode 1, a laminated film of titanium and aluminum (Ti / Al film) having a film thickness of 3 μm is formed on a substrate 6. On the back surface of the substrate 6, the ohmic electrode 5 made of gold germanium nickel-gold (AuGeNi / Au) is formed. In the method of manufacturing the semiconductor device according to the present embodiment, the Schottky electrode 1 is used as a mask and the dose of boron is 5 × 10 ¹³ c.
After implanting under the condition of m ⁻² and acceleration voltage of 100 kV, a high resistance region 2 is formed on the substrate 6 around the Schottky electrode 1 to a depth of at least 100 nm or more from the surface by a defect caused by the impact, and then heat treatment is performed at 500 ° C. I do. By this heat treatment, extra defects such as recombination centers causing a leak current in the high resistance region 2 are eliminated. However, at this temperature, the defects contributing to carrier compensation do not disappear, so that the high resistance region 2 remains high in resistance. The high resistance region 2 covers the exposed part of the Schottky junction 3a. In such a structure, when a high voltage is applied, the electric field is
Are distributed at regular intervals along the Schottky electrode 1 at equal intervals. As a result, the electric field concentration is alleviated, so that the substrate 6
Is less likely to cause ionization breakdown. Therefore, the element having this structure exhibits good withstand voltage characteristics.

FIG. 2 is a diagram showing the temperature dependence of the leakage current when a semiconductor device according to an embodiment of the present invention is reverse biased. White circles show the characteristics immediately after ion implantation, and black circles show the characteristics after heat treatment at 500.degree. Shown respectively. As shown in FIG. 2, the effect of heat treatment appears in the region of -40 ° C or higher. At room temperature, this heat treatment reduces the leak current by an order of magnitude or more.

FIG. 3 is a diagram showing the dose dependency of the breakdown voltage of the semiconductor device according to one embodiment of the present invention. The white circles show the characteristics immediately after ion implantation, and the black circles show the characteristics after heat treatment at 500.degree. As shown in Fig. 3, the breakdown voltage improves as the dose increases, but the effect of heat treatment is remarkable especially for devices with a dose of 5X10 ¹³ cm ^-2 or higher, and the ideal breakdown voltage of semiconductor materials of 390V Showing.

In this embodiment, the dose amount is 5 × 10 ¹³ cm ^-2 ,
Although a heat treatment temperature of 500 ° C is adopted, it is an injection amount greater than the dose determined by the substrate concentration of the semiconductor device, and defects that contribute to leakage current disappear and defects that contribute to carrier compensation remain 300 ° C. The same effect can be obtained if the heat treatment is performed at 600 ° C or lower.

Needless to say, the present invention can be applied to improve the breakdown voltage of the pn junction, that is, the breakdown voltage between the base and collector of the bipolar transistor.

[0013]

As described above, according to the present invention, at least the depth is formed in the low concentration region around the Schottky junction or the pn junction.
An excellent semiconductor device having a maximum breakdown voltage determined by a semiconductor material can be realized by a structure in which a high resistance region of 100 nm or more is formed by performing an ion implantation method and subsequent heat treatment. By using such an element, it is possible to easily realize a high-speed Schottky barrier diode for power, a hetero-bipolar transistor, or the like with little variation and a simple manufacturing method.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing temperature dependence of a leak current when a semiconductor device according to an embodiment of the present invention is reverse biased.

FIG. 3 is a diagram showing the dose dependency of the breakdown voltage of the same semiconductor device.

[Explanation of symbols]

3 n ^- type GaAs layer (low concentration region) 3a Schottky junction (junction)

Continuation of front page (51) Int.Cl. ⁵ Identification number Office reference number FI Technical indication location H01L 29/73 29/91 7377-4M H01L 29/72 8225-4M 29/91 D

Claims (1)

[Claims] 1. A low concentration region around a junction such as a pn junction or a Schottky junction formed on or near the surface of a semiconductor device is ion-implanted at a dose of 5 × 10 ¹³ cm ^-2 or more, and then 300 ° C. or more. A method for manufacturing a semiconductor device, which comprises performing heat treatment at 600 ° C. or lower.