JPH05199237A - Multiple transmitter - Google Patents

Abstract

PURPOSE:To improve a bit rate by transmitting bits in an arbitration area (ABD) in a low bit period so that collation can be executed without fail, and transmitting bits behind the ABD in a high bit period since respective frames do not compete with each other. CONSTITUTION:After a data frame(DF) is outputted from a CPU 10 to a transmitting data buffer 12, a bit counter 14 is cleared. Synchronously to this operation, the frequency of a clock signal outputted from a frequency divider 22 is set to the low bit period. Next, when the output signal of a carrier sense circuit 26 shows that no DF exists on a transmission line, the DF is outputted from the buffer 12 through the counter 14 to a transmission format transformation circuit 16 according to the request of the circuit 16. At such a time, the number of bits in data outputted from the counter 14 is counted, the signal wave of the transmission line is generated by the circuit 16 and outputted to a driver 18, and the signal wave is transmitted from the driver 18 to the transmission line. On the other hand, data are outputted from a reception format transformation circuit 34 through a bit number counter 32 to a received data buffer 30, a control signal is outputted to a CLK frequency divider 28 when the count value is turned to 8, and the output clock is set in the high bit period.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention improves the average bit rate in a CSMA / CD (Carrier Sense Multiple Access / Collision Detection) transmission system with nondestructive arbitration for baseband data transmission. Regarding the device.

[0002]

2. Description of the Related Art Conventionally, C is used as a baseband data transmission system.
The SMA / CD transmission method is known. With this method,
This is a method in which a large number of terminal devices are connected to a single transmission path, and data is transmitted between the terminal devices in a data frame. In this method, each terminal transmits data to the transmission line after confirming that there is no data frame on the transmission line so that the data frames do not collide on the transmission line.

However, in reality, after one terminal detects that the transmission line is in an idle state and outputs a data frame to the driver, the data frame is decoded through the receiver of another terminal. There is a transmission delay time. Therefore, in the other terminal, it is determined that the transmission path is in the idle state until the delay time, and therefore there is a possibility that the data frame is transmitted from the terminal until the delay time. Thus, even if the data frame is transmitted after detecting the idle state of the transmission path, the collision of the data frame may occur on the transmission path.

Therefore, it is necessary to monitor that no data frame collision has occurred on the transmission path. For this purpose, the transmitting terminal simultaneously receives the data from the transmission line while transmitting the data and compares the binary states of the transmitted bit and the received bit. If the transmission bit and the reception bit have different binary states, the data frame transmitted by the own terminal collides with the data frame transmitted by another terminal, and the data frame is assumed to have a lower priority than the data frame. I am trying to stop the transmission of.

By the way, the above-mentioned CSMA with nondestructive arbitration
The / CD transmission method is different from the normal CSMA / CD transmission method, and when the binary states of different bits overlap in the transmission path, the driver and the transmission path are configured to take one of the binary states. .. For example, in a transmission system, the driver is composed of PNP transistors and the emitter is +
A system in which the open collector is connected to a transmission line by connecting to a 5V power source and the transmission line is grounded (pulled down) via a resistor is used. In this system, when the transistor of the driver of any one terminal is turned on and the collector terminal becomes the power supply voltage of + 5V, the transmission line becomes the power supply voltage level of + 5V regardless of the state of the transistor of the driver of the other terminal. .. Therefore, in order for the transmission path to reach the 0V state, it is necessary that the transistors of the drivers of all terminals are in the off state (power supply unconnected state). In other words,
When the bit in the 0V state and the bit in the + 5V state collide with each other, the transmission path is controlled by the + 5V state. This is +
A data frame having bits in the 5V state means that the data is not destroyed by the collision, and a data frame having bits in the 0V state means that the data has been destroyed by the collision. Thus, +5 on the transmission line
The V level becomes the dominant level and the 0V level becomes the inferior level, and the level of the transmission path is controlled by the dominant level.

Therefore, if the terminal in which the data corruption is detected is made to stop the transmission of the data frame within the 1 bit in which the corruption is detected, the subsequent bits do not collide with the data frame, and other Non-destructive data frames will not cause any problems even if transmission is continued. The CSMA / CD transmission method with non-destructive arbitration is a method that utilizes this to allow only one data frame to survive and transmit that data frame even if a plurality of data frames collide. .. In order to keep this data frame alive, an arbitration area is provided by a predetermined bit length from the beginning of the data frame. Each bit of the arbitration area is sequentially contended from the upper digit as described above, and the transmission of the frame in which the bit level is changed is immediately stopped to finally set 1
Only one data frame can survive. For example, in the above example, as the + 5V state continues in the arbitration area in order from the upper bit, the priority becomes higher, and the higher the priority of the data frame is,
You can survive a collision.

[0007]

However, due to the existence of the propagation delay time of the driver, the receiver, and the transmission line of the transmission device, at the comparison position of the transmission bit and the reception bit,
It is unlikely that a plurality of data frames will collide with each other at the beginning (edge of the leading bit) of each data frame being completely overlapped at the same timing, and generally, 1 from the leading edge of the data frame being transmitted. Overlapping within a predetermined maximum propagation delay time within bits. Therefore, in order to enable the CSMA / CD transmission method with nondestructive arbitration even in such a case, it is assumed that two arbitration areas having the same bit configuration in which “0” and “1” are mixed are set to the above-mentioned maximum. Even when overlapping with a time difference equal to or less than the propagation delay time, each transmitted bit and each received bit must match. That is, if two data frames have the same priority, it is necessary that the two frames live together.

However, when two arbitration regions having the same bit structure are overlapped with a time difference of less than the maximum delay time, in the above example, 0 of each bit is used.
Since the V state period and the +5 V state period are overlapped with each other with a shift, the arbitration region is corrected such that the width of the dominant level +5 V period becomes longer. As a result, it is determined that the signal level at the bit detection timing is inverted with respect to the original bit level in the arbitration area, and the transmitted bit and the received bit are different. Therefore, the transmission of the data frame is immediately stopped and the CSMA / CD transmission method with non-destructive arbitration, in which the data frame having a high priority is kept alive, cannot be established.

Therefore, even if the arbitration areas having the same bit structure are superposed with a time difference equal to or less than the maximum delay time, in order for the transmission bit and the reception bit to coincide with each other, it is necessary to exceed the bit detection tamming. It is necessary that the level of is not modified. That is, unless the 1-bit period is set sufficiently longer than the maximum delay time,
The CSMA / CD transmission method with nondestructive arbitration has a problem that it cannot be achieved, and the bit rate of data transmission cannot be increased. The present invention has been made to solve the above problems, and an object thereof is to improve an average bit rate in a CSMA / CD transmission system with nondestructive arbitration.

[0010]

According to the configuration of the invention for solving the above-mentioned problems, when data frames transmitted from a plurality of transmission devices are overlapped with each other, a signal is generated when two different binary states are overlapped. After confirming that there is no data frame transmitted from another transmission device on the transmission line connected to the transmission line of the baseband transmission system configured to take one of the binary states, The data frame of the data frame is transmitted to the transmission line, the data on the transmission line is received together with the transmission, and the transmission bit and the reception bit of the data frame are compared in the arbitration area that is taken a predetermined bit length from the beginning of the data frame , If the bits match, the data frame transmission continues, while if the unmatched bits are detected, the data frame transmission stops immediately. In the multiplex transmission apparatus that,
The delay time that can exist when comparing the transmitted bit and the received bit, measured from the beginning of its own data frame, and the beginning of the data frame transmitted from another transmission device after transmission of its own data frame Even if the arbitrations of the same structure are superimposed by giving a time difference in the delay time in which the arbitrations may be detected, the arbitration can be detected without error. This is to provide a bit period setting means for making the 1-bit period in the region longer than the 1-bit period after the arbitration region.

[0011]

When transmitting a data frame in a multiplex transmission device of one terminal, it is first determined whether or not there is a data frame on the transmission line. When there is no data frame on the transmission path, the data frame is transmitted for the first time. Along with the transmission of this data frame, the reception of the data frame on the transmission path is performed, and the transmission bit and the reception bit match for a predetermined number of bits from the leading edge of the data frame, that is, for each bit of the arbitration region. Is determined. The leading edge of the data frame transmitted from the multiplex transmission device of another terminal may be received from the transmission line within the predetermined delay time τ with respect to the timing of transmitting the leading edge of the data frame to the transmission line. There is.

That is, there is a possibility of collision at the connection point between the multiplex transmission device for transmitting the data frame and the transmission line. This delay time τ is detected between the two multiplex transmission devices having the longest propagation delay time of the transmission path, after one of the multiplex transmission devices transmits a data frame to the transmission line, and the other multiplex transmission device detects the data frame. Until the connection point between the original multiplex transmission device and the transmission line after the multiplex transmission device of the other terminal transmits the data frame is determined. If the transmission path is very short and the propagation delay time of the transmission path can be ignored,
It is the sum of the driver delay time and the receiver delay time.

There is a possibility that two arbitration regions will overlap with each other with a time difference of the delay time τ. At this time, if the signals in the same bit state are shifted by the time difference of the delay time τ and superimposed, the dominant level (+ 5V in the above example) is obtained.
State) becomes longer by the delay time τ.

However, even when the arbitration areas having the same structure are superposed with a time difference of the delay time τ, the cycle of each bit of the arbitration area can be detected so that the detection of each bit can be detected without error. T is set to be long. The timing to detect the status of each bit is
If it is detected at the timing of n / m (n <m) of one cycle of each bit, it is the timing when T × n / m time has elapsed from the beginning of each bit. Therefore, the cycle T of each bit
Is increased by ΔT, the bit detection timing is also ΔT ×
Delay by n / m. Therefore, if the period of each bit in the arbitration region is lengthened so that ΔT × n / m> τ is satisfied, the arbitration regions of the same structure are superimposed with a time difference of delay time τ. However, it is not determined that the transmitted bit and the received bit do not match.

Therefore, when the data frames collide with each other, the transmission of the data frame having the arbitration area having the higher priority is continued. On the other hand, in a data frame having an arbitration area with a low priority, there is a bit in which the transmission bit and the reception bit do not match in the arbitration area, and the transmission is stopped within 1 bit after the mismatch is detected. Data frames with high priority will continue to survive.

When the transmission of the arbitration area is completed, only one data frame having the highest priority among the competing frames remains in the transmission path, so that the bits below the arbitration area are transmitted. In this case, it is not necessary to make a collision determination, and the cycle of each bit can be set short. As a result, the transmission bit rate can be increased on average.

[0017]

As described above, the present invention provides a multiplex transmission apparatus which transmits a data frame after confirming a free state of a transmission line, and transmits only one data frame having the highest priority when a data frame collides. The delay time that can exist when comparing the transmitted bit and the received bit, measured from the beginning of its own data frame, and the beginning of the data frame transmitted from another transmission device after transmission of its own data frame Even if the arbitration areas of the same configuration are superimposed with a time difference in the delay time in which the arbitration area can be detected, the bit configuration of the arbitration area can be detected without error. A bit period that makes the period of 1 bit in the bitration region longer than the period of 1 bit after the arbitration region It is characterized in that a constant means. Therefore, by setting the 1-bit period of the arbitration area to be long, only one data frame having the highest priority arbitration can be made to survive. Further, since the bit period after the arbitration area is set to be short, the average transmission bit rate of the CSMA / CD transmission system with nondestructive arbitration can be improved.

[0018]

EXAMPLES The present invention will be described below based on a specific example. The system in which the multiplex transmission device is used is a system in which a large number of multiplex transmission devices X1 to Xn are connected to one transmission line L, as shown in FIG. Each multiplex transmission device transmits its own data frame to the transmission line after confirming that there is no data frame on the transmission line L. The other terminals receive the data frame, and if the data frame is addressed to itself, take it in as input data.

Next, data transmission between the transmission device X1 and the transmission device X2 will be described. As shown in FIG. 3, the transmission devices X1 and X2 include CPUs 10a and 10b, communication devices 1a and 1b, drivers 18a and 18b, and receivers 36a and 36b, respectively.

A data frame is created under the control of the CPU 10a, and the data frame is bit-synchronized in the communication device 1a and output to the driver 18a.
After being amplified by 8a, it is output to the transmission line L. The data frame on the transmission path L is amplified by the receiver 36a, the data frame is decoded by the communication device 1a in bit synchronization, and the data is output to the CPU 10a.

The data frame is SO, as shown in FIG.
F (Start of Frame), ID, DATA, ECC, EOD, RS
It consists of P and EOF areas. The ID is an area containing a source address, a destination address, or both,
DATA is an area containing information to be transmitted. As shown in FIG. 6, the signal level of SOF is 4T / 3 for the bit period T.
Period, + 5V level (H level), 2T / 3 period, 0V
It is configured to have a level (L level). or,
As shown in FIG. 6, the binary state “0” of the bit is a signal which becomes 2T / 3 period, H level, T / 3 period, and L level, and “1” is T / 3 period. , H level, 2T / 3 period, L
This is a level signal. The bit detection timing is T / 2 timing from the beginning of the bit period.

As shown in FIG. 4A, "1",
When the 2-bit signal wave of "1" is output from the communication device 1a to the driver 18a, the signal wave output from the driver 18a is, as shown in FIG.
It is delayed by the propagation delay time τsa of a. Further, as shown in FIG. 4C, the signal wave reaches the receiver 36b of the transmission device X2 with a delay of the propagation delay time τ _L of the transmission line L. Further, the signal wave is input to the communication device 1b with a delay of the propagation delay time τrb of the receiver 36a, as shown in FIG. 4 (d). Then, the received data is passed to the CPU 10b.

On the other hand, the transmission device X2 until time t ₄ when shown in (d) of FIG. 4, since the judgment that there is no data frame to the transmission line L, and the transmission device X2 data frame until time t ₄ May send. If, as shown in (e) in FIG. 4, "1", "1" of the signal wave of 2 bits, the driver 36b from the communication device 1b at time t ₄
Then, the signal wave delayed by the propagation delay time τsb of the driver 36b is transmitted from the driver 36b to the transmission line L.
Are transmitted as shown in FIG. The signal wave is delayed by the propagation delay time τ _L of the transmission line L and reaches the receiver 36a of the transmission device X1 as shown in (g) of FIG. At the input point from the transmission line L of the receiver 36a, the signal wave shown in FIG. 4B and the signal wave shown in FIG. 4G are superimposed. When the + 5V signal level (predominant level) and the 0V level (inferior level) are superposed, the signal level becomes + 5V. Therefore, as shown in (h) of FIG.
This signal wave is τ = τ _L + τ compared to the transmission wave of (a)
rb + τsb + τ _L only, the dominant level of + 5V longer.
Further, this signal wave is delayed by the propagation delay time τra of the receiver 36a and input to the communication device 1a.

When two signal waves having the same bit structure are superposed as described above, CSMA / CD with nondestructive arbitration
In the transmission method, the transmitted bit and the received bit must match. If the bit detection timing of the received signal wave shown in (i) of FIG. 4 is set to T / 2 from the rising edge of the received signal wave, in order not to erroneously detect “1” as “0”, τ <
Must be T / 6. That is, if 6τ <T,
There is no erroneous determination of "1" as "0".

In the apparatus of this embodiment, a 1-bit cycle is set in the arbitration area, which is a bit area for surviving a high-priority frame when the data frames shown in FIG. Is set to be satisfied. Then, as shown in FIG. 7, in the area after the arbitration area, the bit cycle is set to a short cycle that does not satisfy the above equation. In the case where the aim of bit detection timing of the received signal wave from the rising edge of the transmission signal wave and the timing of T / 2 _{is, τrb + τsb + τ L +} τrb + τsb + τ L <T /
Must meet 6

Next, a specific configuration of the present apparatus will be described in which the bit period of the arbitration area is set long and the subsequent bit period is set short. As shown in FIG. 1, the communication device 1a is configured. CPU1
A transmission buffer 12 is connected to 0, and a signal wave on the transmission line corresponding to “0” and “1” is transmitted to the transmission data buffer 12 via the bit number counter 14 (as shown in FIG. 6). Is connected to the transmission format conversion circuit 16. Then, the transmission format conversion circuit 1
The output of 6 is connected to the driver 18. The bit number counter 14 is a counter that counts the number of bits in the arbitration area, and the output of the bit number counter 14 is input to the CLK frequency divider 22. The oscillator 20 is a circuit that outputs a clock signal having a reference cycle, and the clock signal is input to the transmission data buffer 12, the reception data buffer 30, the CLK frequency divider 22, and the CLK frequency divider 28.

On the other hand, the output of the receiver 36 is connected to the reception format conversion circuit 34 and the carrier sense circuit 26 for detecting whether or not a data frame exists on the transmission path. The reception data buffer 30 is connected to the reception format conversion circuit 34 via a bit number counter 32. The content of the reception data buffer 30 is the CPU 10
Read by. Also, the transmission format conversion circuit 1
6 and the output of the reception format conversion circuit 23 are input to the arbitration circuit 24, where the transmission bit and the reception bit are compared. When the levels of the transmission bit and the reception bit do not match, a transmission stop signal is immediately output to the transmission format conversion circuit 16.

On the other hand, the CLK frequency divider 22 inputs the signal for determining the arbitration area output from the bit number counter 14 and divides the clock signal into a large period during transmission of the arbitration area. After the arbitration region, the clock signal is divided into small cycles and output to the transmission format conversion circuit 16.
Similarly, the CLK frequency divider 28 inputs a signal for determining the arbitration area output from the bit number counter 32, divides the clock signal into a large period during reception of the arbitration area, and outputs the arbitration area. After the duration region, the clock signal is divided into small cycles and output to the reception format conversion circuit 34. As a result, in the arbitration area, even if there is a data collision,
The CSMA / CD transmission method with non-destructive arbitration is transmitted and received at a low bit period, and in other areas, it is transmitted and received at a high bit period.

Next, the operation of this apparatus will be described with reference to the flow charts shown in FIGS. A data frame is output from the CPU 10 to the transmission data buffer 12 (steps 100 and 102). Next, the transmission data buffer 12
Bit counter 14 in synchronization with the completion of data transfer to
Is cleared (step 104). Next, in synchronization with the completion of clearing the bit number counter 14, the CLK frequency divider 2
The frequency of the clock signal output by 2 is set to FslowHz. That is, the low bit period is set.

Next, when the output signal of the carrier sense circuit 26 indicates that the data frame does not exist on the transmission path (step 108), the transmission data buffer 12 passes through the bit number counter 14 at the request of the transmission format conversion circuit 16. And the data frame is output to the transmission format conversion circuit 16 (step 110). At this time, the number of bits of the data to be output is counted by the bit number counter 14 (step 112), a signal wave on the transmission path is generated by the transmission format conversion circuit 16, and the driver 1
The signal wave is output to 8 and the signal wave is transmitted from the driver 18 to the transmission path (step 114).

On the other hand, the reception is performed in parallel with this, and whether the transmission bit output from the transmission format conversion circuit 16 and the reception bit output from the reception format conversion circuit 34 are matched by the arbitration circuit 24. It is determined whether or not (step 116). Bit number counter 1 if the transmitted bit and the received bit match
It is determined whether the value of 4 has reached the number of bits of 8 in the arbitration area (step 118). The determination of the transmitted bit and the received bit is repeated until the number of bits reaches eight (steps 112 to 122).

If the number of bits is 8, it means that the arbitration area has been output to the end by surviving to the end without losing other competing data frames. Therefore, in this case, the frequency of the clock signal output from the CLK frequency divider 22 is set to FfastHz (step 120). That is, the high bit period is set.
Note that Ffast is set to twice as much as Fslow. Then, thereafter, the bits after the arbitration area are transmitted in a high bit period. The transmission procedure is executed until the transmission of the data frame is completed (step 112-).
122).

On the other hand, if the transmitted bit and the received bit do not match, it means that another data frame having a higher priority than the data frame currently being transmitted is present in the transmission path. ing. That is, it means that the frame being transmitted has lost in competition for arbitration. Therefore, the transmission procedure by the transmission format conversion circuit 16 is immediately stopped, and the procedure returns to the procedure for monitoring the data frame on the transmission path (steps 116 and 10).
4). Since the frame lost in the arbitration conflict is stopped within 1 bit, the frame which is lost in the subsequent bits is not compared. In this way, the frame that has survived the bit contention in the arbitration area to the end is the frame with the highest priority among the contention frames.

The reception procedure is performed as follows. When the data frame on the transmission path does not exist is detected by the carrier sense circuit 26 (step 200), the frequency F of the output clock signal CLK divider 28 ^'slowHz
Is set to. That is, the low bit period is set (step 202). Next, the bit number counter 32 is cleared (step 204), and the process waits until the SOF at the head of the data frame is detected (step 206). And
When the SOF is detected, the reception format conversion circuit 34 outputs data bit by bit to the reception data buffer 30 via the bit number counter 32 (step 20).
8) The bit number counter 32 counts the number of bits of the received data frame bit by bit (step 21).
0). Next, when the value counted by the bit number counter 32 reaches 8 (step 212), a control signal is output from the bit number counter 32 to the CLK frequency divider 28, and the CLK frequency divider 28 outputs the frequency of the clock signal output. F'fast Hz
(Step 214). That is, the high bit period is set.

In this way, the reception procedure is executed until the reception of one data frame is completed (steps 208 to 216). When the reception of one data frame is completed, the CPU 10 receives the received data buffer 30.
Is read (step 218).

As described above, the arbitration area is the CSM with nondestructive arbitration between the transmission bit and the reception bit.
The bits are transmitted at a low bit period so that the collation by the A / CD transmission method procedure can be executed without error, and the bits after the arbitration area are transmitted at a high bit period because there is no frame conflict. As a result, the bit period of one surviving data frame is as shown in FIG. Therefore, the average bit rate can be improved in the CSMA / CD transmission system with nondestructive arbitration.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a multiplex transmission device according to a specific embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of a system in which the present multiplex transmission device is used.

FIG. 3 is a block diagram showing a configuration of a system focusing on data transmission between two multiplex transmission devices.

FIG. 4 is a timing chart illustrating collision of data frames.

FIG. 5 is a block diagram showing the structure of a data frame.

FIG. 6 is a waveform diagram showing a signal waveform on a transmission path.

FIG. 7 is a waveform diagram showing a data frame having a modulated bit period.

FIG. 8 is a flowchart showing a data frame transmission procedure.

FIG. 9 is a flowchart showing a procedure for receiving a data frame.

[Explanation of symbols]

L ... Transmission lines X1, X2 ... Multiplex transmission device 12 ... Transmission data buffer 14 ... Bit number counter (bit period setting means) 16 ... Transmission format conversion circuit 18 ... Driver 22 ... CLK frequency divider (bit period setting means) 24 ... Arbitration circuit 26 ... Carrier sense circuit

Claims (1)

[Claims] 1. When the data frames transmitted from a plurality of transmission devices are overlapped, the signal level is set to one of the binary states with respect to the overlapping of two different binary states. It is connected to the transmission line of the baseband transmission method, and after confirming that there is no data frame transmitted from another transmission device in the transmission line, it transmits its own data frame to the transmission line, and transmits the data together with the transmission. Receives data on the road, compares the transmission bit of the data frame with the received bit in the arbitration area taken from the beginning of the data frame by a predetermined bit length, and transmits the data frame if each bit matches. On the other hand, on the other hand, the multiplex transmission device that stops transmission of the data frame immediately when a non-matching bit is detected. The delay time that may exist when comparing the transmission bit and the reception bit, measured from the beginning of the own data frame, and transmitted from another transmission device after the transmission of the own data frame. Even if the arbitration area of the same structure is superimposed by giving a time difference of the delay time that may detect the beginning of the data frame, the bit structure of the arbitration area can be detected without error. The multiplex transmission apparatus is provided with a bit period setting means for setting the period of 1 bit in the arbitration region to be longer than the period of 1 bit after the arbitration region.