JPH05252520A - Video signal encoding / decoding device - Google Patents

Abstract

(57) [Abstract] [Purpose] To obtain an encoding / decoding device capable of encoding / decoding a plurality of types of input signals. [Structure] For example, when an HDTV signal and four NTSC signals are input as an input signal, a means 3 for synchronizing four video signals is provided, and by synchronizing, they are regarded as one video signal, It can be encoded and decoded. Therefore, one encoding / decoding device can handle both HDTV signals and NTSC signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal coding / decoding device, and more particularly to a video signal coding / decoding device capable of coding / decoding a plurality of types of input signals.

[0002]

2. Description of the Related Art FIG. 6 is a schematic block diagram showing an example of a coding unit 100 of a conventional video signal coding / decoding device. In the figure, a luminance signal 601 (hereinafter referred to as "Y signal") input from an input terminal 1v is given to an AD converter 11a via a low pass filter 10a. The first color difference signal 602 input from the input terminal 1w (hereinafter,
The “Pb signal” is given to the AD converter 11b via the low-pass filter 10b, and the second color difference signal 603 (hereinafter, referred to as “Pr signal”) input from the input terminal 1x is It is given to the AD converter 11c via the low-pass filter 10c. AD converters 11a, 11b, 11
The outputs 607, 608, and 609 of c are given to the encoding circuit 5b, and the output 610 of the encoding circuit 5b is output from the output terminal 2v as an encoded video signal.

FIG. 7 is a schematic block diagram showing an example of a decoding unit 200 of a conventional video signal coding / decoding device.
In the figure, the encoded video signal 701 input from the input terminal 1y is supplied to the decoding circuit 6b. The Y signal 702 and the Pb signal 70 output from the decoding circuit 6b
3, Pr signal 704 is applied to DA converters 12a and 1a, respectively.
2b, 12c. DA converters 12a, 12
Outputs 705, 706 and 707 of b and 12c are output Y signal 708, output Pb signal 709 and output Pr signal 7 through low pass filters 10d, 10e and 10f, respectively.
10 is output from the output terminals 2w, 2x, 2y.

Next, the operation will be described. Encoding unit 10
At 0, the analog Y signals, Pb signals, and Pr signals input from the input terminals 1v, 1w, and 1x are band-limited by the low-pass filters 10a, 10b, and 10c, respectively, and then the AD converter 11a, It is digitized by 11b and 11c. Low pass filters 10a, 10b,
10c pass band and AD converters 11a, 11b, 1
The sampling frequency of 1c varies depending on the purpose of use of the encoding / decoding device. For example, in the case of an HDTV signal, it becomes as shown in Table 1 or Table 2, for example.

[0005]

[Table 1]

[0006]

[Table 2]

The digital signal thus obtained is, for example, DCT (Discret) in the encoding circuit 5a.
e Cosine Transform), Huffman coding, or the like.

In the decoding section 200, the coded video signal is decoded again into the format shown in Table 1 or Table 2. The Y signal, Pb signal, and Pr signal of the digital signal thus obtained are passed through the DA converters 12a, 12b, 12c and the low-pass filters 10a, 10b, 10c, and the Y signal, Pb signal, Pr signal of analog signals. Is output as.
Generally, low pass filters 10a, 10b, 10c
And the operating frequencies of the DA converters 12a, 12b, 12c are equal to those of the encoding unit 100.

[0009]

The conventional video signal coding / decoding apparatus is configured as described above, and is generally intended for one type of signal. For example, HDT
The V signal encoding / decoding device only encodes / decodes HDTV signals, and is not configured to encode / decode NTSC signals.

The present invention has been made to solve the above problems, and an object thereof is to obtain an encoding / decoding device capable of encoding / decoding a plurality of types of input signals.

[0011]

A video signal coding / decoding apparatus according to the present invention is such that a plurality of video signals are regarded as one video signal by synchronizing and are coded / decoded. is there.

[0012]

The video signal encoding / decoding apparatus according to the present invention synchronizes a plurality of types of input signals, and therefore can encode / decode as one video signal.

[0013]

EXAMPLES Example 1. An embodiment of the present invention will be described below. FIG. 1 is a schematic block diagram of an encoding unit 100 according to an embodiment of the present invention. In the figure, the Y signal 101 of the HDTV signal input from the input terminal 1a is the first input of the input selection circuit 4a, and the Pb signal 102 of the HDTV signal input from the input terminal 1b is the input selection circuit 4a.
HDT input from the input terminal 1c to the first input of b
The Pr signal 103 of the V signal is given to the first input of the input selection circuit 4c.

The first NTS input from the input terminal 1d
The Y signal 104 of the C signal is input to the first input of the input multiplex circuit 3a, the Y signal 105 of the second NTSC signal input from the input terminal 1e is input to the second input of the input multiplex circuit 3a, and the input terminal 1f is input. Y signal 1 of the third NTSC signal input
06 is the third input of the input multiplex circuit 3a, and the input terminal 1g
The Y signal 107 of the fourth NTSC signal input from is supplied to the fourth input of the input multiplexing circuit 3a.

The first NTS input from the input terminal 1h
The Pb signal 108 of the C signal is input to the first input of the input multiplex circuit 3b, and the Pb signal 109 of the second NTSC signal input from the input terminal 1i is input to the second input of the input multiplex circuit 3b.
Pb of the third NTSC signal input from the input terminal 1j
The signal 110 is the Pb signal 1 of the fourth NTSC signal input from the input terminal 1k to the third input of the input multiplexing circuit 3b.
11 is given to the fourth input of the input multiplexing circuit 3b.

The first NTS input from the input terminal 1l
The Pr signal 112 of the C signal is input to the first input of the input multiplexing circuit 3c, and the Pr signal 113 of the second NTSC signal input from the input terminal 1m is input to the second input of the input multiplexing circuit 3c.
Pr of the third NTSC signal input from the input terminal 1n
The signal 114 is the Pr signal 1 of the fourth NTSC signal input from the input terminal 1o to the third input of the input multiplexing circuit 3c.
15 is given to the fourth input of the input multiplexing circuit 3c.

The output 116 of the input multiplex circuit 3a is connected to the second input of the input selection circuit 4a and the output 11 of the input multiplex circuit 3b.
7 is an input multiplex circuit 3 for the second input of the input selection circuit 4b.
The output 118 of c is provided to the second input of the input selection circuit 4c. The output 119 of the input selection circuit 4a, the output 120 of the input selection circuit 4b, and the output 121 of the input selection circuit 4c are given to the coding circuit 5a, and the output 122 of the coding circuit 5a.
Is output as an encoded video signal from the output terminal 2a.

FIG. 2 shows the decoding unit 20 in the first embodiment.
It is a schematic block diagram of 0. In the figure, input terminal 1p
The encoded video signal 201 input from is supplied to the decoding circuit 6a. Y which is the output of the decoding circuit 6a
The signal 202, the Pb signal 203, and the Pr signal 204 are the Y signal of the HDTV signal, the Pb signal of the HDTV signal,
Output terminals 2b, 2c, 2 as Pr signals of HDTV signals
and output separation circuits 7a, 7b,
7c is input.

The first output 205 of the output separation circuit 7a is the Y signal of the first NTSC signal, the second output 206 is the Y signal of the second NTSC signal, and the third output 207.
Is the fourth output 20 as the Y signal of the third NTSC signal.
8 is an output terminal 2 as a Y signal of the fourth NTSC signal.
e, 2f, 2g, and 2h, respectively. The first output 209 of the output separation circuit 7b is the Pb signal of the first NTSC signal, the second output 210 is the Pb signal of the second NTSC signal, and the third output 211 is the third NTS.
As the Pb signal of the C signal, the fourth output 212 is the fourth N
As the Pb signal of the TSC signal, output terminals 2i, 2j, 2
It is output from k and 2l, respectively. The first output 213 of the output separation circuit 7c is the Pr signal of the first NTSC signal, the second output 214 is the Pr signal of the second NTSC signal, and the third output 215 is the Pr signal of the third NTSC signal.
As a signal, the fourth output 216 is output from the output terminals 2m, 2n, 2o and 2p as a Pr signal of the fourth NTSC signal.

FIG. 3 is a schematic block diagram of the input multiplex circuit 3 in the first embodiment. In the figure, input terminal 1
Signals 301, 30 input from q, 1r, 1s, 1t
2, 303, 304 are memory circuits 8a, 8b, 8c,
It is given to the input switching circuit 9 via 8d. The output 309 of the input switching circuit 9 is output from the output terminal 2q.

FIG. 4 is a schematic block diagram of the output separation circuit 7 in the first embodiment. In the figure, input terminal 1u
The signal 401 inputted from the memory circuit 8e, 8f, 8
g, 8h. Memory circuits 8e, 8f, 8g,
The outputs 402, 403, 404, 405 of 8h are output from the output terminals 2r, 2s, 2t, 2u.

Next, the operation will be described. This embodiment shows a coding / decoding device capable of coding / decoding both an HDTV signal and an NTSC signal. That is, the coding / decoding apparatus in this embodiment can code / decode an HDTV signal or an NTSC signal with a maximum of four inputs.

The encoder 100 operates as follows. From the input terminals 1a, 1b, 1c, Y signal of HDTV signal, P
The b signal and the Pr signal are input. In addition, the input terminal 1d,
The first NTSC signal from 1h and 1l is input terminal 1e,
The second NTSC signal from 1i, 1m is input terminal 1f,
The third NTSC signal from 1j and 1n is input terminal 1g,
The fourth NTSC signals from 1k and 1o are input respectively. The number of effective samples and the number of effective lines per frame of the input HDTV signal are shown in FIG. 5A, and the number of effective samples and the number of effective lines per frame of the input NTSC signal are shown in FIG. 5B. ..

The input multiplex circuit 3 generates a signal as shown in FIG. 5C from four types of signals having the format as shown in FIG. 5B. In FIG. 5C, the total number of samples and the number of lines are the same as those in FIG. 5A, and four NTs are displayed on the screen of the HDTV signal.
The SC signals are lined up. The signal of FIG. 5A and the signal of FIG. 5C are given to the input selection circuit 4, and when the HDTV signal is coded in the input selection circuit 4, FIG.
When the NTSC signal is encoded, the signal of (a) is selected and transmitted to the encoding circuit 5a.
The signal of FIG. 5 (a) and the signal of FIG. 5 (c) have an equivalent format. Since each NTSC signal in the signal of FIG. 5 (c) is independent as a video signal, the encoding circuit 5a is 5
The signal of (a) and the signal of FIG. 5 (c) can be encoded without making a distinction.

For example, four NTSC signals are shown in FIG.
It is obvious that the coding methods that can be used equivalently are limited when the arrangements are performed as shown in (d). Motion compensation processing etc. cannot be applied as they are. The signal thus obtained is encoded by the encoding circuit 5a and output.

The decoding section 200 operates as follows. The coded video signal input from the input terminal 1p is decoded by the decoding circuit 6a, and is again shown in FIG.
It is returned to the format of (c). The encoded video signal is HD
If the signal is a TV signal, that is, the signal shown in FIG. 5A, it is directly output as an HDTV signal from the output terminals 2b, 2c and 2d. If the coded video signal is an NTSC signal, that is, the signal of FIG. 5C, the output separation circuit of FIG.
4 NTS from output terminals 2e-2p
It is output as a C signal.

Input Multiplexing Circuit 3 in Encoding Unit 100
Is configured as shown in FIG. 3, for example, and operates as follows. The four types of input signals are respectively stored in the memory circuits 8a-8
given to d. The four types of input signals are asynchronous signals, and when each signal is output from the four memory circuits 8a to 8d, they are synchronized and output according to the position shown in FIG. 5C. Further, the thinning of the input video signal, which is performed because the four input signals are asynchronous, can be performed in frame units to maintain processing equivalence.

Output separation circuit 7 in decoding section 200
Is configured as shown in FIG. 4, for example, and operates as follows. The signal obtained by multiplexing the four types of signals is given to the four memory circuits 8e to 8h. Each memory circuit 8e-8h
Selects one of the four NTSC signals multiplexed in the signal of FIG. 5C, converts it into the NTSC signal format, and outputs it.

Example 2. In addition, the above-mentioned Example 1 is NTS.
Although the method of arranging C signals so as to be independent as video signals on the screen has been described above, the present invention is not limited to this.
For example, it is possible that the encoding method can be shared even if the multiplexing is performed as shown in FIG. The present invention is particularly characterized in that a plurality of input signals are regarded as one signal by synchronizing them.

Example 3. Further, in the above-described first embodiment, HD
The method of selecting either the TV signal or the four NTSC signals to encode and decode has been described, but the method is not limited to this. For example, the number of NTSC signals may be two, four, or six. It can be set arbitrarily. It depends on the sampling frequency.

Example 4. In addition, the above-mentioned first embodiment is
Although both the V signal and the NTSC signal have been described in particular, the present invention is not limited to this and can be applied to all other signals. In the first embodiment, the Y signal, the Pb signal, and the Pr signal are mentioned as input signals, but the present invention is not limited to this. , G signal,
B signal and R signal may be used.

[0032]

As described above, according to the present invention, since a plurality of video signals are synchronized and encoded and decoded as one video signal, a plurality of types of input signals are coded. There is an effect that a coding / decoding device capable of decoding can be obtained.

[Brief description of drawings]

FIG. 1 is a schematic block circuit diagram of an encoding unit according to an embodiment of the present invention.

FIG. 2 is a schematic block circuit diagram of a decoding unit in an embodiment of the present invention.

FIG. 3 is a schematic block circuit diagram of an input multiplexing circuit according to an embodiment of the present invention.

FIG. 4 is a schematic block circuit diagram of an output separation circuit according to an embodiment of the present invention.

FIG. 5 is a diagram showing a format of a video signal in one embodiment of the present invention.

FIG. 6 is a schematic block circuit diagram showing an example of an encoding unit of a conventional video signal encoding / decoding device.

FIG. 7 is a schematic block circuit diagram showing an example of a decoding unit of a conventional video signal encoding / decoding device.

[Explanation of symbols]

 1 Input Terminal 2 Output Terminal 3 Input Multiplexing Circuit 4 Input Selection Circuit 5 Encoding Circuit 6 Decoding Circuit 7 Output Separation Circuit 8 Memory Circuit 9 Input Switching Circuit 10 Low Pass Filter 11 AD Converter 12 DA Converter 100 Encoding Unit 200 Decoding unit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04N 7/13 Z 11/04 Z 9187-5C

Claims (5)

[Claims] 1. A video signal coding / decoding device for coding or decoding a video signal, wherein a means for synchronizing a plurality of input video signals and a plurality of the synchronized video signals are provided. A video signal coding / decoding device comprising means for coding or decoding as one video signal. 2. A video signal encoding / decoding device having a first video signal and one or more second video signals as an input signal and an output signal, wherein the one or more second video signals. An input multiplex circuit for converting the first video signal into the format of the first video signal in synchronization with each other, an input selection circuit for receiving one of the outputs of the first video signal and the input multiplex circuit, and outputting either one of the above. The video signal coding / decoding apparatus according to claim 1, further comprising a coding circuit that codes an output signal of the input selection circuit. 3. A video signal encoding / decoding device having a first video signal and one or more second video signals as an input signal and an output signal, wherein the encoded video signal is decoded. A decoding circuit for outputting as a first video signal, and an output separation circuit for converting the output of the decoding circuit as an input signal into one or more second video signal formats and outputting the converted signal. The video signal encoding / decoding device according to claim 1. 4. The first video signal is an HDTV signal,
The video signal coding / decoding apparatus according to claim 2, wherein the second video signal is an NTSC signal. 5. The first video signal is an HDTV signal,
The video signal encoding / decoding apparatus according to claim 3, wherein the second video signal is an NTSC signal.