JPH05267491A - Pressure contact type semiconductor device and power converter using the same - Google Patents

Abstract

(57) [Abstract] [Purpose] To obtain a small-sized, large-capacity pressure contact type semiconductor device which is excellent in various characteristics even with a low pressure and has high reliability, and a power conversion device using the same. [Structure] Thermal buffer plates 4, 6 and 7, 5 are provided so as to contact the Al electrodes 3 on both main surfaces of the Si semiconductor 1, and between the thermal buffer plates 4, 6 and between the thermal buffer plates 7, 5. The soft layers 8 and 9 made of a soft metal belonging to the IB group are provided and configured between them. The heat buffer plate and the soft layer are pressed by the electrode lead-out members 10 and 11 that press-contact them with the Al electrode 3. [Effect] Even when the pressure applied to the pressure contact type semiconductor device is reduced, the thermal resistance can be reduced, and the breaking resistance, the thermal cycle resistance, and the size of the device can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pressure contact type semiconductor device and a power converter using the pressure contact type semiconductor device, and in particular, it is used as a highly reliable power semiconductor device having various characteristics even under a low pressure. The present invention relates to a suitable pressure contact type semiconductor device and a power conversion device using the same.

[0002]

2. Description of the Related Art A pressure contact type semiconductor device according to the prior art includes a semiconductor element formed on a Si substrate as a semiconductor substrate,
A heat buffer plate such as Mo or W and an electrode lead-out member made of Cu or the like are overlapped and pressed against each other, and a Si substrate and a heat buffer plate such as Mo or W, or a heat buffer plate and Cu or the like. The structure has a structure in which thermal stress generated due to the difference between the electrode lead-out member made of and the thermal expansion coefficient between different kinds of metals can be released by these slips.

However, this conventional technique has a problem that the contact resistance becomes large unless a large pressure is applied to the interface between these members, and as a result, the thermal resistance of the semiconductor device becomes large. .

As a conventional technique capable of relieving such thermal stress, for example, the technique described in Japanese Patent Application No. 59-21033 is known.

In this prior art, as a means for relieving thermal stress, the thermal expansion coefficient is the same as that of the thermal buffer plate between the thermal buffer plate such as Mo and W and the electrode lead-out member such as Cu. Then, on the Cu side, a thermal buffer plate having the same coefficient of thermal expansion as Cu is inserted. However, although this prior art can avoid the occurrence of thermal stress to some extent, it is unavoidable that the contact resistance increases unless the pressing force is increased significantly.

In this prior art, when the applied pressure is increased, the adhesion (sticking) that occurs between the interface between these members, particularly between the Al electrode on the Si semiconductor main surface and the thermal buffer plate such as Mo or W (sticking). ) Is not considered.

As a conventional technique capable of reducing the contact resistance, for example, Japanese Utility Model Laid-Open No. 50-54974,
The technique described in Japanese Utility Model Laid-Open No. 50-120372 is known.

In this prior art, the Al electrode on the opposite side of the Si semiconductor bonded to the thermal buffer plate of Mo, W, etc. and Mo, W
In a semiconductor device using a Si semiconductor in which a soft metal is interposed between a heat buffer plate such as H.C. or the like, or similarly, one of the main electrodes is bonded to the heat buffer plate such as Mo or W, a semiconductor device is used. A metal foil is used at the interface of each member to be formed.

However, the above-mentioned prior art is an alloy type semiconductor device, and even if a soft metal is sandwiched at the interface due to its large warpage, the contact resistance cannot be sufficiently reduced and the contact resistance is reduced. In order to reduce the resistance, a large pressing force is required, which may cause sticking between each member and the soft metal, which may cause cracking of the semiconductor Si, melting of the soft metal due to current concentration, deterioration of withstand voltage, and the like. It is a thing.

FIG. 10 is a cross-sectional view showing an example of the above-mentioned alloy type semiconductor device according to the prior art, which is an example of a gate turn-off thyristor. In FIG. 10, 1 is Si
Semiconductor, 2 is Al solder, 3 is Al electrode, 4 and 5 are thermal buffer plates, and 10 and 11 are electrode lead-out members.

In the illustrated prior art, the Si semiconductor 1 and the thermal buffer plate 5 are heated to a high temperature (about 700 ° C.) and adhered by the Al solder 2, and the thermal buffer plate 4 is attached to the Al electrode 3 side of the Si semiconductor 1. Is placed, and electrode lead-out members 6 and 7 are arranged above and below them, and they are tightened via the electrode lead-out members 6 and 7. Therefore, the semiconductor member in which the Si semiconductor 1 and the thermal buffer plate 5 are bonded by the Al solder 2 is warped due to the thermal stress generated based on the difference in the thermal expansion coefficients thereof.

In the above-mentioned prior art, the electrode lead-out members 10, 11 are used.
It is intended to eliminate the warp of the member by tightening through and to make the whole function as a semiconductor device.
To obtain good device characteristics, for example, a diameter of 60
mm element, at least 3500 Kg, diameter 80
In the case of a mm element, it is necessary to tighten with a pressure of 4000 kg.

[0013]

A large-capacity thyristor,
In a high power semiconductor device such as a gate turn-off thyristor, it is an extremely important task to reduce the pressure applied during its use and to improve various characteristics in that state.

However, in the semiconductor device according to the above-mentioned conventional technique, in order to improve the characteristics such as the breaking resistance, the overcurrent resistance, and the thermal resistance, the pressing force must be considerably increased,
For this reason, when the semiconductor element is a gate turn-off thyristor or the like, the gate and cathode are short-circuited by the deformation of the Al electrode, the electrode lead-out member of Cu is deformed, and each member, particularly the stick of the cathode Al electrode and the thermal buffer member Si
There is a problem that the semiconductor is cracked and the reliability is lowered.

Further, in the above-mentioned conventional technique, a system including these semiconductor elements is enlarged in order to increase the pressing force,
On the other hand, there is a problem that the reduction of the pressing force leads to the deterioration of the characteristics.

An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a pressure contact type semiconductor device which is excellent in various characteristics even at a low pressurizing force and has high reliability, and a power conversion device using the same. Especially.

[0017]

In order to reduce the contact resistance by the soft layer without increasing the pressing force, the conventional alloy type semiconductor element, that is, one side of the main surface of the Si semiconductor is required. The semiconductor element based on the one to which the heat buffer plate is bonded cannot be used because of its large warpage. For this reason, the present invention uses a full pressure contact type semiconductor element rather than an alloy type semiconductor element.

According to the present invention, the above-mentioned object is M
Full pressure contact type S that is not alloy-bonded to heat buffer plates such as o and W
This is achieved by using an i semiconductor, sandwiching both main surfaces with a heat buffer plate and an electrode lead-out member, and providing a soft layer between them.

That is, the object of the present invention is to prevent warpage and deformation of each member by adopting a pressure contact type structure, and further to reduce the contact resistance at the interface of each member in the state of low pressing force. , Two heat buffer plates are provided on the main surface side of each electrode of the Si semiconductor, and a soft layer formed of a metal of Group IB of the periodic table is provided between the two heat buffer plates. ..

By providing two heat buffer plates on each main surface side of the Si semiconductor, even if the Al electrode on the main surface of the Si semiconductor and the heat buffer plate are staked, Si will not be cracked. The thermal resistance at the interface between the heat buffer plates can be reduced by the soft metal.

Further, the object of the present invention is to further reduce the number of heat buffer plates from the above-mentioned two to one for each main surface, and to combine this with a soft metal layer, thereby further providing a heat buffer plate. It is achieved by directly providing a soft layer on the surface of the plate by plating, vapor deposition, or the like.

[0022]

In the full pressure contact type semiconductor element, since the Si semiconductor is not alloyed with any other member, the warpage of the Si semiconductor is small. However, since the members are not bonded to each other, the contact resistance at each member interface is large.

In order to reduce the contact resistance at the interface of each member, the soft layer existing at the interface of each member provided by the present invention is deformed by the applied pressure to fill the gap at the interface of the member and reduce the contact resistance. Fulfill.

In the present invention, it is indispensable that the Si semiconductor is a full pressure contact type and that a soft layer is provided at the interface of each member. Particularly, in the case of a gate turn-off thyristor, the Al electrode on the cathode side and the thermal buffer plate are required. Electrical characteristics such as interruption resistance and overcurrent resistance at the interface with and are extremely important. Therefore, in the present invention, the soft layer is provided on at least one of the interface between the Al electrode and the thermal buffer plate, the interface between the thermal buffer plate and the thermal buffer plate, and the interface between the thermal buffer plate and the electrode lead-out member. There is a need.

As a result, according to the present invention, the contact resistance, that is, the thermal resistance can be reduced without increasing the pressing force so much, and sticking can be made less likely to occur.

[0026]

Embodiments of the pressure contact type semiconductor device according to the present invention will be described below in detail with reference to the drawings. FIG. 1 is a sectional view showing the structure of the first embodiment of the present invention, showing an example of a thyristor. In FIG. 1, 6 and 7 are thermal buffer plates, and 8,
Reference numeral 9 is a soft layer, and other symbols are the same as those in FIG.

The first embodiment of the present invention shown in FIG.
Al electrodes 3 are provided on both main surfaces of the semiconductor 1 to form a thyristor as a full pressure contact type semiconductor element.
On both main surface sides of the semiconductor 1, a thermal buffer plate 4 made of Mo, W, or the like,
6 and 5, 7 are provided, and soft layers 8 and 9 made of a metal of IB group are provided between these thermal buffer plates, and
The respective members are pressure-contacted via the electrode lead-out members 10 and 11.

In the first embodiment of the present invention thus constructed, two heat buffer plates 4 and 6 and two heat buffer plates 5 and 7 are provided on both main surface sides of the Si semiconductor 1, respectively. Since the soft layers 8 and 9 exist between the heat buffer plates of
Even when the heat shock absorbing plate 6 and the Al electrode 3 and the heat shock absorbing plate 7 are adhered to each other, they do not generate thermal stress because they slide at the interface between the heat shock absorbing plates 4 and 5. is there.

However, since the contact resistance at the interface between the heat buffer plates having high hardness is extremely high, in the present invention, in order to reduce the contact resistance, the interface between the heat buffer plates, that is, the heat buffer plates 4 and 6 is used. And soft layers 8 and 9 are present between the heat absorbing plates 7 and 9 and between the heat absorbing plates 7 and 9, respectively. As a result, the first embodiment of the present invention can reduce the contact resistance in the low pressure state.

FIG. 2 is a sectional view showing the structure of the second embodiment of the present invention, showing an example of a gate turn-off thyristor. The reference numerals in the figure are the same as those in FIG.

In the second embodiment of the present invention, a gate turn-off thyristor is formed on the Si semiconductor 1, and the other structure is exactly the same as that of FIG. Also in this embodiment of the present invention, the same effect as that of the first embodiment of the present invention described above can be obtained.

In the first and second embodiments of the present invention described above, it is possible to reduce the thermal resistance of the semiconductor device with a low pressurizing force, and the adhesion between the members can be reduced by reducing the pressurizing force. Further, it is possible to prevent the deformation of the member due to the unbalanced weight and the like, and it is possible to reduce the size of the semiconductor device itself.
Further, it is possible to reduce the size of equipment such as a power conversion device configured using such a semiconductor device.

The above-mentioned first and second embodiments of the present invention are as follows.
Although it has been described that two thermal buffer plates are provided on each of the two main surfaces of the Si semiconductor, the number of thermal buffer plates in the structure of the above-described embodiment is reduced in order to further reduce the thermal resistance of the semiconductor device. You should let me.

FIG. 3 is a sectional view showing the structure of the third embodiment of the present invention. This third embodiment of the present invention is the thermal buffer in the second embodiment of the present invention described with reference to FIG. The plate 7 is removed.

FIG. 4 is a sectional view showing the structure of the fourth embodiment of the present invention. The fourth embodiment of the present invention is the thermal buffer in the second embodiment of the present invention described with reference to FIG. The structure is such that the plate 7 is removed and the soft layer 9 ′ is directly provided on the heat buffer plate 5, that is, on the Si semiconductor side by plating, vapor deposition, or the like.

FIG. 5 is a sectional view showing the structure of the fifth embodiment of the present invention. The fifth embodiment of the present invention is based on the structure of the fourth embodiment of the present invention shown in FIG. The structure has the heat buffer plate 6 removed.

FIG. 6 is a sectional view showing the structure of the sixth embodiment of the present invention. The sixth embodiment of the present invention is the thermal buffer in the fourth embodiment of the present invention described with reference to FIG. The structure is such that the plate 6 is removed and the soft layer 8 ′ is directly provided on the Si semiconductor side of the heat buffer plate 4.

FIG. 7 shows the structure according to the second embodiment (FIG. 2) and the third embodiment (FIG. 3) of the present invention and the prior art (FIG. 10).
FIG. 6 is a diagram showing the relationship between thermal resistance and pressure in a gate turn-off thyristor having a structure of 60 mm in diameter.

As can be seen from this figure, in the case of the prior art,
The thermal resistance is not saturated unless the applied pressure is increased to 3000 Kg or more, whereas in the case of the embodiment of the present invention, 2000 K is used.
Pressurizing with a force of g or more saturates the thermal resistance.

In the prior art, since the surface pressure against the Al electrode is about 3 Kg / mm ² with the applied pressure of 3000 Kg, the Al electrode is remarkably deformed by the heat cycle of the element due to the operation and stop of the semiconductor device. , There is a possibility of causing problems such as a gate / cathode short circuit. On the other hand, in the embodiment of the present invention, since the applied pressure is about ² Kg / mm ² , the deformation amount of the Al electrode can be reduced.

FIG. 8 is a view for explaining the pressure-dependent characteristic of the gate trigger current of the gate turn-off thyristor having a diameter of 60 mm having the structure according to the first embodiment of the present invention and the structure of the prior art.

Generally, the gate trigger current of the gate turn-off thyristor depends on the real contact area between the Al electrode of the cathode and the thermal buffer plate. It can be seen that the current dependence of the applied pressure is large, whereas the embodiment of the present invention is less dependent on the applied pressure.

That is, in the embodiment of the present invention, due to the synergistic effect of the full pressure contact type semiconductor element and the soft layer, the cathode A
Since the true contact area between the 1-electrode and the thermal buffer plate can be increased, excellent characteristics can be obtained.

FIG. 9 shows the breaking capability of the gate turn-off thyristor according to the embodiment of the present invention and the prior art. Here, the breaking tolerance when the semiconductor device is assembled according to the embodiment of the present invention using the same element as that of the prior art having a breaking tolerance of 4000A is shown.

From this figure, even in the case of the conventional alloy type method, by providing the soft layer between the Al electrode of the cathode and the heat buffer plate, the breaking resistance can be increased as shown in (b). However, in the case of the embodiment of the present invention, (c)-
As shown in (e), it can be seen that the breaking resistance can be greatly increased.

As the soft layer used in each of the embodiments of the present invention described above, a single layer mainly composed of Cu, Ag, and Au of the IB group or a structure having two layers thereof is preferable, and its thickness. Is preferably in the range of 10 μm to 500 μm.
In addition, as the shape, foil or plating film vapor deposition film,
It may be a sputtered film or the like.

Further, the electrode lead-out members 10 and 11 in each of the above-described embodiments of the present invention are constructed such that a cooling liquid or the like is introduced therein, and it is possible to forcibly cool the semiconductor device. Is.

According to each of the above-described embodiments of the present invention, the pressure applied to the semiconductor device is 1 as compared with the prior art.
Even if the power consumption is reduced to 1/2, the breaking resistance of 1.5 times can be obtained, and when the power conversion device is configured by using the semiconductor device according to the embodiment of the present invention, the size thereof is reduced by the conventional semiconductor. The size and weight can be reduced to about 2/3 of the case of using the device.

Although several embodiments of the present invention have been described above, the present invention can be modified in many ways. For example, thermal buffer plates provided on both main surface sides of a Si semiconductor can be used. The structure may be one, or a structure in which a soft layer is provided between the heat buffer plate and the electrode lead-out member.

[0050]

As described above, according to the present invention, by providing a soft layer at the interface between all the pressure contact type Si semiconductors and each member constituting a semiconductor device, each member can be reduced in a pressure applied state. It is possible to reduce the contact resistance at the interface,
The thermal resistance can be reduced by about 20% as compared with the conventional technique, and the breaking resistance can be improved by 1.5 times.

Further, it is possible to miniaturize the device and system using the semiconductor device according to the present invention.

[Brief description of drawings]

FIG. 1 is a sectional view showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a sectional view showing a configuration of a second exemplary embodiment of the present invention.

FIG. 3 is a sectional view showing a configuration of a third exemplary embodiment of the present invention.

FIG. 4 is a sectional view showing a configuration of a fourth exemplary embodiment of the present invention.

FIG. 5 is a sectional view showing a configuration of a fifth exemplary embodiment of the present invention.

FIG. 6 is a sectional view showing a configuration of a sixth exemplary embodiment of the present invention.

FIG. 7 is a diagram showing the relationship between the thermal resistance and the applied pressure according to the embodiment of the present invention.

FIG. 8 is a diagram illustrating a pressure-dependent characteristic of a gate trigger current according to an example of the present invention.

FIG. 9 is a diagram illustrating the breaking tolerance of the embodiment of the present invention.

FIG. 10 is a cross-sectional view showing an example of an alloy type semiconductor device according to a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Si semiconductor 2 Al brazing 3 Al electrode 4-7 Thermal buffer plate 8, 9 Soft layer 10, 11 Electrode lead-out member

 ─────────────────────────────────────────────────── --- Continuation of the front page (72) Inventor Masayasu Nihei 4026 Kujimachi, Hitachi City, Hitachi, Ibaraki Prefecture Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Taka Saito 3-1-1, Saiwaicho, Hitachi City, Ibaraki Hitachi, Ltd., Hitachi Plant (72) Inventor, Shuroku Sakurada, 3-1-1, Sachimachi, Hitachi City, Ibaraki Prefecture Hitachi Ltd., Hitachi, Ltd. (72), Inventor, Tsutomu Yao 4026 Kuji Town, Hitachi City, Ibaraki Prefecture Hitachi Research Laboratory, Hiritsu Manufacturing Co., Ltd.

Claims (8)

[Claims] 1. A semiconductor element having electrodes on both main surfaces of a semiconductor substrate, a heat buffer plate sandwiching the semiconductor element from both main surfaces and in contact with each of the electrodes on the both main surfaces, and heat buffers for these. In a pressure contact type semiconductor device including an electrode lead-out member that presses a plate into pressure contact with the electrode, two heat buffer plates are provided on each main surface side of both main surfaces of the semiconductor substrate, and two heat buffer plates are provided. A pressure contact type semiconductor device characterized in that a soft layer, which is softer than the thermal buffer plates, is arranged between the buffer plates. 2. A semiconductor element having electrodes on both main surfaces of a semiconductor substrate, a heat buffer plate sandwiching the semiconductor element from both main surfaces and in contact with each of the electrodes on the both main surfaces, and heat buffers for these. A pressure-contact type semiconductor device comprising a plate and an electrode lead-out member that press-contacts the electrode, wherein two heat buffer plates are provided on one main surface side of both main surfaces of the semiconductor substrate. Between the buffer plates, a soft layer softer than the thermal buffer plates is arranged, one thermal buffer plate is provided on the other main surface side, and between the one thermal buffer plate and the electrode of the semiconductor substrate, A pressure contact type semiconductor device characterized in that a soft layer softer than a heat buffer plate is arranged. 3. A semiconductor element having electrodes on both main surfaces of a semiconductor substrate, a heat buffer plate sandwiching the semiconductor element from both main surfaces and in contact with each of the electrodes on the both main surfaces, and heat buffers for these. A pressure contact type semiconductor device comprising a plate and an electrode lead-out member for pressing the plate to the electrode, wherein one heat buffer plate is provided on each main surface side of both main surfaces of the semiconductor substrate. A pressure contact type semiconductor device, wherein a soft layer, which is softer than the heat buffer plate, is disposed between the heat buffer plate and the electrode of the semiconductor substrate. 4. The soft layer is provided directly on the surface of at least one of the thermal buffer plates that is in direct contact with the electrode of the semiconductor substrate or in contact with the soft layer via the soft layer. Item 8. A pressure contact type semiconductor device according to item 1, 2 or 3. 5. The pressure contact according to claim 1, wherein a soft layer softer than the heat buffer plate is arranged between the electrode lead-out member and the heat buffer plate in contact with the member. Type semiconductor device. 6. The pressure contact type semiconductor device according to claim 1, wherein the electrode lead-out member is directly cooled. 7. The material of the soft layer is a substance of Group IB of the periodic table, which is one of claims 1 to 6.
The pressure contact type semiconductor device described. 8. A power conversion device comprising the pressure contact type semiconductor device according to claim 1. Description: