JPH05315616A - Semiconductor device and thin film transistor - Google Patents

Abstract

(57) [Summary] (Modified) [Purpose] To improve the performance of thin-film transistors for semiconductor devices such as contact-type image sensors and display devices while keeping manufacturing costs low. [Structure] A gate electrode 2, a gate insulating layer 3, an active layer 4, an etching stop layer 8, a contact layer 5, on an insulating substrate 1.
It comprises a source and a drain electrode 6. By protecting the active layer from etching when the contact layer in the channel region is removed by etching, the thickness of the active layer can be reduced, and thus a high ON / OFF ratio of the thin film transistor can be realized. As a material of the etching stop layer 8 different from the active layer 4, SiOx and SiNx are preferable, and in the case of the same material, amorphous silicon whose bond hydrogen amount is much smaller than that of the contact layer 5 is preferable.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor and a semiconductor device using the same, and particularly to a thin film transistor used for a large area flat device such as an image sensor using silicon, a liquid crystal shutter array and a display, and a semiconductor using the thin film transistor. Regarding the device.

[0002]

2. Description of the Related Art With the progress of thin film technology, it has become possible to realize the function which was conventionally provided by mounting an LSI on a substrate by forming it on the substrate with a thin film transistor (TFT) or a diode. It's starting. For example,
Conventionally, a liquid crystal display was driven by a simple matrix, but an amorphous silicon thin film transistor (a-SiTFT) in which each pixel was formed in each pixel
By switching with, it is possible to further improve the contrast and improve the image quality to that of a CRT. Further, in the contact-type image sensor used in a facsimile or a scanner, the number of required LSIs can be reduced by forming a switch and a scanning circuit for each pixel with TFTs on a substrate, so that the cost can be significantly reduced. Moreover, since the degree of integration can be increased, 400 dpi
It can easily support high-definition reading of.

In an a-Si thin film transistor (TFT), conventionally, an i amorphous silicon layer (i
-A-Si layer) and the contact layer n + amorphous silicon layer (n + -a-Si layer) have almost the same etching rate, so that the selection ratio at the time of etching can hardly be taken and the back channel portion In the removal of the n + -a-Si layer by etching, the i-a-Si layer is also partially etched at the same time. Therefore, as shown in FIG. It was necessary to make it thicker than that. In FIG. 3, 1 is an insulating substrate, 2 is a gate electrode, 3 is a gate insulating layer, 4 is an active layer, 5 is a contact layer, and 6 is a source / drain electrode.

Further, as described in JP-A-58-212177 and JP-A-61-145869, i
After the -a-Si layer 4 is formed, the passivation film 7 (FIG. 4) is once thinly formed as an etching barrier and processed so that the contact layer 5 can be formed on the ia-Si layer 4. The contact layer 5 and the source / drain electrode 6 were formed. As a result, the active layer i-a-Si4 is not removed when the contact layer 5 is etched, so that a predetermined semiconductor film thickness can be formed from the beginning.

Alternatively, as disclosed in JP-A-63-31169, by providing an active layer and a contact layer having different hydrogen contents, the thickness of the active layer remaining after etching the contact layer is made appropriate. Some can.

[0006]

However, JP-A-58-58
Nos. 212177 and 61-145869 disclose that the contact layer needs to be formed separately from the gate insulating layer and the active layer, and that the photoetching step of the passivation layer is increased. There was a problem that the number increased and the cost increased.

Alternatively, the device disclosed in Japanese Patent Laid-Open No. 63-31169 cannot reduce the step difference between the channel region and the source drain region even if the channel layer film thickness can be finally reduced to some extent. However, there has been a problem that the series resistance of the transistor becomes high and the mutual conductance, which is a measure of the operating speed, becomes small.

Further, as described in JP-A-63-31169, in order to have an active layer and a contact layer having different amounts of hydrogen, the amount of hydrogen in the contact layer must be increased relatively. It was necessary to form a film at low temperature.
However, the low temperature formation lowers the heat resistance of the film, degrading the device characteristics due to hydrogen desorption and diffusion of the dopant into the active layer at the time of baking the passivation film or interlayer insulating film on the device. However, there is a problem that the performance of the semiconductor device as a whole such as a liquid crystal display and a contact image sensor is not improved.

An object of the present invention is to provide a thin film transistor having a simple film structure, a high heat resistance, and a thin film thickness of the active layer, so that the high O 2 of the transistor can be obtained.
A thin film transistor having improved characteristics and stability of a semiconductor device by improving an ON / OFF ratio of a transistor by securing an N current and suppressing an OFF current to be low, a semiconductor device using the same, and an image sensor To provide a liquid crystal shutter array and a display device.

[0010]

To achieve the above object, the present invention provides a gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, and the gate insulating layer. In a semiconductor device having a thin film transistor having an active layer and a source / drain electrode formed on the layer, and a contact layer formed between the source / drain electrode and the active layer, a semiconductor device having a contact layer and an active layer is provided. In addition, an etching stop layer having the same planar shape as the island pattern of the active layer and the same material as the active layer and having a bonded hydrogen amount of 5% or less is provided. is there. The amount of bonded hydrogen in the contact layer is 10
It is better that the content is at least%.

The present invention also provides a gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and a source / drain formed on the gate insulating layer. In a semiconductor device having a thin film transistor having an electrode and a contact layer formed between the source / drain electrode and the active layer, an island pattern of the active layer is provided between the contact layer and the active layer. It is characterized in that an etching stopper layer having the same plane shape and made of a material different from that of the active layer is provided.

In the above semiconductor device, the etching rate at a liquid temperature of 35 ° C. using hydrazine hydrate as an etchant is 1 nm / sec or less for the etching stop layer and 2.5 nm / sec or more for the contact layer. Good. The resistivity of the etching stop layer is 10 ⁷ Ωcm.
The film thickness is preferably 10 to 10 ¹⁰ Ωcm and the film thickness is 5 nm or less. Further, there is a step between the source / drain electrode portion and the channel region formed between them, and the dimension obtained by subtracting the thickness of the contact layer from the step is 1 nm to
It is preferably 30 nm. The thickness of the active layer is 2
It is preferably 100 nm or less. The thickness of the etching stop layer is preferably 40 nm or less. The active layer is made of amorphous silicon, or
It is preferably composed mainly of polycrystalline silicon.

The present invention also provides a gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and source / drain formed on the gate insulating layer. A thin film transistor having an electrode and a contact layer formed between the source / drain electrode and the active layer, and an interlayer insulating film and a passivation film on the thin film transistor.
In a semiconductor device having at least one of an ionization film and an electrode, each layer is formed or processed at a temperature of 200 ° C. or higher.

The present invention also provides a gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and a source / drain formed on the gate insulating layer. In a thin film transistor having an electrode and a contact layer formed between the source / drain electrode and the active layer, the same planar shape as the island pattern of the active layer is provided between the contact layer and the active layer. Further, the thin film transistor is characterized by being provided with an etching stopper layer which is made of the same material as the active layer and has a bound hydrogen amount of 5% or less.

The present invention also provides a gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and a source / drain formed on the gate insulating layer. In a thin film transistor having an electrode and a contact layer formed between the source / drain electrode and the active layer, a thin film transistor having the same plane shape as the island pattern of the active layer is provided between the contact layer and the active layer. Further, the thin film transistor is characterized in that an etching stop layer made of a material different from that of the active layer is provided.

Further, the present invention is a contact type image sensor characterized in that the etching stopper layer and the active layer of the semiconductor device according to any one of the above are used as a light receiving element.

According to the present invention, in the semiconductor device described in any one of the above, a shift register including the inverter having the plurality of thin film transistors is used in a scanning circuit. A liquid crystal shutter array.

The present invention is also the display device characterized in that the peripheral circuit section and the pixel section are formed by the thin film transistors having the same structure in the semiconductor device described in any one of the above.

[0019]

In order to make the film thickness of the active layer as thin as possible without increasing the number of steps, in the case of the inverted stagger structure, the gate insulating layer, the active layer, the etching stop layer and the contact layer are continuously formed at the time of film formation. Form. Next, the active layer, the etching stop layer, and the contact layer are processed into islands with the same photomask,
A metal such as Cr or Al is deposited on the source and drain electrodes, and wiring is processed. Then, the contact layer in the channel region is removed by etching. At this time, the etching rate is slowed by the etching stopper layer between the contact layer and the active layer, and the active layer below the contact layer is not etched.

Further, since there is an etching stopper layer having the same plane shape as the island pattern of the active layer and having a different material or the same material and a bound hydrogen amount of 5% or less, the contact layer is subjected to a special etching rate. Does not need to be formed so as to be large, and it is possible to form under a more thermally stable condition, and the stability of element characteristics with respect to the thermal history after TFT fabrication can be greatly improved.

In the etching stop layer, although the etching rate becomes slower, the etching progresses, so that a step is formed in the channel portion due to film slip. The step depends on the etching rate of the etching stop layer, but if it is suppressed to within 40 nm which is about the same as that of the contact layer, it is possible to sufficiently cope with variations in etching time depending on the location of the substrate. Therefore, the film thickness of the etching stop layer is at most 4
It should be 0 nm.

Since the film slippage at the channel portion can be greatly reduced while maintaining a simple process in which the number of times of film formation and etching is exactly the same as the conventional method, the active layer is formed thinly in advance to the required film thickness. You will be able to. First, as the film thickness is thinner, the resistance at the time of OFF is increased, and the OFF current of the transistor can be reduced. Furthermore, since the film thickness is thin, the series resistance between the channel-contact layer that is in series with the channel resistance of the transistor can be reduced, and therefore the ON current can be increased, thereby increasing the field effect mobility of the transistor element. be able to. Therefore, the S / N ratio of the circuit using this transistor element can be improved and the operating speed of the circuit can be greatly improved.

The etching rate required to stop the etching depends on the etching rate of the contact layer. Using hydrazine hydrate as an etchant, liquid temperature 35
In the case of ° C, the contact layer (n +-
Since the etching rate of (a-Si) is 2.5 nm / sec or more, the etching rate of the etching stop layer is set to 1 nm / sec or less so that the contact layer on the entire surface of the substrate of about 40 nm is usually removed. ,
The active layer can be sufficiently retained.

It is necessary that the material of the etching stop layer satisfies the above conditions and has a resistance value similar to the OFF resistance of the active layer. First, a material different from the active layer and having a high selective etching property is preferable. For that purpose, a high specific resistance material such as SiOx or SiNx whose composition is controlled to have a specific resistance value of 10 ⁷ to 10 ¹⁰ Ωcm or less may be thinly formed to 5 nm or less. The specific resistance value and the film thickness may be adjusted so that the resistance value becomes equal to the OFF resistance of the active layer. In order to adjust the resistance value of the etching stop layer, S
When the i film is formed, oxygen or nitrogen is doped to form SiO.
It is preferable to form x and SiNx. If the doping amount is too large, the resistance becomes too high, so x is preferably 0.5 or less. On the other hand, a material other than Si-based material can be applied to the etching stop layer as long as it has a specific resistance value similar to that of the active layer and a slower etching rate than the active layer.

The etching stop layer may be formed with the same composition as the active layer. Usually, since the active layer and the contact layer are formed of the same material, the etching rates of the both are almost the same regardless of the etching method, and therefore it is difficult to selectively remove only the contact layer. However, as a result of various examinations, it was found that the etching rate of the a-Si film greatly changed depending on the hydrogen content in the film. Therefore, only the contact layer can be selectively removed by controlling the amount of hydrogen in the contact layer to be etched during film formation to be larger than that of the active layer to be left by etching.

It has been found that the effect is particularly effective in the case of wet etching using an alkaline etching solution for etching the active layer. As the etching solution, hydrazine hydrate, potassium hydroxide, sodium hydroxide, ammonia, ethylenediamine, dilute hydrofluoric acid and the like are effective.

The etching stop layer may have a low hydrogen concentration as compared with the contact layer, and may be in an amorphous state or a polycrystalline state. In the amorphous state, this etching stop layer is formed by a reactive sputtering method using hydrogen, a thermal CVD method.
Amorphous silicon or the like, which is dehydrogenated by abstracting hydrogen by chemical annealing with a hydrogen radical, is suitable. In particular, amorphous silicon formed by supplying a large amount of hydrogen radicals during film formation has a low hydrogen concentration and a fluctuation in the bond angle of the Si network decreases, resulting in an increase in bond strength and physical and chemical It is also suitable as an etching stop layer because it stabilizes.

Similarly, by supplying a large amount of hydrogen radicals during film formation, a partially crystallized Si film can be produced. Since this film contains crystalline Si in its film, the etching rate is lower than that of amorphous Si, so that a film suitable for the etching stop layer can be formed.

The active layer may be in an amorphous state or a polycrystalline state. In the polycrystalline state, a partially crystallized Si film produced by supplying a large amount of hydrogen radicals during the film formation as described above, polycrystalline Si film-formed or heated at a crystallization temperature or higher, or amorphous. Si obtained by laser annealing a film in a quality state may be used.

[0030]

EXAMPLE 1 An example of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view of an inverted stagger type thin film transistor (TFT). Cr is used as the gate electrode 2 on the insulating substrate 1.
It is formed by a 0 nm sputtering method and processed by photoetching. Silicon nitride, aluminum oxide, silicon oxide, or the like is formed as the gate insulating layer 3 by plasma CVD or sputtering. Furthermore, in order to form a good channel interface, non-doped amorphous silicon is continuously formed as the active layer 4 subsequent to the gate insulating layer 3. Further, an etching stopper layer 8 made of amorphous silicon having the same planar shape as that of the active layer 4 and having the amount of bonded hydrogen in the film controlled to 5% or less is formed. Subsequently, in the case of an n-MOS type as the contact layer 5, phosphine is used. An n + -a-Si layer 5 doped with is formed.

When the TFT is made of a material in an amorphous state, it is necessary to contain hydrogen in order to terminate unbonded species (dangling bond) in the film. The amount of hydrogen is formed in the etching stopper layer 8 to be 5% or less. As a method of forming the etching stop layer, plasma C is used.
It is formed by a VD method, a photo CVD method, a sputtering method, or the like. With any of these methods, the amount of hydrogen in amorphous silicon can be controlled within the range of 0 to 15%.
Alternatively, hydrogen may be further added by forming a low-hydrogen amorphous silicon film by a thermal CVD method and then performing heat treatment in hydrogen gas or hydrogen plasma.

When the bond hydrogen concentration of the contact layer 5 is greatly increased (about 20% or more), the film quality changes due to the subsequent temperature history, and the TFT characteristics deteriorate. Therefore,
Selective etching between the contact layer and the active layer can be easily achieved by forming one layer with a low bonded hydrogen amount on the active layer without increasing the amount of bonded hydrogen in the contact layer 5 so much. By these methods, the amount of bound hydrogen in the etching stop layer and the contact layer can be controlled without impairing the heat resistance.

After the insulating layer 3, the active layer 4, the etching stop layer 8 and the contact layer 5 are continuously formed, the active layer 4, the etching stop layer 8 and the contact layer 5 are processed into an island shape. After that, A is used as the source / drain electrode 6.
1 or Cr, Al laminated film is formed and patterned.
The contact layer 5 is etched using the electrode as a mask.

FIG. 2 shows the etching rates of the etching stop layers having different low bond hydrogen amounts and the contact layers having high bond hydrogen concentrations. Wet etching was used with hydrazine as the etchant. By reducing the hydrogen concentration to 3% in the non-doped a-Si film, the etching rate is reduced from 2.5 nm / s to 0.7 nm / s, which is about 1 /
It can be reduced to 3 or less. On the other hand, even if the amount of hydrogen is 12% and the amount of phosphine is 0.5%, the etching rate hardly changes in the non-doped a-Si film. Therefore, high hydrogen n + -a-Si is used as the contact layer.
By stacking a low hydrogen non-doped a-Si layer as an etching stop layer between the layer and the active layer, selective etching of the both becomes possible. The selection ratio is 3.5 times, which is a sufficiently practical value.

In the thin film transistor, if the thickness of the active layer is unnecessarily large, the device characteristics are greatly affected.
First, the transconductance gm, which represents the driving capability of a transistor, is calculated as follows: gm = WμC (Vg−Vth) / L (1)
And the channel length L and the gate capacitance C. However, actually, there is a resistance other than the channel portion, that is, a series resistance in the source and drain portions. In this case, the actual transconductance gm 'is calculated by the following equation (2).
It is represented by.

Gm '= gm / (1 + Rsgm) (2) If the contact layer cannot be selectively etched, it is necessary to make the contact layer thick from the beginning in consideration of the active layer removed by overetching as shown in FIG. There is. Particularly when etching is performed on a large-area substrate, the etching rate varies depending on the location, and the initial active layer film thickness is required to be at least 200 nm or more. Therefore, compared with the case of FIG. 1, the series resistance proportional to the film thickness is 1.3 to 4
Doubled and the ON resistance increases.

If the contact layer can be selectively etched,
Since the thickness of the active layer can be formed sufficiently thin from the beginning, the parasitic resistance existing between the channel and the source and between the channel and the drain can be significantly reduced. For example, since the channel formation thickness is about 30 nm, the active layer film thickness may be about 10 to 150 nm.

Comparing the two, even if the field effect mobilities in the channel portion are the same, the transconductance values are greatly different, and the active layer thickness can be made thin, so that the ON characteristics of the transistor can be greatly improved. .. When evaluated by the mobility, the conventional TFT shown in FIG.
Has a field effect mobility of 0.2 to 0.4 cm ² / Vs, whereas the TFT of the present invention has a field effect mobility of 1.0.
cm ² / Vs or more can be realized.

Further, as another effect of reducing the thickness of the active layer, the thickness of the active layer can be greatly reduced, so that the resistance value thereof can be increased and therefore the OFF current can be suppressed low.

Example 2 In the case of a liquid crystal display, ITO (indium tin oxide), a liquid crystal, and a color were used as transparent electrodes after the TFT was manufactured.
Stack filters. Among these, the manufacturing temperature of the ITO film is 2
It is at least 00 ° C. TFT to increase the amount of bound hydrogen
When the contact layer of is formed at 150 ° C, ITO
Since phosphine diffused from the contact layer into the active layer during film formation, the off current of the transistor increased.

In the contact type image sensor or liquid crystal shutter array, after forming TFT elements, polyimide is formed as an interlayer insulating layer, and then Al which is a transverse wiring is formed. In the device in which the contact layer was formed at 150 ° C. after heating the polyimide to 300 ° C., which is the baking temperature, part of the bonded hydrogen in the film was released and the film swelled. In the above two cases, when the contact layer was formed at 230 to 300 ° C. and the active layer and the etching stop layer were formed at 300 ° C.,
High mobility and stable threshold voltage did not deteriorate.

When the active layer appears directly on the surface of the element, not only heat but also plasma damage during etching of the contact layer or formation of the passivation film, polarization of polyimide, etc. cause deterioration of element characteristics. It has been known. However, by forming the etching stop layer on the active layer, all of the above factors for destabilizing the device could be reduced.

Embodiment 3 FIG. 5 is a circuit diagram of a dynamic shift register using an ER type inverter composed of an operation switch of an enhancement type transistor of the present invention and a load formed by a resistance element. The frequency characteristic of this shift register is shown in FIG. When a conventional TFT having a mobility of 0.2 cm ² / Vs is used, its responsiveness is slow, and therefore its driving frequency is about 20 kHz. On the other hand, the mobility is 1.0
A shift register using the TFT of the present invention having cm ² / Vs can scan at a high speed of 100 kHz or more.

When a scanning circuit of a contact image sensor or a liquid crystal shutter array for a liquid crystal printer is formed using the shift register, image reading and printing at 2 msec / line are possible.

[0045]

According to the present invention, the ON / OFF characteristic is higher than the conventional one at almost the same cost as the conventional element manufacturing process.
A thin film transistor having excellent stability and a semiconductor device using the thin film transistor can be provided.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a thin film transistor portion of a semiconductor device of the present invention.

FIG. 2 is a diagram showing a relationship between etching time and etching film thickness of various materials.

FIG. 3 is a cross-sectional view of a conventional thin film transistor.

FIG. 4 is a cross-sectional view of another conventional thin film transistor.

FIG. 5 is a circuit configuration diagram of a shift register according to the present invention.

FIG. 6 is a diagram showing frequency characteristics at various mobilities in a thin film transistor.

[Explanation of symbols]

 1 Insulating Substrate 2 Gate Electrode 3 Gate Insulating Layer 4 Active Layer 5 Contact Layer 6 Source Drain Electrode 7 Channel Protection Layer 8 Etch Blocking Layer

 ─────────────────────────────────────────────────── --- Continuation of the front page (72) Kenichi Hashimoto, Inventor Kenichi Hashimoto 4026, Kuji-machi, Hitachi City, Ibaraki Hitachi Institute of Hitachi, Ltd. (72) Inventor Satoru Hashimoto, 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Information & Communication Division, Hitachi, Ltd.

Claims (15)

[Claims] 1. A gate electrode formed on an insulating substrate,
An amorphous gate insulating layer formed on the gate electrode, an active layer and a source / drain electrode formed on the gate insulating layer, and a contact formed between the source / drain electrode and the active layer. In a semiconductor device having a thin film transistor provided with a layer, between the contact layer and the active layer, the same planar shape as the island pattern of the active layer and the same material as the active layer, and the amount of bound hydrogen Is 5%
A semiconductor device comprising the following etching stop layer. 2. A gate electrode formed on an insulating substrate,
An amorphous gate insulating layer formed on the gate electrode, an active layer and a source / drain electrode formed on the gate insulating layer, and a contact formed between the source / drain electrode and the active layer. In a semiconductor device having a thin film transistor having a layer, an etching stopper layer having the same plane shape as the island pattern of the active layer and made of a material different from that of the active layer is provided between the contact layer and the active layer. A semiconductor device characterized by the above. 3. The semiconductor device according to claim 1, wherein hydrazine hydrate is used as an etchant, and the liquid temperature is 35 ° C.
Etching rate is 1 nm / s
ec or less, 2.5 nm / sec in the contact layer
A semiconductor device having the above. 4. The semiconductor device according to claim 2,
The resistivity of the etching stop layer is 10 ⁷ Ωcm to ^{10 10} Ω.
The semiconductor device has a thickness of 5 cm and a thickness of 5 nm or less. 5. The semiconductor device according to claim 1, wherein a step exists between the source / drain electrode section and the channel region formed between the source / drain electrode section, and the film thickness of the contact layer is determined from the step. Subtracted size is 1 nm to 3
A semiconductor device having a thickness of 0 nm. 6. The semiconductor device according to claim 1, wherein the active layer has a film thickness of 200 nm or less. 7. The semiconductor device according to claim 1, wherein the etching stop layer has a thickness of 40 nm or less. 8. The semiconductor device according to claim 1, wherein the active layer is made of amorphous silicon. 9. The semiconductor device according to claim 1, wherein the active layer is mainly made of polycrystalline silicon. 10. A gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and source / drain electrodes formed on the gate insulating layer, A thin film transistor having a contact layer formed between the source / drain electrodes and the active layer, and a semiconductor device having at least one of an interlayer insulating film, a passivation film, and an electrode thereon, Is a semiconductor device formed or processed at a temperature of 200 ° C. or higher. 11. A gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and source / drain electrodes formed on the gate insulating layer, In a thin film transistor including a contact layer formed between the source / drain electrodes and the active layer, the thin film transistor having the same plane shape as the island pattern of the active layer and the contact layer between the contact layer and the active layer. A thin film transistor comprising the same material as that of the active layer and having an etching stop layer having a bound hydrogen content of 5% or less. 12. A gate electrode formed on an insulating substrate, an amorphous gate insulating layer formed on the gate electrode, an active layer and source / drain electrodes formed on the gate insulating layer, In a thin film transistor including a contact layer formed between the source / drain electrodes and the active layer, the active layer has the same plane shape as the island pattern of the active layer and the active layer between the contact layer and the active layer. A thin film transistor having an etching stop layer made of a material different from that of the layer. 13. A contact type image sensor, wherein the etching stop layer and the active layer of the semiconductor device according to claim 1 are used as a light receiving element. 14. The semiconductor device according to claim 1, wherein a shift register including the inverter having the plurality of thin film transistors and using the inverter is used in a scanning circuit. LCD shutter array. 15. A display device of the semiconductor device according to claim 1, wherein a thin film transistor having the same configuration forms a peripheral circuit portion and a pixel portion.