JPH05343738A - Manufacture of optical semiconductor device - Google Patents
Manufacture of optical semiconductor deviceInfo
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- JPH05343738A JPH05343738A JP14776992A JP14776992A JPH05343738A JP H05343738 A JPH05343738 A JP H05343738A JP 14776992 A JP14776992 A JP 14776992A JP 14776992 A JP14776992 A JP 14776992A JP H05343738 A JPH05343738 A JP H05343738A
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- layer
- strained superlattice
- superlattice layer
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Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は,多重量子井戸構造を形
成する歪超格子層を有する光半導体装置の製造方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an optical semiconductor device having a strained superlattice layer forming a multiple quantum well structure.
【0002】大容量光通信に適用される半導体レーザ
は,高速,低チャープかつスペクトル幅が狭いことが必
要である。近年,多重量子井戸レーザにより,量子サイ
ズ効果に基づく状態密度関数の変化,双極子モーメント
の増大による微分利得の増大,及び線幅増大係数(αパ
ラメータ)の低減を利用して,スペクトル幅の著しい改
善がなされた。A semiconductor laser applied to large-capacity optical communication is required to have high speed, low chirp, and a narrow spectrum width. Recently, multi-quantum well lasers have been used to increase the spectral width by utilizing the change of the density of states function based on the quantum size effect, the increase of the differential gain due to the increase of the dipole moment, and the reduction of the line width increase coefficient (α parameter). Improvements have been made.
【0003】さらに,多重量子井戸レーザの特性を改善
すべく,歪みを導入してホールの有効質量を低減し,キ
ャリア密度が低くても動作する歪み量子井戸レーザが開
発された。Further, in order to improve the characteristics of the multiple quantum well laser, a strained quantum well laser has been developed which introduces strain to reduce the effective mass of holes and operates even when the carrier density is low.
【0004】かかる歪超格子を用いる光半導体装置,例
えば歪み量子井戸レーザの特徴を発揮せしめるには,活
性層となる歪超格子層は,光吸収が少なく,十分な歪み
が導入され,さらに歪のために変動するPL(フォトミ
ネッセンス)発光の特性波長を調整するに十分な厚さを
有していなければならない。In order to bring out the characteristics of an optical semiconductor device using such a strained superlattice, for example, a strained quantum well laser, the strained superlattice layer serving as an active layer has little light absorption and a sufficient strain is introduced. Must have a sufficient thickness to adjust the characteristic wavelength of PL (photoluminescence) emission which varies due to
【0005】このため,光吸収が少なく,歪が大きく,
かつ厚い化合物半導体からなる歪超格子層をエピタキシ
ャルに堆積した光半導体装置の製造方法が必要とされて
いる。Therefore, light absorption is small, distortion is large,
What is needed is a method for manufacturing an optical semiconductor device in which a strained superlattice layer made of a thick compound semiconductor is epitaxially deposited.
【0006】[0006]
【従来の技術】従来の光半導体装置の製作において化合
物半導体からなる歪超格子層を堆積するには,半導体基
板上に順次,光導波層,歪超格子層,及び光閉込め層を
同じ温度でエピタキシャルに堆積していた。2. Description of the Related Art In order to deposit a strained superlattice layer made of a compound semiconductor in the fabrication of a conventional optical semiconductor device, an optical waveguide layer, a strained superlattice layer, and an optical confinement layer are sequentially formed on a semiconductor substrate at the same temperature. It was deposited epitaxially at.
【0007】しかし,歪超格子層中の空孔,不純物の混
入,及び結晶格子の乱れに起因する非発光準位の発生を
防止するためには堆積温度を高くする必要がある。他
方,成長温度が高い場合は,歪超格子層中に転位が導入
され,歪超格子層の歪が部分的に緩和される。その結
果,歪超格子層のPL発光スペクトルは分裂し,光半導
体装置の特性を劣化するのである。However, it is necessary to raise the deposition temperature in order to prevent generation of non-emission levels due to vacancies in the strained superlattice layer, contamination of impurities, and disorder of the crystal lattice. On the other hand, when the growth temperature is high, dislocations are introduced into the strained superlattice layer and the strain in the strained superlattice layer is partially relaxed. As a result, the PL emission spectrum of the strained superlattice layer splits, degrading the characteristics of the optical semiconductor device.
【0008】かかる転位は,歪超格子層の歪が大きい
程,また歪超格子層が厚い程,容易に,かつ多量に導入
される。このため,従来の方法では,非発光準位が少な
く,同時に,大きな歪を有する歪超格子層を厚く堆積す
ることができない。Such dislocations are introduced easily and in large quantities as the strain of the strained superlattice layer increases and the strained superlattice layer thickens. Therefore, according to the conventional method, the non-emission level is small, and at the same time, the strained superlattice layer having large strain cannot be deposited thickly.
【0009】[0009]
【発明が解決しようとする課題】上述したように,光導
波層,歪超格子層,及び光閉込め層の全ての層を同じ温
度で堆積する従来の光半導体装置の製造方法では,非発
光準位の発生及び転位の導入の両方を同時に防ぐことが
できないため,非発光準位及び転位が少なく,大きな歪
を有する歪超格子層を厚く堆積することができないとい
う問題があった。As described above, in the conventional method for manufacturing an optical semiconductor device in which all layers of the optical waveguide layer, the strained superlattice layer, and the optical confinement layer are deposited at the same temperature, the non-luminous Since both generation of levels and introduction of dislocations cannot be prevented at the same time, there is a problem in that there are few non-radiative levels and dislocations, and it is not possible to deposit a strained superlattice layer having large strain thickly.
【0010】本発明は,非発光準位が少ない歪超格子層
を高温で堆積したのち,その上に堆積する光閉込め層を
低温で成長して歪超格子層中への転位導入を防止するこ
とにより,非発光準位及び転位が共に少なく,かつ大き
な歪を有する厚い歪超格子層を堆積できる光半導体装置
の製造方法を提供することを目的とする。According to the present invention, a strained superlattice layer having a small number of non-emission levels is deposited at a high temperature, and then an optical confinement layer deposited thereon is grown at a low temperature to prevent dislocation introduction into the strained superlattice layer. By doing so, it is an object of the present invention to provide a method for manufacturing an optical semiconductor device capable of depositing a thick strained superlattice layer having a large number of non-emission levels and dislocations and a large strain.
【0011】[0011]
【課題を解決するための手段】図1は,本発明の実施例
断面図であり,図1(a)は基板上に堆積した化合物半
導体層構造を,図1(b)はその部分拡大図であり,歪
超格子層の多重量子井戸構造を表している。FIG. 1 is a sectional view of an embodiment of the present invention. FIG. 1 (a) is a compound semiconductor layer structure deposited on a substrate, and FIG. 1 (b) is a partially enlarged view thereof. Which represents the multiple quantum well structure of the strained superlattice layer.
【0012】上記課題を解決するために,図1を参照し
て,本願発明の第一の構造は,基板上に化合物半導体単
結晶からなる光導波層3,歪超格子層4,及び光閉込め
層5とを順に堆積する工程とを有し,該光閉込め層5を
該歪超格子層4の堆積温度より低温で堆積することを特
徴として構成し,及び,第二の構成は,第一の構成の光
半導体装置の製造方法において,InGaAsPを堆積
して該光導波層3を形成する工程と,600℃〜700
℃の堆積温度でInGaAsからなる量子井戸層4aと
InGaAsPからなる障壁層4bとを交互に積層して
該歪超格子層4を形成する工程と,600℃未満の堆積
温度でInGaAsPを堆積して該光閉込め層5を形成
する工程とを有することを特徴として構成する。In order to solve the above problems, referring to FIG. 1, the first structure of the present invention is to provide an optical waveguide layer 3, a strained superlattice layer 4, and an optical closing layer made of a compound semiconductor single crystal on a substrate. A step of sequentially depositing the confinement layer 5 and the optical confinement layer 5 is deposited at a temperature lower than the deposition temperature of the strained superlattice layer 4, and the second configuration comprises In the method of manufacturing an optical semiconductor device having the first configuration, a step of depositing InGaAsP to form the optical waveguide layer 3, and 600 ° C. to 700 ° C.
A step of alternately stacking quantum well layers 4a made of InGaAs and barrier layers 4b made of InGaAsP at a deposition temperature of ℃ to form the strained superlattice layer 4; And a step of forming the light confining layer 5.
【0013】[0013]
【作用】図2は本発明の原理説明図であり,歪超格子層
のトラップ濃度の堆積温度依存性を表している。FIG. 2 is a diagram for explaining the principle of the present invention, showing the dependency of the trap concentration of the strained superlattice layer on the deposition temperature.
【0014】なお,図2のトラップ濃度は,MOCVD
法(有機金属化学堆積法)を用いて,厚さ1.8nmのI
nGaAsからなる量子井戸層と厚さ10nmのInGa
AsPからなる障壁層とを交互に5層に積層した歪超格
子層について,DLTS法により測定されたものであ
る。The trap concentration in FIG. 2 is MOCVD.
Method (organic metal chemical vapor deposition method)
Quantum well layer made of nGaAs and 10 nm thick InGa
The strained superlattice layer in which five barrier layers made of AsP are alternately laminated is measured by the DLTS method.
【0015】歪超格子層のトラップ濃度は,堆積温度が
600℃以上では一定値に保持されているが,堆積温度
が570℃以下では非発光準位の増加に起因して急増す
る。即ち,歪超格子層は,その種類に応じた臨界温度を
境に,それ以下の堆積温度ではトラップ濃度が増加し,
それより高温の堆積温度ではトラップ濃度が少ないとい
う臨界的な堆積温度が存在するのである。The trap concentration of the strained superlattice layer is maintained at a constant value at a deposition temperature of 600 ° C. or higher, but sharply increases at a deposition temperature of 570 ° C. or lower due to an increase in non-emission level. That is, in the strained superlattice layer, the trap concentration increases at the deposition temperature below the critical temperature corresponding to the type,
There is a critical deposition temperature at which trap concentrations are lower at higher deposition temperatures.
【0016】本発明の構成では,図1を参照して,歪超
格子層4は非発光準位を発生しない高温で,例えば60
0℃以上で堆積され,その後に堆積される光閉じ込め層
5は低温で,例えば570℃以下で堆積される。In the structure of the present invention, referring to FIG. 1, the strained superlattice layer 4 is, for example, 60
The optical confinement layer 5 deposited at 0 ° C. or higher and then deposited is deposited at a low temperature, for example, 570 ° C. or lower.
【0017】かかる構成では,高温で堆積された歪超格
子層4は非発光準位を含まず,他方,その後の堆積層を
低温で堆積することから歪超格子層4の転位密度は少な
いのである。In such a structure, the strained superlattice layer 4 deposited at a high temperature does not include a non-emission level, while the subsequent deposited layers are deposited at a low temperature, the dislocation density of the strained superlattice layer 4 is small. is there.
【0018】即ち,転位は,歪超格子層上に格子定数が
異なる光閉じ込め層がエピタキシャルに成長することに
より応力を発生して導入される。従って,光閉込め層の
成長時の温度が低い本発明の構成では,転位が結晶中に
導入され,伝播するための活性化エネルギーが大きいた
め,転位の発生が抑えられる。That is, dislocations are introduced by generating stress by epitaxially growing optical confinement layers having different lattice constants on the strained superlattice layer. Therefore, in the structure of the present invention in which the temperature during the growth of the light confinement layer is low, the activation energy for introducing and propagating dislocations in the crystal is large, and thus the generation of dislocations is suppressed.
【0019】このため,歪超格子層中の非発光準位密度
及び転位密度は共に少なく,また,歪超格子層の歪を大
きくかつ厚く堆積することができるのである。なお,本
発明は,歪超格子が圧縮及び引張の何れの応力を受ける
場合にも適用されることは言うまでもない。Therefore, both the non-emission level density and the dislocation density in the strained superlattice layer are small, and the strain of the strained superlattice layer can be large and thick. It is needless to say that the present invention is applied to the strained superlattice subject to both compressive and tensile stresses.
【0020】[0020]
【実施例】以下,本発明の詳細を実施例を参照して説明
する。先ず,面方位(100)のn型InP基板1をM
OCVD装置内に置き,615℃に保持する。EXAMPLES The details of the present invention will be described below with reference to examples. First, the n-type InP substrate 1 having a plane orientation (100) is
Place in OCVD equipment and hold at 615 ° C.
【0021】次いで,トリメチルインジュウム(TMI
n)及びPH3 を原料ガスとし,厚さ2000nmのn型
InPをバッファ層2として堆積する。次いで,光導波
層3として,厚さ150nmのn型InGaAsPをTM
In,トリエチルガリウム(TEGa),AsH3 ,及
びPH3 を原料ガスとして堆積する。Then, trimethylindium (TMI
n) and PH 3 are used as source gases, and 2000 nm thick n-type InP is deposited as the buffer layer 2. Then, as the optical waveguide layer 3, TM-type n-type InGaAsP having a thickness of 150 nm is used.
In, triethylgallium (TEGa), AsH 3 , and PH 3 are deposited as source gases.
【0022】次いで,厚さ1.8nmのInGaAsを量
子井戸層とし,厚さ10nmのInGaAsPを障壁層と
して,交互に5層を積層して堆積し,歪超格子層とす
る。次いで, III族元素の化合物ガスの流入を停止して
堆積を中断し,基板温度を降温し570℃に保持する。Next, InGaAsP having a thickness of 1.8 nm is used as a quantum well layer, and InGaAsP having a thickness of 10 nm is used as a barrier layer, and five layers are alternately stacked and deposited to form a strained superlattice layer. Then, the inflow of the compound gas of the group III element is stopped to interrupt the deposition, the substrate temperature is lowered, and the temperature is maintained at 570 ° C.
【0023】再び, III族元素の化合物ガスを流入し
て,厚さ150nmのp型InGaAsPを光閉込め層5
として堆積する。次いで,コンタクト層6として,厚さ
450nmのInPを堆積して,光半導体装置に用いる化
合物半導体結晶が製造される。Again, the compound gas of the group III element is flowed in to p-type InGaAsP having a thickness of 150 nm into the optical confinement layer 5.
To be deposited as. Next, InP having a thickness of 450 nm is deposited as the contact layer 6 to manufacture a compound semiconductor crystal used in an optical semiconductor device.
【0024】図3は本発明の効果説明図であり,本発明
の実施例により製造された化合物半導体のPL発光特性
を表している。図3(a)は4.2KにおけるPL発光
スペクトルであり,図中Aは本実施例により製造された
化合物半導体について,aは堆積温度を615℃とする
従来の方法により製造された化合物半導体についてのも
のを表している。FIG. 3 is an explanatory view of the effects of the present invention, showing the PL emission characteristics of the compound semiconductors manufactured according to the examples of the present invention. FIG. 3 (a) is a PL emission spectrum at 4.2K, where A is the compound semiconductor manufactured by this example, and a is the compound semiconductor manufactured by the conventional method with a deposition temperature of 615 ° C. It represents the thing.
【0025】なお,比較されている従来例は堆積温度を
除き,成長条件及び半導体の種類及び構造は同一であ
る。また,励起光としてKrレーザ光を用い,試料を液
体ヘリウムに浸漬して測定している。The conventional examples being compared have the same growth conditions and the same semiconductor type and structure except for the deposition temperature. Further, Kr laser light is used as excitation light, and the sample is immersed in liquid helium for measurement.
【0026】従来の方法で製造されたものは,発光スペ
クトルが分裂し,歪超格子層に転位が導入されて歪超格
子層の一部に応力緩和が発生したことを示している。こ
れに対して,本実施例例によるものは,かかる発光スペ
クトルの分裂は僅かに認められる程度であり,歪超格子
層に転位が発生,伝播し難いことを明白に示している。Those manufactured by the conventional method show that the emission spectrum was split, dislocations were introduced into the strained superlattice layer, and stress relaxation occurred in a part of the strained superlattice layer. On the other hand, according to the present example, the splitting of the emission spectrum is slightly observed, and it is clearly shown that dislocations are hard to occur and propagate in the strained superlattice layer.
【0027】次に,図3(b)は室温におけるPL発光
スペクトルであり,図中Aは本実施例により製造された
化合物半導体について,aは堆積温度を570℃とする
従来の方法により製造された化合物半導体についてのも
のを表している。Next, FIG. 3 (b) is a PL emission spectrum at room temperature. In the figure, A is the compound semiconductor manufactured by this example, and a is a conventional method in which the deposition temperature is 570.degree. It represents a compound semiconductor.
【0028】なお,比較されている従来例は堆積温度を
除き,成長条件及び半導体の種類及び構造は同一であ
る。図3(b)から,本実施例にかかる化合物半導体の
PL発光強度は,従来のものの略2倍である。この発光
強度の差は,従来のものは非発光準位を含むために生じ
たものであり,本発明にかかる化合物半導体の非発光準
位が少ないことを明らかにしている。The conventional examples to be compared have the same growth condition and the same kind and structure of semiconductor except the deposition temperature. From FIG. 3B, the PL emission intensity of the compound semiconductor according to this example is about twice that of the conventional one. This difference in emission intensity is caused because the conventional one contains a non-emission level, and it is clarified that the non-emission level of the compound semiconductor according to the present invention is small.
【0029】上記の如く,本発明にかかる歪超格子層
は,非発光準位が少なくかつ転位による応力緩和も少な
い。従って,従来より大きな歪とすることができ,また
歪超格子層を厚くすることもできる。As described above, the strained superlattice layer according to the present invention has few non-emission levels and less stress relaxation due to dislocations. Therefore, the strain can be made larger than before, and the strained superlattice layer can be thickened.
【0030】[0030]
【発明の効果】本発明によると,歪超格子層を高温で堆
積したのち,その上に光閉込め層を低温で成長すること
により,歪超格子層中の非発光準位の発生を防止しかつ
転位の導入,伝播を防止することができるので,非発光
準位及び転位が共に少なく,大きな歪を有する厚い歪超
格子層を堆積することができるから,スペクトル幅が狭
くかつ発光効率の良い光半導体装置の製造方法を提供す
ることができ,光応用機器の性能向上に寄与するところ
が大きい。According to the present invention, the strained superlattice layer is deposited at a high temperature, and then the light confinement layer is grown on the strained superlattice layer at a low temperature to prevent the generation of the non-emission level in the strained superlattice layer. In addition, since it is possible to prevent the introduction and propagation of dislocations, it is possible to deposit a thick strained superlattice layer having a large amount of strain, with a small number of non-emission levels and dislocations. It is possible to provide a good manufacturing method of an optical semiconductor device, which largely contributes to performance improvement of optical application equipment.
【図1】 本発明の実施例断面図FIG. 1 is a sectional view of an embodiment of the present invention.
【図2】 本発明の原理説明図FIG. 2 is an explanatory diagram of the principle of the present invention.
【図3】 本発明の効果説明図FIG. 3 is an explanatory diagram of the effect of the present invention.
1 基板 2 バッファ層 3 光導波層 4 歪超格子層 4a 量子井戸層 4b 障壁層 5 光閉込め層 6 コンタクト層 1 substrate 2 buffer layer 3 optical waveguide layer 4 strained superlattice layer 4a quantum well layer 4b barrier layer 5 optical confinement layer 6 contact layer
Claims (2)
導波層(3),歪超格子層(4),及び光閉込め層
(5)とを順に堆積する工程とを有し, 該光閉込め層(5)を該歪超格子層(4)の堆積温度よ
り低温で堆積することを特徴とする光半導体装置の製造
方法。1. A step of sequentially depositing an optical waveguide layer (3) made of a compound semiconductor single crystal, a strained superlattice layer (4), and an optical confinement layer (5) on a substrate. A method for manufacturing an optical semiconductor device, comprising depositing a confinement layer (5) at a temperature lower than a deposition temperature of the strained superlattice layer (4).
において, InGaAsPを堆積して該光導波層(3)を形成する
工程と, 600℃〜700℃の堆積温度でInGaAsからなる
量子井戸層(4a)とInGaAsPからなる障壁層
(4b)とを交互に積層して該歪超格子層(4)を形成
する工程と, 600℃未満の堆積温度でInGaAsPを堆積して該
光閉込め層(5)を形成する工程とを有することを特徴
とする光半導体装置の製造方法。2. The method for manufacturing an optical semiconductor device according to claim 1, wherein the step of depositing InGaAsP to form the optical waveguide layer (3), and the quantum well made of InGaAs at a deposition temperature of 600 ° C. to 700 ° C. Layer (4a) and barrier layer (4b) made of InGaAsP are alternately laminated to form the strained superlattice layer (4), and InGaAsP is deposited at a deposition temperature of less than 600 ° C. to confine the light. And a step of forming a layer (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14776992A JPH05343738A (en) | 1992-06-09 | 1992-06-09 | Manufacture of optical semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14776992A JPH05343738A (en) | 1992-06-09 | 1992-06-09 | Manufacture of optical semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05343738A true JPH05343738A (en) | 1993-12-24 |
Family
ID=15437765
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14776992A Withdrawn JPH05343738A (en) | 1992-06-09 | 1992-06-09 | Manufacture of optical semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05343738A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0745909A (en) * | 1993-07-29 | 1995-02-14 | Nec Corp | Vapor growth method for deformation quantum well semiconductor lasor |
| US5694410A (en) * | 1996-03-01 | 1997-12-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor laser device |
| CN1297016C (en) * | 1997-01-09 | 2007-01-24 | 日亚化学工业株式会社 | Nitride semiconductor device |
-
1992
- 1992-06-09 JP JP14776992A patent/JPH05343738A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0745909A (en) * | 1993-07-29 | 1995-02-14 | Nec Corp | Vapor growth method for deformation quantum well semiconductor lasor |
| US5694410A (en) * | 1996-03-01 | 1997-12-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor laser device |
| CN1297016C (en) * | 1997-01-09 | 2007-01-24 | 日亚化学工业株式会社 | Nitride semiconductor device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990831 |