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JPH0567599A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0567599A
JPH0567599A JP25576891A JP25576891A JPH0567599A JP H0567599 A JPH0567599 A JP H0567599A JP 25576891 A JP25576891 A JP 25576891A JP 25576891 A JP25576891 A JP 25576891A JP H0567599 A JPH0567599 A JP H0567599A
Authority
JP
Japan
Prior art keywords
semiconductor device
chip
cutting
package
cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25576891A
Other languages
Japanese (ja)
Inventor
Yasuo Yamaguchi
泰雄 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP25576891A priority Critical patent/JPH0567599A/en
Publication of JPH0567599A publication Critical patent/JPH0567599A/en
Pending legal-status Critical Current

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  • Dicing (AREA)

Abstract

(57)【要約】 【目的】 半導体装置をウエアから切断する際に発生す
るカケやクラック等の損傷部分を除く。 【構成】 半導体装置を切り出した後、切断面の損傷部
分を機械的研磨により除去する。 【効果】 パッケージとの接着力やチップ強度が増大
し、各種ストレスに対して強化され、品質の信頼性、長
寿命化が図れる。
(57) [Summary] [Purpose] Excludes damaged parts such as chips and cracks that occur when cutting semiconductor devices from wear. [Structure] After cutting out a semiconductor device, a damaged portion of a cut surface is removed by mechanical polishing. [Effect] The adhesive force with the package and the chip strength are increased, and the chip is strengthened against various stresses, and reliability of quality and long life can be achieved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は半導体装置の製造方法
に関し、特に半導体装置を形成したウェハより各半導体
装置を切り出す方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of cutting each semiconductor device from a wafer on which a semiconductor device is formed.

【0002】[0002]

【従来の技術】図2(a),(b) は従来の半導体装置をウェ
ハより切り出す方法を示す図である。図において、1は
半導体装置(3a,3b,3c,…)が複数個形成され
たウェハ状態の半導体基板、4は半導体装置(3a,3
b,3c,…)をウェハ1より切り出すダイシングソ
ー、5はダイシングソー4により切られた溝である。
2. Description of the Related Art FIGS. 2A and 2B are views showing a conventional method for cutting a semiconductor device from a wafer. In the figure, 1 is a semiconductor substrate in a wafer state on which a plurality of semiconductor devices (3a, 3b, 3c, ...) Are formed, and 4 is a semiconductor device (3a, 3c).
b), 3c, ...) Are cut from the wafer 1 by dicing saws 5 are grooves cut by the dicing saw 4.

【0003】次に半導体装置をウェハより切り出す方法
について説明する。半導体装置(3a,3b,3c,
…)が多数個形成されたウェハ1はダイシングソー4等
により半導体装置間が溝状に掘られる。
Next, a method of cutting a semiconductor device from a wafer will be described. Semiconductor devices (3a, 3b, 3c,
..) are formed in a groove shape between the semiconductor devices by a dicing saw 4 or the like.

【0004】半導体装置(3a,3b,3c,…)の切
り離しは切断面の溝5を完全に切断するまで深く掘る
か、もしくは途中まで掘った後、ウェハ1を溝5に沿っ
て分割することによりなされる。こうして個々に分割さ
れた半導体装置はパッケージに実装される。
The semiconductor devices (3a, 3b, 3c, ...) Are cut off by digging deeply until the groove 5 on the cut surface is completely cut, or after halfway digging, the wafer 1 is divided along the groove 5. Made by The thus-divided semiconductor devices are mounted in a package.

【0005】[0005]

【発明が解決しようとする課題】従来の半導体装置は以
上のようにして切断されるため、ダイシングソーで切断
された半導体装置の切断面周辺に損傷を与え、クラック
や割れが発生しやすい。
Since the conventional semiconductor device is cut as described above, the semiconductor device cut by the dicing saw is liable to be damaged around the cut surface thereof, and cracks or breaks easily occur.

【0006】図3は半導体装置3とパッケージ7の接合
部の一部断面図である。9は切断時に発生したカケやク
ラックである。特に半導体装置3とパッケージ7が図3
で示したように接着されている場合は、半導体装置3の
周辺部のカケやクラックは接着力やチップ強度の低下を
招き、熱サイクルや振動,衝撃等のストレスを受けた時
は半導体装置のはがれや破壊が発生する。
FIG. 3 is a partial cross-sectional view of the joint between the semiconductor device 3 and the package 7. 9 is a chip or a crack generated during cutting. In particular, the semiconductor device 3 and the package 7 are shown in FIG.
In the case where the semiconductor device 3 is bonded as shown in FIG. 2, chipping or cracking in the peripheral portion of the semiconductor device 3 causes a decrease in adhesive force and chip strength, and when stress such as heat cycle, vibration, or shock is applied, Peeling or destruction occurs.

【0007】この発明は上記のような問題点を解消する
ためになされたもので、切断時に発生するカケやクラッ
クをなくすることのできる半導体装置の製造方法を得る
ことを目的とする。
The present invention has been made to solve the above problems, and an object of the present invention is to obtain a method of manufacturing a semiconductor device capable of eliminating cracks and cracks generated during cutting.

【0008】[0008]

【課題を解決するための手段】この発明に係る半導体装
置の製造方法は、半導体装置をウエアより切り出した
後、チップの切断面の損傷部分を機械的に研磨し、これ
により、ダイシングソー等により切断した際に発生した
切断面の損傷部分を除去するようにしたものである。
According to the method of manufacturing a semiconductor device of the present invention, after the semiconductor device is cut out from the wear, the damaged portion of the cut surface of the chip is mechanically polished, whereby a dicing saw or the like is used. This is designed to remove the damaged portion of the cut surface generated when cutting.

【0009】[0009]

【作用】この発明における半導体装置の製造方法では、
切断面の損傷部分を機械的研磨により除去することによ
り、カケやクラックがなくなり、パッケージとの接着力
やチップ強度が増大し、熱サイクルや振動,衝撃等の繰
り返し加えられるストレスに対して長寿命化が図れる。
According to the method of manufacturing the semiconductor device of the present invention,
By removing the damaged part of the cut surface by mechanical polishing, chipping and cracks are eliminated, the adhesive strength with the package and the chip strength are increased, and the life is long against repeated stress such as heat cycle, vibration and impact. Can be realized.

【0010】[0010]

【実施例】以下、この発明の一実施例を図について説明
する。図1(a),(b),(c) はこの発明の一実施例による半
導体装置の製造方法を示し、図1(a),(b) は従来の図2
(a),(b) と同じである。図1において、1は複数個の半
導体装置が形成されたウェハ状態の半導体基板、2は半
導体装置の表面と裏面に形成された保護膜、3a,3
b,3cは半導体装置のチップ、5はダイシングソー4
により掘られた溝であり、6は研磨装置である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 (a), 1 (b) and 1 (c) show a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS.
Same as (a) and (b). In FIG. 1, 1 is a semiconductor substrate in a wafer state in which a plurality of semiconductor devices are formed, 2 is a protective film formed on the front and back surfaces of the semiconductor device, 3a, 3
b and 3c are semiconductor device chips, 5 is a dicing saw 4
Is a groove dug by, and 6 is a polishing device.

【0011】次にその製造方法について説明する。ま
ず、従来法に従って半導体装置が形成された半導体基板
1の両面に保護膜をつけ、次に半導体装置(3a,3
b,3c)の間の切断部(ダイシングライン)の保護膜
を除去する(図1(a))。次に、ダイシングラインをダイ
シングソー4により溝状に掘る。半導体装置(3a,3
b,3c)の切り離しは切断面の溝5を完全に切断する
か、もしくは適度の深さまで掘った後、ウェハ1を溝に
沿って分割することによりなされる(図1(b))。ついで
個々に分割されたチップ3を、研磨装置6による機械的
研磨により切断時に切断面周辺に発生した損傷部分を除
去し(図1(c),(d))、その後、パッケージに実装する。
Next, the manufacturing method thereof will be described. First, protective films are provided on both surfaces of the semiconductor substrate 1 on which the semiconductor device is formed according to the conventional method, and then the semiconductor device (3a, 3a
The protective film of the cut portion (dicing line) between the portions (b, 3c) is removed (FIG. 1 (a)). Next, the dicing line is dug in a groove shape with the dicing saw 4. Semiconductor device (3a, 3
b, 3c) is cut off by completely cutting the groove 5 on the cut surface or by digging to a proper depth and then dividing the wafer 1 along the groove (FIG. 1 (b)). Then, the individually divided chips 3 are mechanically polished by a polishing device 6 to remove the damaged portion generated around the cut surface at the time of cutting (FIGS. 1C and 1D), and then mounted in a package.

【0012】このような本実施例では、チップの切り離
し時に発生した損傷部分を機械的研磨により除去するよ
うにしたので、チップ周辺のカケやクラックがなくな
り、パッケージとの接着力やチップ強度が増大し、熱サ
イクルや振動,衝撃等の繰り返し加えられるストレスに
対して長寿命化を図ることができる。なお、上記実施例
では半導体装置の切断にダイシングソーを用いた場合に
ついて述べたが、これはレーザカットや超音波切断等の
他の手段を用いてもよい。
In this embodiment, since the damaged portion generated at the time of separating the chip is removed by mechanical polishing, chipping and cracks around the chip are eliminated, and the adhesive force with the package and the chip strength are increased. However, it is possible to prolong the service life against repeated stress such as heat cycle, vibration, and shock. Although a dicing saw is used for cutting the semiconductor device in the above embodiment, other means such as laser cutting or ultrasonic cutting may be used.

【0013】[0013]

【発明の効果】以上のように、この発明によれば、チッ
プの切り離し時に発生した損傷部分を機械的研磨により
除去するようにしたので、チップ周辺のカケやクラック
がなくなり、パッケージとの接着力やチップ強度が増大
し、熱サイクルや振動,衝撃等の繰り返し加えられるス
トレスに対して長寿命化が図れる効果がある。
As described above, according to the present invention, since the damaged portion generated at the time of separating the chip is removed by mechanical polishing, chipping and cracks around the chip are eliminated and the adhesive force to the package is improved. It also has the effect of increasing the chip strength and prolonging the service life against repeated stress such as heat cycle, vibration and shock.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例による半導体装置の製造工
程を示す断面図である。
FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor device according to an embodiment of the present invention.

【図2】従来の半導体装置をウェハより切り出す工程を
示す断面図である。
FIG. 2 is a cross-sectional view showing a step of cutting a conventional semiconductor device from a wafer.

【図3】従来の方法の半導体装置とパッケージの接合部
の一部断面図である。
FIG. 3 is a partial cross-sectional view of a junction between a semiconductor device and a package according to a conventional method.

【符号の説明】 1 半導体基板 2 保護膜 3 半導体装置 4 ダンシングソー 5 切断部溝 6 研磨装置 7 パッケージ 8 接着剤 9 カケ,クラック[Explanation of symbols] 1 semiconductor substrate 2 protective film 3 semiconductor device 4 dancing saw 5 cut groove 6 polishing device 7 package 8 adhesive 9 chip, crack

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上に形成された複数個の半導
体装置を切り出す工程と、 上記半導体装置の切断面の損傷部分を機械的研磨により
除去する工程とを含むことを特徴とする半導体装置の製
造方法。
1. A semiconductor device comprising: a step of cutting out a plurality of semiconductor devices formed on a semiconductor substrate; and a step of removing a damaged portion of a cut surface of the semiconductor device by mechanical polishing. Production method.
JP25576891A 1991-09-06 1991-09-06 Manufacture of semiconductor device Pending JPH0567599A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25576891A JPH0567599A (en) 1991-09-06 1991-09-06 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25576891A JPH0567599A (en) 1991-09-06 1991-09-06 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0567599A true JPH0567599A (en) 1993-03-19

Family

ID=17283353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25576891A Pending JPH0567599A (en) 1991-09-06 1991-09-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0567599A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6127245A (en) * 1997-02-04 2000-10-03 Micron Technology, Inc. Grinding technique for integrated circuits
JP2003526216A (en) * 2000-03-10 2003-09-02 シュラムバーガー システムズ Reinforced integrated circuit
JP2005086160A (en) * 2003-09-11 2005-03-31 Disco Abrasive Syst Ltd Wafer processing method
CN114953009A (en) * 2022-04-13 2022-08-30 日善电脑配件(嘉善)有限公司 Cutting device capable of prolonging service life of cutter

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6127245A (en) * 1997-02-04 2000-10-03 Micron Technology, Inc. Grinding technique for integrated circuits
US6215172B1 (en) 1997-02-04 2001-04-10 Micron Technology, Inc. Grinding technique for integrated circuits
JP2003526216A (en) * 2000-03-10 2003-09-02 シュラムバーガー システムズ Reinforced integrated circuit
JP2005086160A (en) * 2003-09-11 2005-03-31 Disco Abrasive Syst Ltd Wafer processing method
CN114953009A (en) * 2022-04-13 2022-08-30 日善电脑配件(嘉善)有限公司 Cutting device capable of prolonging service life of cutter
CN114953009B (en) * 2022-04-13 2023-06-06 日善电脑配件(嘉善)有限公司 Cutting device capable of prolonging service life of cutter

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