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JPH0595373A - Multi-link control system - Google Patents

Multi-link control system

Info

Publication number
JPH0595373A
JPH0595373A JP3253299A JP25329991A JPH0595373A JP H0595373 A JPH0595373 A JP H0595373A JP 3253299 A JP3253299 A JP 3253299A JP 25329991 A JP25329991 A JP 25329991A JP H0595373 A JPH0595373 A JP H0595373A
Authority
JP
Japan
Prior art keywords
line
memory
data
transmission
multilink
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3253299A
Other languages
Japanese (ja)
Other versions
JP2798534B2 (en
Inventor
Mitsunori Ibata
光則 井畑
Yutaka Shiina
豊 椎名
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd filed Critical NEC Corp
Priority to JP3253299A priority Critical patent/JP2798534B2/en
Publication of JPH0595373A publication Critical patent/JPH0595373A/en
Application granted granted Critical
Publication of JP2798534B2 publication Critical patent/JP2798534B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To use a multi-link procedure with a line configuration for which a delay and a profltability are considered. CONSTITUTION:A through put value memory 301 stores the quantity of transmission and reception data between multi-links in a multi-link procedure counted and stored by a quantity of transmission and reception data counter memory 300. A line quality value memory 201 stores the number of times of error each line counted and stored by an error counter memory 200. Based on the data stored in the through put value memories 301, 302 and the line quality value memory 201, an optimum line constitution is selected from multi- link lines 100, 101, 102, the data transmission and reception ratio of each line is stored in a data transmission ratio memory 400 and a packet switchboard A performs a multi-link control in accordance with this transmission and reception ratio and the selected circuitry.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はパケット交換機における
マルチリンク制御方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilink control system in a packet switch.

【0002】[0002]

【従来の技術】従来、パケット交換機におけるマルチリ
ンク制御では、決められた回線構成の中で各回線のスル
ープットと回線品質を推定し、各回線の送受信データの
比率をあらかじめ固定的に定めていた。
2. Description of the Related Art Conventionally, in multi-link control in a packet switch, the throughput and line quality of each line are estimated within a predetermined line configuration, and the ratio of transmitted / received data of each line is fixed in advance.

【0003】[0003]

【発明が解決しようとする課題】上述した従来のマルチ
リンク制御方式では、マルチリンクを通る送受信データ
量と構成する回線の品質に関係なく、固定的規則の中で
運用されるためデータ量が少なく、マルチリンク内の最
大回線数を使用する必要のない場合やマルチリンクを構
成する回線の内、一本でも品質の悪い回線を使用すると
データの持ち合わせが生じ、マルチリンクの方がシング
ルリンクより伝送効率が極端に低下するという欠点があ
る。
In the above-mentioned conventional multi-link control system, the data amount is small because it is operated under the fixed rule regardless of the amount of transmitted / received data passing through the multi-link and the quality of the constructed line. , If it is not necessary to use the maximum number of lines in a multilink, or if one of the lines that make up a multilink is of poor quality, data will be mixed up and the multilink will transmit more than the single link. There is a drawback that the efficiency is extremely reduced.

【0004】[0004]

【課題を解決するための手段】本発明のマルチリンク制
御方式は、マルチリンク手順におけるマルチリンク間で
の送受信データ量を記憶するための第1の記憶手段と、
前記マルチリンクを構成する各回線毎にエラー回数を記
憶するための第2の記憶手段とをパケット交換機に備
え、前記第1及び第2の記憶手段にそれぞれ記憶された
データから得られる一定時間における送受信データ量及
びエラー回数に基づき、前記マルチリンク内の回線構成
と各回線データ送受信比率とを最適値に自動選択する構
成である。
A multilink control system according to the present invention comprises first storage means for storing the amount of data transmitted and received between multilinks in a multilink procedure.
The packet switch is provided with a second storage unit for storing the number of errors for each line constituting the multi-link, and at a constant time obtained from the data stored in each of the first and second storage units. This is a configuration in which the line configuration in the multi-link and each line data transmission / reception ratio are automatically selected to optimum values based on the amount of transmitted / received data and the number of errors.

【0005】[0005]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0006】図1(a)は本発明を説明するためのパケ
ット交換機のシステム構成図であり、パケット交換機
A,Bの間に、n本の回線で構成されるマルチリンク回
線が存在する。本例では、100〜102の3回線を例
に説明する。図1(b)は本発明の一実施例を示すブロ
ック図であり、図に示す各メモリはパケット交換機A,
Bにそれぞれ設けられる。
FIG. 1A is a system configuration diagram of a packet switch for explaining the present invention, in which a multilink line constituted by n lines exists between the packet switches A and B. In this example, three lines 100 to 102 will be described as an example. FIG. 1B is a block diagram showing an embodiment of the present invention. Each memory shown in the drawing is a packet switch A,
B respectively.

【0007】以下にパケット交換機Aが発信したときの
動作を説明する。
The operation when the packet switch A makes a call will be described below.

【0008】パケット交換機Aは、エラー発生回数をマ
ルチリンク内回線100,101,102の各回線毎に
エラーカウンタメモリ200に記憶し、一定時間でのエ
ラー数から回線品質値を回線品質値メモリ201に記憶
する。また、マルチリンク間の送受信データ量を送受信
データ量カウンタメモリ300に記憶し、一定時間での
スループット値をスループット値メモリ301に記憶す
る。
The packet switch A stores the number of error occurrences in the error counter memory 200 for each of the lines 100, 101, 102 in the multilink, and the line quality value memory 201 stores the line quality value from the number of errors in a fixed time. Remember. Further, the transmission / reception data amount between the multilinks is stored in the transmission / reception data amount counter memory 300, and the throughput value at a fixed time is stored in the throughput value memory 301.

【0009】次に、マルチリンク内の各回線毎のスルー
プット値を記憶したマルチリンク内回線スループットメ
モリ302とマルチリンク全体のスループット値メモリ
301とを比較し、回線組み合わせを選択する。回線品
質値メモリ201と回線組み合わせを照合し、伝送効率
の最も良いと思われる、組合わせを選択する。
Next, the intra-multilink line throughput memory 302 storing the throughput value for each line in the multilink is compared with the throughput value memory 301 for the entire multilink to select a line combination. The line quality value memory 201 is compared with the line combination, and the combination that seems to have the best transmission efficiency is selected.

【0010】そして、選択された組合わせの回線に対
し、品質とスループットからデータ量比率を計算し、値
をデータ送信比率メモリ400に記憶し、その比率通り
に制御を行う。
Then, the data amount ratio is calculated from the quality and the throughput for the selected combination of lines, the value is stored in the data transmission ratio memory 400, and the control is performed according to the ratio.

【0011】例えば、最初は規定通り、マルチリンク内
全回線を使用してデータ送受信を行い、スループット値
メモリ301に70kbpsと設定され、回線品質値メ
モリ201に回線100:101:102に対し、1×
10-7:1×10-5:1×10-7と設定された。各回線
のスループット値メモリ302は、回線100:10
1:102に対し、64kbps:64kbps:1
9.2kbpsであった時、最適値組み合わせは、回線
100:102の2本を選択し、データ送信比率は、回
線100:101:102に対し、スループット値メモ
リ302から、データ送信比率メモリ400に10:
0:3を記憶させる。
For example, at first, as specified, data transmission / reception is performed using all lines in the multilink, the throughput value memory 301 is set to 70 kbps, and the line quality value memory 201 is set to 1 for lines 100: 101: 102. ×
It was set to 10 −7 : 1 × 10 −5 : 1 × 10 −7 . The throughput value memory 302 of each line is the line 100: 10.
64 kbps: 64 kbps: 1 against 1: 102
When it is 9.2 kbps, the optimum value combination selects two lines 100: 102, and the data transmission ratio is from the throughput value memory 302 to the data transmission ratio memory 400 for the lines 100: 101: 102. 10:
Memorize 0: 3.

【0012】[0012]

【発明の効果】以上説明したように本発明は、マルチリ
ンク内の回線へのデータ送受信比率を、マルチリンク全
体のデータ量と各回線の回線品質に応じて自動選択する
ように構成したので、マルチリンク手順で欠点となる遅
延を極力さけることができ、特に専用線,公衆網混在の
ように回線品質に差がある場合には、公衆網を極力使用
せず、スループットオーバーの時にのみ使用するなど、
遅延並びに経済性を考慮した回線構成でマルチリンク手
順を使用できるという効果がある。
As described above, according to the present invention, the data transmission / reception ratio to the lines in the multilink is automatically selected according to the data amount of the entire multilink and the line quality of each line. It is possible to avoid the delay which is a drawback in the multilink procedure as much as possible. Especially when there is a difference in line quality such as a leased line and public network, the public network is not used as much as possible, and it is used only when the throughput is over. Such,
There is an effect that the multilink procedure can be used in the line configuration in consideration of delay and economy.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は本発明の一実施例を説明するためのパ
ケット交換機のスシテム構成図である。(b)は本発明
の一実施例を示すブロック図である。
FIG. 1A is a system configuration diagram of a packet switch for explaining an embodiment of the present invention. (B) is a block diagram showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

A,B パケット交換機 100,101,102 マルチリンク内回線 200 エラーカウンタメモリ 201 回線品質値メモリ 300 送受信データ量カウンタメモリ 301 スループット値メモリ 302 マルチリンク内回線スループットメモリ 400 データ送信比率メモリ A, B Packet switch 100, 101, 102 Multi-link intra-line 200 Error counter memory 201 Line quality value memory 300 Transmission / reception data amount counter memory 301 Throughput value memory 302 Multi-link intra-line throughput memory 400 Data transmission ratio memory

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 マルチリンク手順におけるマルチリンク
間での送受信データ量を記憶するための第1の記憶手段
と、前記マルチリンクを構成する各回線毎にエラー回数
を記憶するための第2の記憶手段とをパケット交換機に
備え、前記第1及び第2の記憶手段にそれぞれ記憶され
たデータから得られる一定時間における送受信データ量
及びエラー回数に基づき、前記マルチリンク内の回線構
成と各回線のデータ送受信比率とを最適値に自動選択す
ることを特徴とするマルチリンク制御方式。
1. A first storage means for storing a transmission / reception data amount between multilinks in a multilink procedure, and a second storage for storing an error count for each line constituting the multilink. Means in a packet switch, and based on the amount of transmitted / received data and the number of errors in a fixed time obtained from the data stored in the first and second storage means, the line configuration in the multilink and the data of each line A multi-link control method characterized by automatically selecting the transmission / reception ratio to the optimum value.
JP3253299A 1991-10-01 1991-10-01 Multi-link control method Expired - Fee Related JP2798534B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3253299A JP2798534B2 (en) 1991-10-01 1991-10-01 Multi-link control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3253299A JP2798534B2 (en) 1991-10-01 1991-10-01 Multi-link control method

Publications (2)

Publication Number Publication Date
JPH0595373A true JPH0595373A (en) 1993-04-16
JP2798534B2 JP2798534B2 (en) 1998-09-17

Family

ID=17249361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3253299A Expired - Fee Related JP2798534B2 (en) 1991-10-01 1991-10-01 Multi-link control method

Country Status (1)

Country Link
JP (1) JP2798534B2 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006229328A (en) * 2005-02-15 2006-08-31 Mitsubishi Electric Corp Multi-path multi-hop wireless LAN system
JP2007104054A (en) * 2005-09-30 2007-04-19 Oki Electric Ind Co Ltd Data communication device, data communication method, and data communication program
JP2007194929A (en) * 2006-01-19 2007-08-02 Matsushita Electric Ind Co Ltd Communication apparatus and communication method
KR100767225B1 (en) * 2003-05-22 2007-10-17 닛본 덴끼 가부시끼가이샤 Data communication system, communication device, and computer-readable storage medium having communication program recorded thereon
JP2008109327A (en) * 2006-10-25 2008-05-08 Hitachi Communication Technologies Ltd Data transmission method, data transmission apparatus, and data transmission system for performing multilink bundle control
JP2008172656A (en) * 2007-01-15 2008-07-24 Railway Technical Res Inst Line control system and method
JP2011109471A (en) * 2009-11-18 2011-06-02 Oki Electric Industry Co Ltd Communication path control apparatus, and communication path control method
JP2011199884A (en) * 2011-05-12 2011-10-06 Railway Technical Research Institute Line control system and method therefor
JP2013038719A (en) * 2011-08-10 2013-02-21 Mega Chips Corp Semiconductor integrated circuit, communication device, communication system and communication method
JP2018522481A (en) * 2015-07-28 2018-08-09 サイトリックス システムズ,インコーポレイテッド Efficient use of IPSEC tunnels in multipath environments

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6064551A (en) * 1983-09-19 1985-04-13 Hitachi Ltd Frame distribution method in data transmission equipment
JPH0345051A (en) * 1989-07-13 1991-02-26 Fujitsu Ltd Multi-link system
JPH03250945A (en) * 1990-02-28 1991-11-08 Fujitsu Ltd Frame transmission allocation method
JPH03272241A (en) * 1990-03-20 1991-12-03 Nec Corp Line selection system in multi-link
JPH0410839A (en) * 1990-04-27 1992-01-16 Nec Corp Multi-link procedure control system
JPH04367137A (en) * 1991-06-14 1992-12-18 Nec Corp Multi link procedure control system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6064551A (en) * 1983-09-19 1985-04-13 Hitachi Ltd Frame distribution method in data transmission equipment
JPH0345051A (en) * 1989-07-13 1991-02-26 Fujitsu Ltd Multi-link system
JPH03250945A (en) * 1990-02-28 1991-11-08 Fujitsu Ltd Frame transmission allocation method
JPH03272241A (en) * 1990-03-20 1991-12-03 Nec Corp Line selection system in multi-link
JPH0410839A (en) * 1990-04-27 1992-01-16 Nec Corp Multi-link procedure control system
JPH04367137A (en) * 1991-06-14 1992-12-18 Nec Corp Multi link procedure control system

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100767225B1 (en) * 2003-05-22 2007-10-17 닛본 덴끼 가부시끼가이샤 Data communication system, communication device, and computer-readable storage medium having communication program recorded thereon
US8565227B2 (en) 2003-05-22 2013-10-22 Nec Corporation Mobile IP data communication system comprising a mobile router that detects a change in connection status
JP2006229328A (en) * 2005-02-15 2006-08-31 Mitsubishi Electric Corp Multi-path multi-hop wireless LAN system
JP2007104054A (en) * 2005-09-30 2007-04-19 Oki Electric Ind Co Ltd Data communication device, data communication method, and data communication program
US8144845B2 (en) 2006-01-19 2012-03-27 Panasonic Corporation Communication apparatus and communication method
JP2007194929A (en) * 2006-01-19 2007-08-02 Matsushita Electric Ind Co Ltd Communication apparatus and communication method
JP2008109327A (en) * 2006-10-25 2008-05-08 Hitachi Communication Technologies Ltd Data transmission method, data transmission apparatus, and data transmission system for performing multilink bundle control
JP2008172656A (en) * 2007-01-15 2008-07-24 Railway Technical Res Inst Line control system and method
JP2011109471A (en) * 2009-11-18 2011-06-02 Oki Electric Industry Co Ltd Communication path control apparatus, and communication path control method
JP2011199884A (en) * 2011-05-12 2011-10-06 Railway Technical Research Institute Line control system and method therefor
JP2013038719A (en) * 2011-08-10 2013-02-21 Mega Chips Corp Semiconductor integrated circuit, communication device, communication system and communication method
JP2018522481A (en) * 2015-07-28 2018-08-09 サイトリックス システムズ,インコーポレイテッド Efficient use of IPSEC tunnels in multipath environments
US10992709B2 (en) 2015-07-28 2021-04-27 Citrix Systems, Inc. Efficient use of IPsec tunnels in multi-path environment

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