JPH06169070A - Application method of ferroelectric memory element - Google Patents
Application method of ferroelectric memory elementInfo
- Publication number
- JPH06169070A JPH06169070A JP43A JP34144792A JPH06169070A JP H06169070 A JPH06169070 A JP H06169070A JP 43 A JP43 A JP 43A JP 34144792 A JP34144792 A JP 34144792A JP H06169070 A JPH06169070 A JP H06169070A
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- Prior art keywords
- electrodes
- ferroelectric
- memory cell
- spontaneous polarization
- polarization
- Prior art date
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- 238000000034 method Methods 0.000 title description 13
- 230000010287 polarization Effects 0.000 claims abstract description 42
- 230000002269 spontaneous effect Effects 0.000 claims abstract description 29
- 238000009413 insulation Methods 0.000 claims abstract description 8
- 239000000126 substance Substances 0.000 claims description 7
- 238000003860 storage Methods 0.000 claims description 6
- 230000009467 reduction Effects 0.000 abstract description 2
- 230000005684 electric field Effects 0.000 description 12
- 239000010409 thin film Substances 0.000 description 11
- 230000008859 change Effects 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 230000035939 shock Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000028161 membrane depolarization Effects 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
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Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、強誘電体メモリ素子の
使用方法に関する。具体的にいうと、本発明は、強誘電
体の自発分極の方向の正逆によって情報を記憶する強誘
電体メモリ素子の使用方法に関する。FIELD OF THE INVENTION The present invention relates to a method of using a ferroelectric memory device. Specifically, the present invention relates to a method of using a ferroelectric memory device that stores information by reversing the direction of spontaneous polarization of a ferroelectric substance.
【0002】[0002]
【背景技術】従来より、高集積不揮発性メモリ素子とし
て強誘電体メモリ素子が検討されている。強誘電体メモ
リ素子は通常は複数のメモリセルを備えており、メモリ
セルは強誘電体薄板及び強誘電体薄板を挟んで形成され
た一対の電極から構成されている。BACKGROUND ART A ferroelectric memory device has been studied as a highly integrated nonvolatile memory device. A ferroelectric memory device usually includes a plurality of memory cells, and the memory cell is composed of a ferroelectric thin plate and a pair of electrodes formed by sandwiching the ferroelectric thin plate.
【0003】しかして、電極間に所定の強さの電界を印
加することによって分極処理を施し、各メモリセルの強
誘電体部分の分極方向を電界の方向と平行な方向に向か
せ、自発分極の分極方向を保存させることによって情報
を記憶させることができる。Therefore, a polarization process is performed by applying an electric field of a predetermined strength between the electrodes, and the polarization direction of the ferroelectric portion of each memory cell is oriented in the direction parallel to the direction of the electric field to spontaneous polarization. Information can be stored by storing the polarization direction of the.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、従来の
強誘電体メモリ素子にあっては、書き込まれたデータ
(情報)の保存中において強誘電体薄板の自発分極値
(残留分極値)が減少し、強誘電体メモリ素子が十分に
機能を発揮しないという問題があった。この原因は本発
明の発明者達の鋭意検討の結果、強誘電体メモリ素子の
保存中における温度変化によって強誘電体薄板の表面に
発生する焦電電荷に起因することが明らかとなった。However, in the conventional ferroelectric memory device, the spontaneous polarization value (residual polarization value) of the ferroelectric thin plate decreases during the storage of written data (information). However, there is a problem that the ferroelectric memory device does not exhibit its function sufficiently. As a result of diligent studies by the inventors of the present invention, it has been clarified that this cause is due to pyroelectric charge generated on the surface of the ferroelectric thin plate due to temperature change during storage of the ferroelectric memory element.
【0005】すなわち、強誘電体メモリ素子を一旦高温
状態にしてから室温に戻した場合には、強誘電体薄膜の
表面に焦電電荷が発生し、この焦電電荷のために強誘電
体薄膜31内に自発分極Pの方向と反対方向の電場Ep
を生じさせる。図4(a)(b)(c)は、この焦電電
荷発生のメカニズムを示す説明図であって、図4(a)
は強誘電体薄膜31に分極処理を施した後の状態を示し
ており、強誘電体薄膜31内の双極子32が一定方向に
整列して自発分極Pを生じている。このとき、分極した
双極子32による表面電荷を打ち消すよう、強誘電体薄
膜31の内部(結晶格子)の表面層には単極の電荷33
が生じている。いま、周囲の温度変化によって強誘電体
薄膜31が高温状態になると、双極子32の大きさが減
少するが、単極の電荷33は移動しにくく応答性が悪い
ため、図4(b)に示すように、自発分極Pが小さくな
り、単極の電荷33が過多になる。こうして表面層の電
荷33が過多になると、空中電荷やイオン等が電荷33
に引き付けられて強誘電体薄膜31の表面に吸着され、
焦電電荷34となる。この後、再び強誘電体薄膜31の
温度がもとのように低下すると、図4(c)に示すよう
に再び自発分極Pが回復するが、強誘電体薄膜31の表
面に付着している焦電電荷34は直ぐには放電されない
ので、焦電電荷34によって自発分極Pの方向と反対方
向の電場Epを生じさせる。この結果、この電界Epによ
って強誘電体薄板32の自発分極Pの大きさが減少して
いる。That is, when the ferroelectric memory element is once brought into a high temperature state and then returned to room temperature, pyroelectric charge is generated on the surface of the ferroelectric thin film, and the pyroelectric charge causes the ferroelectric thin film to be formed. The electric field Ep in the direction opposite to the direction of spontaneous polarization P in 31
Cause 4 (a), (b) and (c) are explanatory views showing the mechanism of this pyroelectric charge generation.
Shows the state after the ferroelectric thin film 31 is polarized, and the dipoles 32 in the ferroelectric thin film 31 are aligned in a certain direction to generate spontaneous polarization P. At this time, in order to cancel the surface charge due to the polarized dipole 32, the unipolar charge 33 is formed in the surface layer inside (the crystal lattice) of the ferroelectric thin film 31.
Is occurring. Now, when the ferroelectric thin film 31 is brought into a high temperature state due to a change in ambient temperature, the size of the dipole 32 decreases, but the unipolar electric charge 33 is difficult to move and the response is poor. As shown, the spontaneous polarization P becomes small and the unipolar charge 33 becomes excessive. In this way, when the electric charge 33 of the surface layer becomes excessive, air charge, ions, etc.
Is attracted to the surface of the ferroelectric thin film 31,
It becomes the pyroelectric charge 34. After that, when the temperature of the ferroelectric thin film 31 is lowered again, the spontaneous polarization P is recovered again as shown in FIG. 4C, but the spontaneous polarization P is attached to the surface of the ferroelectric thin film 31. Since the pyroelectric charge 34 is not immediately discharged, the pyroelectric charge 34 causes an electric field Ep in the direction opposite to the direction of the spontaneous polarization P. As a result, the electric field Ep reduces the magnitude of the spontaneous polarization P of the ferroelectric thin plate 32.
【0006】本発明は、叙上の従来例の欠点に鑑みてな
されたものであり、その目的とするところは、書き込ま
れたデータの保存時における残留分極値の減少を防止す
ることができる強誘電体メモリ素子の使用方法を提供す
ることにある。The present invention has been made in view of the above-mentioned drawbacks of conventional examples, and an object of the present invention is to prevent reduction of the remanent polarization value during storage of written data. It is to provide a method of using a dielectric memory device.
【0007】[0007]
【課題を解決するための手段】本発明の強誘電体メモリ
の使用方法は、強誘電体及び当該強誘電体を挟んで形成
された一対の電極からなる一又は二以上のメモリセルを
備え、当該メモリセルの強誘電体の自発分極の方向によ
って情報を記憶する強誘電体メモリ素子において、情報
保存過程の少なくとも一時期に、前記メモリセルの電極
間の絶縁抵抗値より低いインピーダンス成分を当該メモ
リセルの電極間に接続することを特徴としている。A method of using a ferroelectric memory according to the present invention comprises one or more memory cells each consisting of a ferroelectric and a pair of electrodes formed with the ferroelectric sandwiched therebetween. In a ferroelectric memory device that stores information according to the direction of spontaneous polarization of a ferroelectric substance of the memory cell, an impedance component lower than an insulation resistance value between electrodes of the memory cell is applied to the memory cell at least during a period of information storage. It is characterized in that it is connected between the electrodes.
【0008】[0008]
【作用】本発明にあっては、メモリセルの電極間の絶縁
抵抗値より低いインピーダンス成分をメモリセルの電極
間に接続して保存しているので、強誘電体の表面に表わ
れる分極電荷(特に、温度変化によって強誘電体の表面
に表われる焦電電荷)によって発生している反分極場
(自発分極と反対向きの電界Ep)を打ち消すようにイ
ンピーダンス成分を通って電荷が移動する。こうして、
分極電荷ないし焦電電荷に引き付けられて移動した電荷
によって反分極場が打ち消されるので、反分極場による
自発分極の減極が防止される。In the present invention, since the impedance component lower than the insulation resistance value between the electrodes of the memory cell is connected and stored between the electrodes of the memory cell, the polarization charge ( In particular, the charge moves through the impedance component so as to cancel the anti-polarization field (electric field Ep opposite to the spontaneous polarization) generated by the pyroelectric charge appearing on the surface of the ferroelectric due to the temperature change. Thus
Since the anti-polarization field is canceled by the electric charge attracted and moved by the polarization charge or the pyroelectric charge, the depolarization of the spontaneous polarization due to the anti-polarization field is prevented.
【0009】[0009]
【実施例】図1は本発明の一実施例による強誘電体メモ
リ素子の使用方法を示すブロック図である。この強誘電
体メモリ素子の使用方法においては、強誘電体薄板2及
びその強誘電体薄板2を挟んで形成された一対の電極
3,3からなる複数個のメモリセル4を備えた強誘電体
メモリ素子1を使用する。1 is a block diagram showing a method of using a ferroelectric memory device according to an embodiment of the present invention. In this method of using a ferroelectric memory device, a ferroelectric body having a plurality of memory cells 4 each composed of a ferroelectric thin plate 2 and a pair of electrodes 3 formed by sandwiching the ferroelectric thin plate 2 is used. The memory device 1 is used.
【0010】各メモリセル4の電極3,3は、書き込み
時又は読み取り時以外のメモリ保存時にはスイッチ11
を介して短絡回路(もしくは、低インピーダンス回路)
8に接続されており、書き込み時にはスイッチ11a,
11bの接点を切り替えることによって書き込み回路7
に接続され、読み取り時にはスイッチ11a,11bの
接点を切り替えることによって読み取り回路9に接続さ
れる。The electrodes 3 and 3 of each memory cell 4 are provided with a switch 11 when the memory is stored except when writing or reading.
Via a short circuit (or low impedance circuit)
8 and is connected to the switch 11a,
Writing circuit 7 by switching the contact of 11b
Is connected to the reading circuit 9 by switching the contacts of the switches 11a and 11b at the time of reading.
【0011】短絡回路8は、メモリセル4の両電極3,
3間を短絡させるものであって、各メモリセル4の電極
3,3間の絶縁抵抗値より低いインピーダンスを有する
ものならどのようなものでも良く、例えば、電極3,3
間の絶縁抵抗値より低い抵抗値を有する抵抗で構成して
も良いし、導電線(例えば、銀線)のみから構成しても
良い。The short circuit 8 includes both electrodes 3 of the memory cell 4.
Any one that short-circuits between the electrodes 3 and has an impedance lower than the insulation resistance value between the electrodes 3 of the memory cells 4 may be used.
A resistor having a resistance value lower than the insulation resistance value between them may be used, or only a conductive wire (for example, a silver wire) may be used.
【0012】しかして、入力装置5から書き込み指令が
入力されると、制御回路6によってスイッチ11a,1
1bが制御され、各メモリセル4の電極3,3は書き込
み回路7に接続される。次いで、各メモリセル4の電極
3,3には書き込みデータに応じた正逆の電圧が印加さ
れ、電極3,3間の強誘電体薄板2は電圧の正逆に応じ
た方向に自発分極させられ、その分極の方向によってデ
ータが記憶される。When the write command is input from the input device 5, the control circuit 6 causes the switches 11a and 1
1b is controlled, and the electrodes 3 and 3 of each memory cell 4 are connected to the write circuit 7. Next, the forward and reverse voltages according to the write data are applied to the electrodes 3 and 3 of each memory cell 4, and the ferroelectric thin plate 2 between the electrodes 3 and 3 is spontaneously polarized in the direction according to the forward and reverse of the voltage. Data is stored according to the polarization direction.
【0013】また、入力装置5から読み取り指令が入力
されると、各メモリセル4の電極3,3は読み取り回路
9に接続され、読み取り回路9によって各メモリセル4
の自発分極の方向の正逆が読み取られ、各メモリセル4
に記憶されているデータが読み取られる。読み取られた
データは、例えば出力装置10から出力される。When a read command is input from the input device 5, the electrodes 3, 3 of each memory cell 4 are connected to the read circuit 9, and the read circuit 9 causes each memory cell 4 to be read.
The normal and reverse directions of the spontaneous polarization of the
The data stored in is read. The read data is output from the output device 10, for example.
【0014】本実施例の強誘電体メモリ素子の使用方法
にあっては、メモリセル4の電極3,3間の絶縁抵抗値
より低いインピーダンスの短絡回路8をメモリセル4の
電極3,3間に接続した状態でデータを保存するので、
温度変化によって強誘電体薄板2の表面に焦電電荷が表
われ、そのため強誘電体薄板12の内部に自発分極と反
対向きの反分極場が生じても、焦電電荷に引き付けられ
て短絡回路8を通って電荷が移動し、電極3,3を挟ん
で焦電電荷と逆極性の電荷が誘導される。この結果、焦
電電荷によって発生した反分極場が、誘導された電荷に
よって発生する電界によって打ち消され、焦電電荷の反
分極場によって自発分極が減極するのを防止することが
できる。In the method of using the ferroelectric memory device of this embodiment, the short circuit 8 having an impedance lower than the insulation resistance value between the electrodes 3 and 3 of the memory cell 4 is connected between the electrodes 3 and 3 of the memory cell 4. Since the data is saved while connected to
Pyroelectric charges appear on the surface of the ferroelectric thin plate 2 due to temperature change, and even if an anti-polarization field in the direction opposite to the spontaneous polarization occurs inside the ferroelectric thin plate 12, it is attracted to the pyroelectric charge and short-circuited. The electric charge moves through 8 and the electric charge having the opposite polarity to the pyroelectric charge is induced across the electrodes 3 and 3. As a result, the antipolarization field generated by the pyroelectric charge is canceled by the electric field generated by the induced charge, and it is possible to prevent the spontaneous polarization from being depolarized by the antipolarization field of the pyroelectric charge.
【0015】なお、本実施例の強誘電体メモリ素子の使
用方法は、強誘電体の薄板を用いたバルクメモリ素子に
適用しても、強誘電体の薄膜を用いた薄膜メモリ素子に
適用しても同様の結果が得られる。また、強誘電体メモ
リ素子のメモリセルの数、形状、配列はどのようにして
も良い。また、電極間を結ぶインピーダンス成分は、メ
モリセルの電極間で電荷をバイパスさせることができる
どのような手段によって与えられていても良い。The method of using the ferroelectric memory device according to this embodiment is applicable to a bulk memory device using a ferroelectric thin plate or a thin film memory device using a ferroelectric thin film. However, the same result can be obtained. Further, the number, shape and arrangement of the memory cells of the ferroelectric memory element may be arbitrary. Further, the impedance component connecting the electrodes may be provided by any means capable of bypassing the charge between the electrodes of the memory cell.
【0016】具体的実施例 本発明の効果を確認するため、3つのメモリセル14,
15,16を備えた強誘電体メモリ素子12を作製し、
そのうちの2つのメモリセル14,15を本発明の使用
方法で使用し、他の1つのメモリセル16を従来の使用
方法で使用し、温度衝撃試験による残留分極値Prの変
化を比較した。結果を以下に示す。 Concrete Example In order to confirm the effect of the present invention, three memory cells 14,
A ferroelectric memory element 12 having 15 and 16 is manufactured,
Two of the memory cells 14 and 15 were used in the method of use of the present invention, and the other memory cell 16 was used in the conventional method of use, and the changes in the remanent polarization value Pr due to the temperature shock test were compared. The results are shown below.
【0017】試料の作製 図2(a)は本実施例において作製し使用した強誘電体
メモリ12の斜視図、図2(b)はその断面図である。
まず、 (Pb0.98La0.02)(Ti0.49Zr0.51)1-XO3 で表されるセラミックを焼成し研磨して0.1mm厚のセ
ラミック薄板(強誘電体)13を形成した。次に、この
セラミック薄板13の表裏両面をマスクで覆い銀を蒸着
して、セラミック薄板13を挟んで互いに対向する電極
14a,14b;15a,15b;16a,16bを3
対形成し、3つのメモリセル14,15,16を形成し
た。電極14a,14b;15a,15b;16a,1
6bは縦5mm、横5mmの正方形とした。Preparation of Sample FIG. 2A is a perspective view of the ferroelectric memory 12 prepared and used in this embodiment, and FIG. 2B is its sectional view.
First, a ceramic represented by (Pb 0.98 La 0.02 ) (Ti 0.49 Zr 0.51 ) 1-X O 3 was fired and polished to form a ceramic thin plate (ferroelectric body) 13 having a thickness of 0.1 mm. Next, both sides of the ceramic thin plate 13 are covered with a mask and silver is vapor-deposited, and the electrodes 14a, 14b; 15a, 15b;
Pairs were formed to form three memory cells 14, 15 and 16. Electrodes 14a, 14b; 15a, 15b; 16a, 1
6b is a square having a length of 5 mm and a width of 5 mm.
【0018】次に、各メモリセル14,15,16の電
極14a,14b;15a,15b;16a,16b間
に30kV/cmの電界を同方向に印加し、各メモリセル
14,15,16を図2(b)の矢印の方向に分極させ
た。分極させた直後に各メモリセル14,15,16の
自発分極Pの値を測定したところ、図3に示すように、
ともに約35μcoul/cm2であり、3つのメモリセル1
4,15,16に差はなかった。Next, an electric field of 30 kV / cm is applied in the same direction between the electrodes 14a, 14b; 15a, 15b; 16a, 16b of the respective memory cells 14, 15, 16 so that the respective memory cells 14, 15, 16 are connected. It was polarized in the direction of the arrow in FIG. Immediately after polarization, the value of the spontaneous polarization P of each memory cell 14, 15, 16 was measured, and as shown in FIG.
Both have about 35 μcoul / cm 2 and three memory cells 1
There was no difference between 4, 15 and 16.
【0019】次いで、3つのメモリセル14,15,1
6のうち、1つのメモリセル14は電極14a,14b
間を銀線(インピーダンス成分)17で短絡し、もう1
つのメモリセル15は電極15a,15b間を10MΩ
の抵抗(インピーダンス成分)18で接続した。また、
残りの1つのメモリセル16は電極16a,16b間を
接続せず、解放とした。なお、メモリセル14,15,
16の電極14a,14b;15a,15b;16a,
16b間の絶縁抵抗は電界印加方向によって異なるが、
分極反転電界より十分小さい電圧10Vでの評価では1
×1012Ωであった(但し、電界方向と自発分極方向は
反平行である)。Next, three memory cells 14, 15, 1
One of the six memory cells 14 has electrodes 14a and 14b.
Short the gap with a silver wire (impedance component) 17
One memory cell 15 has 10 MΩ between electrodes 15a and 15b.
The resistor (impedance component) 18 is connected. Also,
The remaining one memory cell 16 was opened without connecting the electrodes 16a and 16b. The memory cells 14, 15,
16 electrodes 14a, 14b; 15a, 15b; 16a,
The insulation resistance between 16b differs depending on the direction of the applied electric field,
1 when evaluated at a voltage of 10 V, which is sufficiently smaller than the polarization reversal electric field
It was × 10 12 Ω (however, the electric field direction and the spontaneous polarization direction were antiparallel).
【0020】温度衝撃試験の結果 このようにして作製した強誘電体メモリ素子12を29
0℃の温度槽に10分間入れた後、取り出して自然放冷
によって室温まで冷却させる方法で温度衝撃試験を行っ
た。次いで、各メモリセル14,15,16の自発分極
Pの値を測定した。 As a result of the temperature shock test, the ferroelectric memory element 12 manufactured in this manner
After putting it in a temperature bath of 0 ° C. for 10 minutes, it was taken out and a temperature shock test was conducted by a method of allowing it to cool naturally to room temperature. Next, the value of the spontaneous polarization P of each memory cell 14, 15, 16 was measured.
【0021】測定結果を図3に示す。電極16a,16
b間を解放したメモリセル16〔従来例〕の自発分極P
の値は約10μcoul/cm2と初期値の約35μcoul/cm2
よりも大幅に小さくなった。これに対し、電極14a,
14b間を銀線17で短絡したメモリセル14〔実施
例〕及び電極15a,15b間を抵抗18で接続したメ
モリセル15〔実施例〕の自発分極Pの値は共に約30
μcoul/cm2と初期値の約35μcoul/cm2よりも少し小
さくなっただけであった。これにより本発明によって自
発分極Pの値の温度衝撃による変化が著しく改善されて
いることがわかる。The measurement results are shown in FIG. Electrodes 16a, 16
Spontaneous polarization P of the memory cell 16 (conventional example) in which the space b is released
The value of is about 10 μcoul / cm 2 and the initial value is about 35 μcoul / cm 2.
Much smaller than. On the other hand, the electrodes 14a,
The values of the spontaneous polarization P of the memory cell 14 [Example] in which 14b are short-circuited by the silver wire 17 and the memory cell 15 [Example] in which the electrodes 15a and 15b are connected by the resistor 18 are both about 30.
μcoul / cm 2 was slightly smaller than the initial value of about 35 μcoul / cm 2 . This shows that the present invention significantly improves the change in the value of the spontaneous polarization P due to temperature shock.
【0022】[0022]
【発明の効果】本発明によれば、強誘電体の表面に表わ
れる分極電荷(特に、温度変化によって強誘電体の表面
に表われる焦電電荷)によって発生している反分極場
(自発分極と反対向きの電界Ep)を打ち消した状態で
情報を保持させることができるので、情報保存中におけ
る自発分極の減極を防止することができ、強誘電体メモ
リ素子の経時安定性及び信頼性を向上させることができ
る。According to the present invention, the anti-polarization field (spontaneous polarization) generated by the polarization charge appearing on the surface of the ferroelectric substance (in particular, the pyroelectric charge appearing on the surface of the ferroelectric substance due to temperature change). Since the information can be retained in the state where the electric field Ep) in the opposite direction is canceled, it is possible to prevent the depolarization of the spontaneous polarization during the information storage, and to improve the stability and reliability of the ferroelectric memory device over time. Can be improved.
【図1】本発明の一実施例による強誘電体メモリ素子の
使用方法を示すブロック図である。FIG. 1 is a block diagram showing a method of using a ferroelectric memory device according to an embodiment of the present invention.
【図2】(a)は同上の効果を確認する実験を説明する
ための斜視図、(b)は(a)の断面図である。2A is a perspective view for explaining an experiment for confirming the same effect, and FIG. 2B is a sectional view of FIG.
【図3】同上の実験結果を示す図であって、温度衝撃試
験による自発分極値の変化を従来例と比較した図であ
る。FIG. 3 is a diagram showing the experimental results of the above, and is a diagram comparing changes in spontaneous polarization values due to a temperature shock test with a conventional example.
【図4】(a)(b)(c)は強誘電体メモリ素子の自
発分極値の減少のメカニズムを示す説明図である。4 (a), (b) and (c) are explanatory views showing a mechanism of a decrease in spontaneous polarization value of a ferroelectric memory element.
1,12 強誘電体メモリ素子 2 強誘電体薄板 4,14,15,16 メモリセル 3,14a,14b,15a,15b,16a,16b
電極 8 短絡回路(インピーダンス成分) 17 銀線(インピーダンス成分) 18 抵抗(インピーダンス成分)1, 12 Ferroelectric Memory Element 2 Ferroelectric Thin Plate 4, 14, 15, 16 Memory Cell 3, 14a, 14b, 15a, 15b, 16a, 16b
Electrode 8 Short circuit (impedance component) 17 Silver wire (impedance component) 18 Resistance (impedance component)
───────────────────────────────────────────────────── フロントページの続き (72)発明者 米田 康信 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasunobu Yoneda 2 26-10 Tenjin Tenjin, Nagaokakyo City, Kyoto Prefecture Murata Manufacturing Co., Ltd.
Claims (1)
された一対の電極からなる一又は二以上のメモリセルを
備え、当該メモリセルの強誘電体の自発分極の方向によ
って情報を記憶する強誘電体メモリ素子において、 情報保存過程の少なくとも一時期に、前記メモリセルの
電極間の絶縁抵抗値より低いインピーダンス成分を当該
メモリセルの電極間に接続することを特徴とする強誘電
体メモリ素子の使用方法。1. A memory device comprising one or more memory cells each composed of a ferroelectric substance and a pair of electrodes formed with the ferroelectric substance sandwiched therebetween, wherein information is stored according to a spontaneous polarization direction of the ferroelectric substance of the memory cell. In the ferroelectric memory element, the ferroelectric memory element is characterized in that an impedance component lower than an insulation resistance value between the electrodes of the memory cell is connected between the electrodes of the memory cell at least during a period of information storage. How to use.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34144792A JP3196384B2 (en) | 1992-11-27 | 1992-11-27 | Method of using ferroelectric memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34144792A JP3196384B2 (en) | 1992-11-27 | 1992-11-27 | Method of using ferroelectric memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06169070A true JPH06169070A (en) | 1994-06-14 |
| JP3196384B2 JP3196384B2 (en) | 2001-08-06 |
Family
ID=18346155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34144792A Expired - Fee Related JP3196384B2 (en) | 1992-11-27 | 1992-11-27 | Method of using ferroelectric memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3196384B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4886720A (en) * | 1987-08-31 | 1989-12-12 | Minolta Camera Kabushiki Kaisha | Photosensitive medium having a styryl charge transport material |
| US6929287B2 (en) | 2000-12-20 | 2005-08-16 | P-Quip Limited | Apparatus for connecting flanged pipes |
-
1992
- 1992-11-27 JP JP34144792A patent/JP3196384B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4886720A (en) * | 1987-08-31 | 1989-12-12 | Minolta Camera Kabushiki Kaisha | Photosensitive medium having a styryl charge transport material |
| US6929287B2 (en) | 2000-12-20 | 2005-08-16 | P-Quip Limited | Apparatus for connecting flanged pipes |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3196384B2 (en) | 2001-08-06 |
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