JPH06252106A - Dry etching method for amorphous silicon film and thin film transistor manufactured by using the dry etching method - Google Patents

Abstract

(57) [Summary] [Object] To provide an effective etching method using a gas not specified as a depleting substance of the ozone layer in a-Si etching processing of TFT, and a thin film transistor manufactured by the method. thing. [Structure] The purpose is to dry-etch the amorphous silicon film in a mixed gas system of SF ₆ and BCl ₃ or in a mixed gas system in which a gas such as Ar or He is added. And a method of dry etching amorphous silicon, and a thin film transistor characterized by being manufactured using this method.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor used in a liquid crystal display device or the like (T hin F ilm T ransistor, the following TFT
Amorphous silicon ( a morphou)
s Si LiCoN, relates to the following abbreviated as a-Si) thin film transistor manufactured using a dry etching method and the method of film.

[0002]

2. Description of the Related Art Since a-Si can be formed into a film at a relatively low temperature, an inexpensive substrate can be used, and it is used as a semiconductor layer material of a semiconductor device such as TFT used in a liquid crystal display device or the like.

The general structure of a TFT made of a-Si (hereinafter abbreviated as a-Si.TFT) and its manufacturing method will be described below. First, Fig. 2 shows a typical a-Si
· A sectional view showing the structure of a TFT, the insulating substrate 1 such as a glass substrate, a gate electrode (for example, Cr film) 2, a gate insulating layer (e.g., a silicon nitride film, Si licon N itride, hereinafter abbreviated as SiN film) 3 , A semiconductor layer (a-Si film) 4, a phosphorus-doped n-type a-Si film 5 for obtaining ohmic contact between the semiconductor layer and the upper metal electrode (Al), a source electrode (for example,
Al film) 6, a drain electrode (e.g., Al film) 7, the display pixel electrode (e.g. film comprising an oxide of indium and tin, I Ndiu
m T in O xide film, hereinafter abbreviated as ITO film).

Here, the gate insulating layer SiN film 3 of FIG.
Semiconductor layer a-Si film 4, ohmic contact layer n-type a
-Si film 5 is formed by plasma CVD (Chemical Vapor Depositi
on) method, and the a-Si on SiN film 3 is formed by the usual photolithography process and dry etching process.
The film 4 and the n-type a-Si film are separated into islands.
In this etching process, if the etching selectivity between the underlying SiN film 3 and the a-Si film 4 is low, the
A large amount of the film 3 is etched, which causes a defect due to a decrease in the dielectric breakdown voltage of the SiN film. Further, if the etching cross-sectional shape of the a-Si film 3 after the island processing is inversely tapered or steep, coverage failure occurs in the source electrode 6 and the drain electrode 7 that cross over the a-Si film 3, and disconnection failure occurs. Therefore, it is necessary to process it into a tapered shape.

The above dry etching process, that is,
Regarding the dry etching process of silicon-based materials, a method of using a mixed gas of SF ₆ and CCl ₄ as an etching gas has been proposed, as described in JP-A-1-32627. However, the above-mentioned conventional techniques have been proposed.
CCl ₄ gas is a substance that depletes the ozone layer of the earth, and its use is said to contribute to the destruction of the global environment.Therefore, it has been decided that production and consumption will be limited and total abolition in the near future will occur.
Regarding the etching process of -Si film, it is an urgent task to select an etching gas instead of CCl ₄ , and as an alternative gas,
Studies using Cl ₂ , H ₂ , and HCl as SF ₆ additive gases are being actively conducted.

Semiconductor fields other than TFT, such as TiW and TiN
For etching wiring materials such as films, etching with a mixed gas of SF ₆ and BCl ₃ has been proposed (JP-A-4-8733).
No. 2) did not consider etching of a silicon-based thin film such as an amorphous silicon film.

[0007]

However, in the above-mentioned method of the prior art, Cl _{2 which} can be an alternative to CCl ₄ is toxic, H ₂ is explosive, HCl is toxic and corrosive. There was a problem and it was difficult to handle.

An object of the present invention is to solve the problems of the above-mentioned prior art, and in etching processing of a-Si film of TFT, an etching method using a gas not specified as a depleting substance of the ozone layer, Another object is to provide a thin film transistor manufactured by the method.

[0009]

[Means for Solving the Problems] The above objects are SF ₆ and BCl ₃
Dry etching method for amorphous silicon, characterized in that the amorphous silicon film is dry-etched in a mixed gas system or with a gas such as Ar or He added to the gas system and mixed. Can be achieved by

[0010]

[Action] BCl ₃ has a slight toxicity and corrosiveness,
Since there is no risk of explosion, it is relatively easy to handle compared to Cl ₂ , H ₂ and HCl.

During dry etching of the a-Si film 4, if the etching gas is SF ₆ alone, F in plasma is used.
Since many radicals are generated, the etching rate is high, but the selectivity with respect to the etching of the underlying SiN film 3 is small. Further, when BCl ₃ alone is used as the etching gas, the selectivity with respect to the etching of the underlying SiN film 3 is large, but the etching rate is extremely low.

In the etching process of the a-Si film in the TFT, the high-speed etching and the SiN film to be the base film are performed.
It is necessary to secure selectivity with etching. Therefore,
In the present invention, S for ensuring the etching rate
BCl to ensure selectivity between F ₆ and SiN etching
_The etching gas is a mixture of ₃ and ₃ .

In this case, the mixing ratio of these gases is important, and it is desirable to set SF ₆ to 30 to 70% by volume and BCl ₃ to 70 to 30% by volume.

If the mixing ratio of SF ₆ is less than the above range, the etching rate will be insufficient, and if it exceeds this range, the selectivity will be insufficient. Further, when the mixing ratio of BCl ₃ is less than the above range, the selectivity becomes insufficient, and when it exceeds this range, the etching rate becomes insufficient. That is, SF ₆ controls the etching rate, and BCl ₃ controls the selection ratio.

In addition to SF ₆ and BCl ₃ , gases such as Ar and He can be added to improve the etching rate and control the a-Si processed shape.

[0016]

EXAMPLES The contents of the present invention will be specifically described below with reference to examples. An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a sectional view schematically showing a main part of a parallel plate type reactive ion etching apparatus in which etching is performed using a mixed gas of SF ₆ and BCl _{3 according} to the present invention. 11, a cathode electrode 12 serving as a substrate stage, an etching gas introduction pipe 13, a gas exhaust port 14, and a high frequency power supply (13.56 MHz) 15 are shown. Here, the etching gas is introduced into the etching chamber 10 from a gas supply system (not shown) installed outside the etching chamber via a flow rate controller.

Further, in this embodiment, as an etching gas, the SF ₆ flow rate is 25 sccm, the BCl ₃ flow rate is 25 sccm, and the He flow rate is 20 s.
ccm, etching pressure 26 Pa, etching power 3
Etching of a-Si film for TFT was performed at 00W. The etching was performed by placing the substrate 16 (TFT matrix substrate) on the cathode electrode 12 and in high frequency plasma. It should be noted that the conditions given here are merely examples, and the etching conditions such as a gas system and the device configuration are not limited to these.

A large number of a-Si.TFTs shown in FIG. 2 are arranged on a plane and used for a large-screen display device.
The matrix substrate was manufactured by the following procedure.

(1) A Cr film was formed on a glass substrate 1 by a sputtering method, and a gate electrode 2 was formed by a normal photoetching process.

(2) Next, the gate insulating layer SiN film 3, semiconductor a-Si film 4, ohmic contact layer n-type a-Si
The film 5 was continuously formed by the plasma CVD method, and the a-Si film 4 (including the n-type a-Si curtain 5) was separated into islands by the usual photolithography process and the etching method of the present invention.

(3) Next, ITO is formed by the sputtering method.
A film was formed and the display pixel electrode 8 was formed by a normal photoetching process.

(4) Next, an Al film was formed by the sputtering method, and the source electrode 6 and the drain electrode 7 were formed by the usual photoetching process.

(5) Further, by using the source electrode 6 and the drain electrode 7 as a mask, by the etching method of the present invention,
The n-type a-Si film on the TFT channel was removed.

By producing the a-Si TFT matrix substrate by the above process, in the dry etching process of (2) and (5), the etching rate is high and the etching with high selectivity to the base is realized. However, we were able to fabricate an a-Si TFT matrix substrate that does not cause defects such as a decrease in the dielectric breakdown voltage of the gate insulating layer SiN film. Further, the etching shape of the a-Si film can be processed into a taper shape with an angle of 30 to 60 degrees, and the source electrode 6 and the drain electrode 7 formed in the step (4) above are a-Si film 4 The coverage of the a-Si / TFT matrix substrate was able to be manufactured without any defects such as wire breakage at the step of the a-Si film when passing over the temperature range.

[0025]

EFFECTS OF THE INVENTION By using the dry etching method of amorphous silicon as the etching method of the present invention, the problems of the prior art can be solved, and in the a-Si etching process of TFT, the ozone layer It has been possible to provide an effective etching method using a gas that is not designated as a destructive substance. In other words, it becomes possible to perform etching with a high etching rate and high selectivity with respect to the underlying SiN without using CCl ₄ which is a regulated substance.
It is possible to manufacture an a-Si TFT matrix substrate without causing defects such as a decrease in the dielectric breakdown voltage of the iN film, which is effective in improving the yield. In addition, since the a-Si film can be processed into a taper shape, disconnection does not occur at the source electrode and drain electrode sections that go over the a-Si film.
Effective in improving yield.

Further, since BCl ₃ has a gettering effect of H ₂ O and O ₂ , it has the effects of stabilizing etching and improving reproducibility.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a structure of a main part of a parallel plate type reactive ion etching apparatus used for carrying out a dry etching method of the present invention.

FIG. 2 is a sectional view showing the structure of an a-Si TFT.

[Explanation of symbols]

1 ... Insulating substrate, 2 ... Gate electrode, 3 ... Gate insulating layer,
4 ... Semiconductor layer, 5 ... N-type a-Si film, 6 ... Source electrode, 7
... Drain electrode, 10 ... Etching chamber, 11 ... Anode electrode, 12 ... Cathode electrode, 13 ... Etching gas introduction pipe, 14
… Gas outlet, 15… High frequency power supply.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoru Go Go 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefectural company

Claims (4)

[Claims] 1. A mixed gas system of SF ₆ and BCl ₃ , or
A dry etching method for an amorphous silicon film, comprising dry-etching the amorphous silicon film in a gas system in which a gas such as Ar or He is added to the gas system and mixed. 2. A gas-based SF ₆ containing SF ₆ and BCl ₃
The composition ratio with BCl ₃ is SF ₆ 30-70% by volume, BCl ₃ 70-30
The dry etching method for an amorphous silicon film according to claim 1, wherein the content is set to% by volume. 3. The amorphous silicon film according to claim 1, wherein the etched cross section of the amorphous silicon film is processed into an inclined shape having a taper angle in the range of 30 degrees to 60 degrees. Dry etching method. 4. A dry etching method according to claim 1, wherein a gate electrode, a gate insulating layer, a semiconductor layer, and a source / drain electrode are present on an insulating substrate, and the thin film transistor is formed by stacking them. A thin film transistor manufactured by using.