JPH06283570A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] It is easy to align the semiconductor element and the conductor pattern on the wiring board during face-down bonding.
An object of the present invention is to provide a method of manufacturing a semiconductor device having excellent mass productivity. An insulating substrate 2 of a wiring board 1 and conductor patterns 3 and 5 adhered on the insulating substrate 2 are both made of a transparent material, and an electrode terminal 7 of a semiconductor element 6 is formed from the back side of the board.
It is characterized in that the electrode terminal 7 and the transparent conductor patterns 3 and 5 are aligned while optically checking the connection portions between the transparent conductor patterns 3 and 5 and.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device using face down bonding.

[0002]

2. Description of the Related Art Face down bonding represented by flip chip bonding is known as one of the methods for mounting semiconductor devices and connecting the devices to each other. This is a method in which the electrode terminals of the element are directly connected to the conductor pattern on the wiring board using solder bumps, and compared with wire bonding, etc., the electrode terminals and the conductor pattern are not connected by thermocompression bonding such as wires, but by soldering. Since they are connected by melting, they have excellent reliability, and one element and a conductor pattern on the wiring board can be connected at once regardless of the number of electrode terminals.

[0003]

However, in face-down bonding, the electrode terminal forming surface of the element faces the substrate side during bonding, and therefore the electrode terminal and the connecting portion on the conductor pattern to which it is connected cannot be seen well. Therefore, conventionally, the element and the conductor pattern are aligned with each other while confirming the connection portion using a semitransparent mirror. Therefore, there is a problem that a bonding process including alignment requires a long time.

An object of the present invention is to provide a method of manufacturing a semiconductor device which is easy to align a semiconductor element and a conductor pattern on a wiring board during face-down bonding and is excellent in mass productivity.

[0005]

According to a method of manufacturing a semiconductor device according to the present invention, an insulating base of a wiring board and a conductor pattern adhered on the insulating base are both formed of a transparent material, and the back side of the board is formed. From the above, the position of the electrode terminal and the transparent conductor pattern is aligned while optically checking the connection portion between the electrode terminal of the semiconductor element and the conductor pattern.

[0006]

According to the present invention, the electrode terminal of the semiconductor element and the conductor pattern on the wiring board can be aligned with each other very easily and reliably without using a semi-transparent mirror or the like. That is, in the present invention, the electrode terminals of the semiconductor element are optically observed through the insulating base made of a transparent material and the conductor pattern, and the conductor pattern surface and the base (insulating base or insulating layer) surface depending on the thickness of the conductor pattern are formed. Since the contour (end face) of the conductor pattern can be optically recognized by the step, it is possible to perform the alignment while confirming the connection portion between the electrode terminal of the semiconductor element and the conductor pattern. Therefore, in combination with the original characteristics of face-down bonding, it is possible to manufacture a semiconductor device with excellent mass productivity and at low cost.

Further, since the connection point between the electrode terminal of the semiconductor element and the conductor pattern can be monitored until the connection is completed, the electrode terminal of the semiconductor element should be accurately aligned and connected to the optimum position of the conductor pattern. This makes it possible to eliminate defective connection of semiconductor elements and increase the yield. Furthermore, it is easy to inspect the connection point after the connection is completed, and the yield can be improved also from this point.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention after the manufacture thereof is completed. In FIG. 1, the wiring board 1 is, in this example, a two-layer wiring board in which a first-layer conductor pattern 3, an insulating layer 4, and a second-layer conductor pattern 5 are sequentially formed on an insulating substrate 2. The conductor patterns 3 and 5 of the first and second layers are properly connected through through holes formed in the insulator layer 4. Here, the insulating substrate 2 is formed of a transparent ceramic material such as polymer glass, plastic, or sapphire. The conductor patterns 3 and 5 are made of a transparent good conductor such as ITO or SnO ₂ . Furthermore, the insulator layer 4 is also made of acrylic, epoxy,
It is formed of a transparent insulating material such as silicon.

Then, on the second layer conductor pattern 15,
A flip-chip semiconductor element 6 having an electrode terminal 7 on which a solder bump is formed, for example, an IC chip, is connected and fixed with the surface on which the electrode terminal 7 is formed facing the wiring board 1, that is, by face-down bonding. In this case, the semiconductor element 6 needs to be accurately aligned with the conductor pattern 5 so that the electrode terminal 7 is connected to the conductor pattern 5 at a predetermined position. This alignment is easy by visually confirming through the substrate 2, the conductor pattern 3, the insulating layer 4, and the conductor pattern 5 with the naked eye, for example.

Even when the conductor patterns 3 and 5 are made of a transparent material as described above, the conductor patterns 3 and 5 are formed of a step (difference of about 2000 angstroms) with the underlying surface due to the thickness of the conductor patterns 3 and 5, respectively. The contour can be optically recognized with the naked eye or a camera, for example. In this case, if the contours of the conductor patterns 3 and 5 are observed from a slightly oblique direction, they can be more easily recognized. In this way, the connection between the electrode terminal 7 of the semiconductor element 6 and the conductor pattern 5 can be easily and surely confirmed.

Incidentally, the connection portion of the electrode terminal 7 on the second layer conductor pattern 5 is, if necessary, metallized to make the connection of the electrode terminal 7 good. Specifically, C
An adhesive layer made of r, Ti, W, etc., a diffusion prevention layer made of Pd, Ni, etc., a layer made of Cu, Au, Al, etc. for thermocompression bonding,
A layer of Ni, Cu or the like having good solder resistance and an antioxidant layer of Au or the like are appropriately formed.

In this way, since the metallized material for the connection portion is opaque, the connection portion of the electrode terminal 7 on the conductor pattern 5 can be more easily confirmed. Although not shown in FIG. 1, a protective layer is molded on the wiring board 1 if necessary. Semiconductor element 6 on second layer conductor pattern 5
It is also possible to previously coat the surfaces other than the connection part with a transparent insulating material such as acrylic or epoxy.

Next, an example of the manufacturing process of the wiring board 1 will be described with reference to FIGS. First, as shown in FIG. 2A, a positive photoresist 11 is applied on a transparent insulating substrate 2, for example, a glass substrate, and dried, and then an opaque pattern having an inverted relationship with the first layer transparent conductor pattern 3. 12
2 is exposed by using the glass mask 13 selectively formed, and then developed as shown in FIG. Next, FIG.
As shown in (c), a transparent conductor film 14, for example, an ITO film is deposited by low temperature sputtering to a thickness of about 1 μm, and then, as shown in FIG.
As shown in (d), the transparent conductor on the photoresist 11 is removed by lift-off to form the transparent conductor pattern 3 of the first layer. When the wiring substrate is a single layer, the substrate manufacturing process is completed, and the semiconductor device bonding process is performed thereafter.

Next, as shown in FIG. 3 (e), a transparent insulating layer 15, for example, an ultraviolet curable resin (acrylic, epoxy, etc.) is applied by screen printing, spin coating, etc.,
Exposure by ultraviolet light through a glass mask 17 on which an opaque pattern 16 corresponding to a through hole is selectively formed,
develop. As a result, as shown in FIG. 3F, the transparent insulator layer 4 having the through hole 18 at the predetermined position is formed.

Then, as shown in FIG. 3 (g), a positive photoresist 19 is applied again and dried to form an opaque pattern 2 in an inverted relationship with the transparent conductor pattern 5 of the second layer.
After exposure is performed using the glass mask 21 in which 0 is selectively formed, the same process as in FIGS.
As shown in (h), the second layer transparent conductor pattern 5 is formed. Thus, the two-layer wiring board 1 shown in FIG. 1 is obtained.

Finally, for the wiring board of FIG. 3 (h),
As shown in FIG. 1, the semiconductor element 6 is provided with the surface on which the electrode terminals 7 are formed facing the wiring board 1 side, and the connection between the electrode terminals 7 and the conductor pattern 5 is optically checked while aligning them. Then, the semiconductor device shown in FIG. 1 is completed by connecting and fixing.

Although lift-off is used in the steps of FIGS. 2A to 2D, a transparent conductor layer is formed first, a photoresist is formed thereafter, and after exposure and development, etching is performed to form a transparent conductor pattern. 3 may be formed and the photoresist may be removed. Further, in the above-mentioned embodiment, the wiring board is 2
Although a layered structure is shown, the present invention is also effective in the case of a single layer or three or more layers.

[0018]

As described above, according to the present invention, the connection between the electrode terminal of the semiconductor element and the conductor pattern is optically observed through the insulating substrate made of the transparent material and the conductor pattern while aligning them. By performing the above, the alignment can be performed easily and surely, and the mass productivity can be improved and the manufacturing cost can be reduced.

Further, since the connection point between the electrode terminal of the semiconductor element and the conductor pattern can be monitored until the connection is completed, the electrode terminal of the semiconductor element and the conductor pattern can be accurately aligned to surely connect them. Since it is possible to connect, it is possible to eliminate the connection failure of the semiconductor element, and it is easy to inspect the connection point after the connection is completed, so that there is an advantage that the yield is improved.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a part of a manufacturing process of a wiring board in the example.

FIG. 3 is a diagram showing another part of the manufacturing process of the wiring board in the example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... Transparent insulating substrate 3, 5 ... Transparent conductor pattern 4 ... Transparent insulator layer 6 ... Semiconductor element 7 ... Electrode terminal

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: connecting a semiconductor element electrode terminal to a conductor pattern on a wiring board with its electrode terminal forming surface facing the wiring board; and forming a transparent conductor pattern on a transparent insulating substrate. Aligning the electrode terminals and the transparent conductor pattern while optically confirming the connection portion between the electrode terminals of the semiconductor element and the transparent conductor pattern through the wiring substrate by adhering and forming the wiring board. A method of manufacturing a semiconductor device, comprising: 2. The semiconductor device according to claim 1, wherein the wiring substrate is formed by laminating a plurality of layers of transparent conductor patterns on a transparent insulating substrate with a transparent insulator layer interposed therebetween. Manufacturing method. 3. A semiconductor element connecting portion of a transparent conductor pattern,
The method for manufacturing a semiconductor device according to claim 1, wherein metallization for connecting the electrode terminals of the semiconductor element is performed.