JPH06301196A - Pattern transfer mask - Google Patents

Abstract

PURPOSE:To prevent the reduction of the fitting precision and adapt a device having no expansion correcting mechanism in one shot to the manufacture of a super-LSI by forming a mask pattern in consideration of the expansion/ shrinkage quantity of a wafer predicted in advance. CONSTITUTION:Patterns 2, 2' are formed on a mask substrate 1 with a shading film, the distance between the patterns 2, 2' is set to 20mm as the design value, for example, and the reduction ratio is corrected by +8ppm in advance to arrange the patterns so that the distance becomes 20mm after machining in this process. When a Si substrate 3 is heat-treated in the oxygen atmosphere to form a SiO2 film 4 by thermal oxidation, the Si substrate 3 is expanded by about 8ppm by the stress of SiO2. This substrate 3 is coated with resist, a mask pattern is transferred on the resist by the normal pattern transfer method to form a resist pattern 5, the SiO2 film 4 is etched while the resist pattern 5 is used as a mask, and the resist is removed to form a SiO2 pattern 7. The stress is released in this state, and the pattern 7 is shrunk by 8ppm. The pattern transferred with expansion correction of 8ppm is now returned to the design value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for arranging patterns in a pattern transfer mask used for manufacturing semiconductor devices and the like.

[0002]

2. Description of the Related Art In a lithographic process in the manufacture of semiconductor devices, improvement of pattern alignment accuracy is a major technical issue. Increasing the chip size of semiconductor elements,
Due to the reduction of the alignment margin, the expansion and contraction of the wafer in the semiconductor element manufacturing process has become one of the major causes of the reduction in the alignment accuracy. In the reduction projection exposure apparatus which is mainly used at present, the inside of the wafer is exposed by a step-and-repeat operation with an angle of view of about 20 mm square per shot. If the wafer has expansion and contraction, adjust the step distance of step and repeat according to the expansion and contraction amount, and
Expansion / contraction correction within a shot is made by correcting the reduction ratio of projection exposure.

[0003]

However, an equal-magnification exposure apparatus that uses X-ray synchrotron radiation as a light source is
Since there is no expansion / contraction correction mechanism within the shot, it was difficult to apply it to the manufacture of VLSIs that require highly precise pattern matching.

The object of the present invention is to provide the X in the above prior art.
To prevent a decrease in alignment accuracy due to wafer expansion and contraction, which is a problem in lithography using an apparatus that does not have an expansion and contraction correction mechanism within one shot, such as an equal-magnification exposure apparatus that uses line synchrotron radiation as a light source. Yes, it is to enable the application to the manufacture of VLSI.

[0005]

According to the present invention, the above object can be achieved by predicting the expansion / contraction amount of a wafer in the element manufacturing process in advance and forming a mask pattern in consideration of the expansion / contraction amount.

[0006]

[Function] According to the expansion and contraction of the wafer in the element manufacturing process,
Since the position of the pattern is corrected in each mask, highly accurate pattern alignment can be realized on the entire surface of one shot.

[0007] of SiO ₂ in FIGS. 3 (a) as an example,
(B) shows changes in the amount of expansion and contraction of the wafer when the film thickness of Si ₃ N ₄ and the deposition area are changed. It can be seen that the amount of expansion and contraction of the wafer changes in proportion to the film thickness of the coating film deposited on the wafer and the area covered. Basically, it is effective to correct the amount of expansion and contraction by utilizing that the stress of the film forming the element changes in proportion to the thickness and area of the film.

[0008]

EXAMPLES Examples of the present invention will be described below in comparison with conventional methods. FIG. 2 shows an example of the conventional method. (A) (b)
(C) is the first lithography process. (D) (e) (f)
Indicates the second lithography step. FIG. 2A shows the first mask. A pattern is formed on the mask substrate 1 with a light shielding film. Designated position of pattern 14 is dotted line A, and pattern 1
The design position of 4'is shown by a dotted line B. In addition, pattern 1
The distance between 4 and 14 'was 20 mm. A substrate for pattern transfer is shown in FIG. A SiO ₂ film 4 having a film thickness of 1 μm was formed by ordinary thermal oxidation in which the Si substrate 3 was heat-treated in an oxygen atmosphere. At this time, the Si substrate 3 expanded by about 8 ppm due to the stress of SiO ₂ . Next, a resist was applied to this substrate, and the mask pattern was transferred to the resist by a normal pattern transfer method to form a resist pattern 15.
Next, as shown in FIG. 2C, the SiO ₂ film 4 was etched using the resist 15 as a mask, and the resist was removed to form a SiO ₂ pattern 16. In this state, the SiO ₂ film other than the pattern is removed and the stress is released. As a result, pattern displacement occurs. Here, the pattern 14 '
The positional deviation 17 of the pattern 16 ′ from the dotted line B indicating the design position of was about −0.16 μm. Next, as shown in FIG. 2E, a Si ₃ N ₄ film 10 having a thickness of about 0.5 μm was formed on the entire surface. The Si substrate 3 has a stress of about 10 pp due to the film formation.
m reduced. The pattern 16 ′ already has a positional deviation of −0.16 μm, and due to the formation of the Si ₃ N ₄ film in this step, the pattern 16 ′ has a positional deviation of −0.2 μm.
The deviation amount 19 from the dotted line B of 6 ′ was about −0.36 μm. A resist pattern 20 was formed using the second mask shown in FIG. The mask alignment at this time is SiO
_It was performed so that the ₂ pattern 16 and the mask pattern 18 were aligned. As a result, the SiO ₂ pattern 16 and the resist pattern 2
0 was able to be matched with a positional accuracy within 0.1 μm. But,
The resist pattern 20 'was formed deviating from the SiO ₂ pattern 16', and the deviation amount 22 was about 0.36 μm.
After that, the Si ₃ N ₄ film 10 was removed by etching using the resist as a mask to form a pattern 21. As a result, the Si substrate 3 was released from the stress. However, SiO ₂ pattern 1
6 ′ and the Si ₃ N ₄ pattern 21 ′ have the same positional displacement amount,
Good alignment could not be achieved. As described above, according to the conventional method, the deformation of the substrate due to the formation of the film to be processed greatly affects the pattern alignment deterioration. Here, the case where the residual ratio after processing of the processed film is 10% or less is shown, but when the residual ratio after processing is large, for example, when processing is performed with the back surface left, the stress of the processed film is It remains afterwards. Therefore, it goes without saying that the specific positional displacement amount of the pattern is not limited to this.

An embodiment of the present invention is shown in FIG. (A)
(B) and (c) are the first lithography process. (D) (e)
(F) shows the second lithography process. FIG. 1A shows the first mask. A pattern is formed on the mask substrate 1 with a light shielding film. The position of the pattern 2 is shown by a dotted line A, and the design position of the pattern 2'is shown by a dotted line B. The distance between the patterns 2 and 2'is 20 mm as a design value, but the reduction ratio was previously corrected by +8 ppm so that the pattern was arranged so that the distance after processing in this step was 20 mm. For example, the distance of the pattern 2 ′ from the dotted line B is +0.16 μm. A substrate for pattern transfer is shown in FIG. A SiO ₂ film 4 having a thickness of 1 μm was formed by ordinary thermal oxidation in which the Si substrate 3 was heat-treated in an oxygen atmosphere. At this time, the Si substrate 3 expanded by about 8 ppm due to the stress of SiO ₂ . A resist was applied to this substrate, and the mask pattern was transferred to the resist by an ordinary pattern transfer method to form a resist pattern 5. Next, as shown in FIG. 1C, the SiO ₂ film 4 is etched using the resist 5 as a mask, the resist is removed, and the SiO ₂ pattern 7 is removed.
Was formed. In this state, the SiO ₂ film other than the pattern has been removed, and the stress is released, so it is reduced by 8 ppm. Therefore, the pattern transferred by the 8 ppm enlargement correction in FIG. 1B returned to the design value, and at this time, the distance between the patterns 7 and 7 ′ became the design value of 20 mm.

FIG. 1D shows the second mask. The distance between the patterns 8 and 8'is 20 mm in design value, but the reduction ratio is -1 in advance so that it will be 20 mm after processing in this process.
The pattern was arranged with 0 ppm correction. For example, the shift amount 9 of the pattern 8 ′ from the design position dotted line B is −0.2 μm.
And As shown in FIG. 1 (e), S is formed on the entire surface in this step.
The i ₃ N ₄ film 10 was formed to a thickness of about 0.5 μm. The Si substrate 3 contracted by about 10 ppm due to the stress in forming this film. A resist is applied to this substrate and a resist pattern 11 is formed by a usual method.
Was formed. The mask alignment at this time was performed so that the SiO ₂ pattern 7 and the mask pattern 8 were aligned. As a result, the SiO ₂ pattern 7 and the resist pattern 11 are 0.1 μm.
It was possible to match the position accuracy within m. Also, the SiO ₂ pattern 7'and the resist pattern 11 'could be aligned with good positional accuracy within approximately 0.1 μm. After that, as shown in FIG. 1F, the Si ₃ N ₄ film 10 was removed by etching using a resist as a mask to form a pattern 12. As a result, the Si substrate 3
Was released from stress, the deformation of the substrate was almost eliminated, and all patterns were placed close to the design values. The positional error 13 between the SiO ₂ pattern 7 ′ and the dotted line B indicating the design position was within 0.05 μm. As described above, by predicting the deformation amount of the substrate at the time of transferring the mask pattern in advance and correcting the pattern position on the mask according to the deformation amount, good alignment can be realized on the entire surface of the substrate.

In the present embodiment, the patterns of the right and left edges have been described, but the position correction of the patterns is performed for all the patterns. The reference point for position correction is preferably set at the center of one shot. Actual masks include mark patterns for aligning the mask with the transfer device, window patterns for pattern detection, and reflection patterns, but these patterns are not actually transferred and position correction is not necessary. Needless to say. Further, although the SiO ₂ and Si ₃ N ₄ films were used as the film to be processed, the present invention is not limited to this. All of the materials that make up the device cause more or less substrate deformation.
The same applies to a multilayer film as well as a single-layer film. The mask used here is an ordinary optical mask, but is not limited to this. A lithography method that particularly requires the present invention is an X-ray equal-magnification exposure method. In the case of a reduction projection exposure apparatus using ultraviolet rays as a light source, which is mainly used at present, since the apparatus has a reduction rate correction function, the correction by the mask as in the present invention is not actually necessary. However, it is difficult to freely control the reduction magnification without affecting the resolution characteristics in the equal-magnification exposure method using a synchrotron radiation X-ray as a light source or a reduction projection exposure apparatus using a plasma X-ray source. . Therefore, the application of the present invention is effective. Further, the correction of the mask reduction ratio can be easily obtained by providing the process simulator for supporting the element design with the function of obtaining the change of the reduction ratio. Further, it is preferable to use an automatic design calculation program for introducing the reduction rate correction into each mask. Particularly, if the required accuracy is not satisfied by the reduction rate correction that is uniform over the entire surface of the wafer, it is preferable to add local position correction. For example, it is effective to divide the inside of the wafer or the inside of a chip into a plurality of blocks and correct the non-linear positional distortion of the wafer from the stress in each block and the stress between the blocks.

[0012]

According to the present invention, the amount of expansion and contraction of the wafer in the element manufacturing process is predicted in advance, and the mask pattern is created in consideration of the amount of expansion and contraction. Therefore, it is possible to prevent a decrease in alignment accuracy due to wafer expansion and contraction, which is a problem in lithography using an apparatus having no expansion and contraction correction mechanism within one shot, and it is possible to manufacture a VLSI.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a pattern showing a lithographic process for explaining the present invention.

FIG. 2 is a sectional view of a pattern showing a lithography process for explaining a conventional method.

FIG. 3 (a) SiO ₂ film thickness for explaining the present invention,
(B) A graph showing the amount of expansion and contraction with respect to the Si ₃ N ₄ film.

[Explanation of Codes] 1 ... Mask substrate, 3 ... Si substrate, 4 ... SiO ₂ film, 10
... Si ₃ N ₄ film, 5, 5 ', 11, 11', 15, 1
5 ', 20, 20' ... Resist.

Claims (4)

[Claims] 1. A mask for pattern transfer, which is used when a mask pattern is transferred to a substrate, wherein the pattern position of the mask is corrected according to the amount of expansion and contraction of the substrate. 2. A pattern transfer mask used in the manufacture of semiconductors, wherein the expansion / contraction amount of a substrate in a semiconductor manufacturing process is predicted, and expansion / contraction correction is performed in advance for the position and / or the size of the pattern on the mask. A pattern transfer mask characterized by being added. 3. The pattern transfer mask according to claim 2, wherein the pattern transfer mask is a mask for an equal-magnification or reduction exposure apparatus using X-rays as a light source. 4. A pattern transfer mask in which expansion / contraction of a substrate in a semiconductor manufacturing process is predicted and expansion / contraction of the pattern is corrected in advance in the position and / or size of the pattern on the mask. A lithographic method.