JPH0689478B2 - Method for manufacturing resin-sealed semiconductor device - Google Patents
Method for manufacturing resin-sealed semiconductor deviceInfo
- Publication number
- JPH0689478B2 JPH0689478B2 JP58207555A JP20755583A JPH0689478B2 JP H0689478 B2 JPH0689478 B2 JP H0689478B2 JP 58207555 A JP58207555 A JP 58207555A JP 20755583 A JP20755583 A JP 20755583A JP H0689478 B2 JPH0689478 B2 JP H0689478B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- resin
- plating
- alloy
- plated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000000034 method Methods 0.000 title claims description 14
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000007747 plating Methods 0.000 claims description 33
- 229910045601 alloy Inorganic materials 0.000 claims description 25
- 239000000956 alloy Substances 0.000 claims description 25
- 229910020938 Sn-Ni Inorganic materials 0.000 claims description 21
- 229910008937 Sn—Ni Inorganic materials 0.000 claims description 21
- 229920005989 resin Polymers 0.000 claims description 18
- 239000011347 resin Substances 0.000 claims description 18
- 238000007789 sealing Methods 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 15
- 239000010931 gold Substances 0.000 description 8
- 238000011282 treatment Methods 0.000 description 8
- 238000005260 corrosion Methods 0.000 description 6
- 230000007797 corrosion Effects 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 230000005496 eutectics Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000004381 surface treatment Methods 0.000 description 5
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 4
- 238000007598 dipping method Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 229910000510 noble metal Inorganic materials 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 239000002253 acid Substances 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 239000010970 precious metal Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000010306 acid treatment Methods 0.000 description 2
- 150000007513 acids Chemical class 0.000 description 2
- 238000002845 discoloration Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000002386 leaching Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 229910015365 Au—Si Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910018100 Ni-Sn Inorganic materials 0.000 description 1
- 229910018532 Ni—Sn Inorganic materials 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- -1 for example Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electroplating Methods And Accessories (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 （技術分野） この発明は樹脂封止半導体装置の製造方法に関するもの
である。TECHNICAL FIELD The present invention relates to a method for manufacturing a resin-sealed semiconductor device.
（技術的背景） 従来、樹脂封止半導体集積回路装置（以下ICという）の
製造に際して、特にリードフレームに生ずる後記各種問
題を回避すべくメッキ処理を行っているが、該メッキ
は、主としてその素材、例えばFe−Ni合金に直接Auまた
はAgなどの貴金属メッキを経済性を考慮して必要部分に
部分的に行っていた。ここで部分メッキとは、具体的に
は例えば第１図のアイランド１と、リードポスト部分と
いわれるリード２の先端部2aに、IC組立上必要最小限の
メッキ処理することを意味する。また、上記Agメッキの
場合予めCuメッキの下地メッキ上にAgメッキを行うこと
もあった。(Technical background) Conventionally, in manufacturing a resin-encapsulated semiconductor integrated circuit device (hereinafter referred to as an IC), a plating process is performed in order to avoid various problems described below that particularly occur in a lead frame. For example, a noble metal such as Au or Ag is directly plated on a Fe-Ni alloy in a necessary portion in consideration of economy. Here, the partial plating specifically means, for example, the island 1 shown in FIG. 1 and the tip 2a of the lead 2, which is called a lead post, are subjected to the minimum necessary plating for IC assembly. Further, in the case of the above Ag plating, the Ag plating may be performed on the Cu undercoat in advance.
ところで、かかる部分にメッキを行ったリードフレーム
を用いて、1Cを組立て樹脂封止を行った第２図の如き樹
脂封止半導体装置の外殻３から突出する外部導出リード
２には、上記組立工程中にその表面に酸化皮膜が生成さ
れることが多い。即ち、半導体素子５をアイランド１に
固定する際に使用されるAu−Si共晶ボンディング、また
は、金属粉末入りエポキシ樹脂ペースト等によるダイボ
ンドに際しての高温加熱、及び上記封止樹脂を硬化させ
る為のベーキング加熱温度は、概ね150℃〜500℃にも達
し、該リード２がかかる高温下にさらされることにより
その表面に酸化皮膜が生成される。又更にこのリード２
には、上記樹脂封止の際に用いる樹脂封止用金型と、リ
ードフレーム間にわずかな隙間があり、圧入される封止
樹脂の該間隙からの小量の浸出に起因して該リード２と
封止樹脂外殻３との界面部分６のリード表面に、封止樹
脂の浸出皮膜７、所謂モールドフラッシュが形成される
のが避けられない。By the way, the above-mentioned assembly is applied to the external lead 2 protruding from the outer shell 3 of the resin-sealed semiconductor device as shown in FIG. An oxide film is often formed on the surface during the process. That is, Au-Si eutectic bonding used when fixing the semiconductor element 5 to the island 1, or high temperature heating at the time of die bonding with an epoxy resin paste containing metal powder, and baking for curing the sealing resin. The heating temperature reaches approximately 150 ° C. to 500 ° C., and when the lead 2 is exposed to such a high temperature, an oxide film is formed on its surface. In addition, this lead 2
Has a slight gap between the resin-sealing die used for the above-mentioned resin-sealing and the lead frame, and the lead is caused by a small amount of leaching of the sealing resin to be press-fitted from the gap. It is unavoidable that the sealing resin leaching film 7, so-called mold flash, is formed on the lead surface of the interface portion 6 between 2 and the sealing resin outer shell 3.
そして又、IC完成品のリード部２は、基板搭載時のハン
ダ付け性、及び電気的接触性の向上、更に該リードフレ
ーム素材の腐食防止等を目的として、ハンダメッキ、Sn
メッキ、ハンダディップ（溶融ハンダメッキ）等各種の
リード表面処理が施される。In addition, the lead portion 2 of the IC finished product is provided with solder plating, Sn for the purpose of improving solderability and electrical contact when mounting on a substrate, and preventing corrosion of the lead frame material.
Various lead surface treatments such as plating and solder dipping (melt solder plating) are performed.
かかる表面処理に際して上記樹脂皮膜いわゆるフラッシ
ュは、上記処理作業を阻害する原因となるのでこれを予
め除去しなければならず、例えばホーニング処理、又は
ワイヤブラシによる削り取り処理を行っている。そして
各種酸、例えば塩酸、硫酸等および金属表面化学研摩液
処理等によって、該リードフレーム素材上に残っている
酸化皮膜を除去した後上述のいずれかの表面処理を行っ
ていた。しかし樹脂外殻３には、封止樹脂の収縮に伴な
う該樹脂のリード２からの剥離による隙間が生じ、この
隙間に対しては、上記表面処理による金属が入り込ま
ず、必ずしも該金属では完全に被覆保護されずに、リー
ドフレーム素材の一部露出部分の発生が免れなかった。
特に、該隙間に酸処理での処理液が入り込んだ状態で
は、著しく腐食を生じ易い欠点も免がれなかった。そし
て又、上記リード表面処理工程の前処理であるホーニン
グ処理、酸洗浄及び金属表面の化学研摩処理等は、著し
くわずらわしい工程であり、作業性及び経済性の点でも
その改善が強く望まれていた。In such a surface treatment, the resin film, so-called flash, causes a hindrance to the treatment work and therefore must be removed in advance. For example, honing treatment or scraping treatment with a wire brush is performed. Then, after removing the oxide film remaining on the lead frame material with various acids, for example, hydrochloric acid, sulfuric acid, etc. and a metal surface chemical polishing liquid treatment, any one of the above-mentioned surface treatments is carried out. However, a gap is created in the resin outer shell 3 due to the peeling of the resin from the lead 2 due to the shrinkage of the sealing resin, and the metal due to the surface treatment does not enter into the gap, so that the metal is not always present. It was not completely covered and protected, and some exposed parts of the lead frame material were unavoidable.
In particular, in the state where the treatment liquid for the acid treatment has entered the gap, the drawback that corrosion is apt to occur is unavoidable. Further, the honing treatment, the acid cleaning, the chemical polishing treatment of the metal surface, etc., which are the pretreatments of the lead surface treatment step, are remarkably troublesome steps, and their improvement has been strongly desired in terms of workability and economy. .
（発明の目的） この発明は、半導体装置の製造に際して、特に上記リー
ド基部のリードフレーム素材の露出による上述の諸問題
を解決すると共に、上記作業性及び経済性に優れた半導
体装置の製造方法を提供しようとするものである。(Object of the Invention) The present invention provides a method for manufacturing a semiconductor device, which solves the above-mentioned problems caused by the exposure of the lead frame material of the lead base, and which is excellent in workability and economy in manufacturing the semiconductor device. It is the one we are trying to provide.
（発明の概要） この発明は、半導体装置を得るに際して、特に上述の部
分的な貴金属メッキに先立って、封止樹脂から導出され
たリードフレーム部分に、予めSn−Ni合金メッキを行う
ことを特徴とする方法である。(Summary of the Invention) The present invention is characterized in that, when a semiconductor device is obtained, in particular, prior to the above-mentioned partial noble metal plating, the lead frame portion derived from the sealing resin is preliminarily plated with Sn—Ni alloy. Is the method.
以下更に詳細に本発明を説明する。The present invention will be described in more detail below.
第４図に本発明方法により得られた部分メッキされたリ
ードフレームの断面図を示す。図において11はアイラン
ド、20はリードフレーム、８は、本発明による予め被覆
されたSn−Ni合金メッキ層、９は部分貴金属メッキ層で
ある。即ち図の例の場合の本発明は、リードフレームの
必要最小限の部分、すなわち樹脂封止予定のない領域
（外部導出リード）にSn−Ni合金をメッキした後従来と
同一部分に貴金属の部分メッキを行ったものである。FIG. 4 shows a sectional view of a partially plated lead frame obtained by the method of the present invention. In the figure, 11 is an island, 20 is a lead frame, 8 is a Sn-Ni alloy plating layer previously coated according to the present invention, and 9 is a partial noble metal plating layer. That is, according to the present invention in the case of the example of the drawing, the necessary minimum portion of the lead frame, that is, the area where the resin sealing is not planned (external lead) is plated with Sn-Ni alloy, and then the noble metal portion is added to the same portion as the conventional one. It is plated.
この発明におけるSn−Ni合金メッキの組成は、特にSn含
有量が60％前後が好ましいがこれに限定されず、また該
Sn−Ni合金メッキは、リード20の必要最小限の部分のみ
にメッキすれば、樹脂封止されたリードの表面は、その
加熱により酸化被膜が生成されるので、 封止樹脂は、酸化皮膜と密着されることから、全面メ
ッキの場合における封止樹脂とSn−Ni合金との密着に比
べて高い密着性が得られ、 また、リードフレームの半導体チップの固着部および
半導体チップとの電気的接続部（例えばワイヤボンディ
ングされるリード内側の先端部）に例えばAuがメッキさ
れた場合でも、全面メッキの場合におけるAuとSn−Ni合
金との共晶による固着力の低下或いは不安定化なる問題
が生じず、 更に、このAuとSn−Ni合金との共晶問題を回避するた
めにAuとSn−Ni合金との間に共晶を防止するためのバリ
ア層を形成する必要もなく、 加えて、AuからSn−Ni合金との共晶問題のないAgペー
ストに変更する必要もなく、もって材料選択の自由度が
全面メッキの場合に比べ大きいなどの効果があるもので
ある。但し、比較的安価なメッキ金属であることから全
面メッキが経済的である。The composition of the Sn-Ni alloy plating in the present invention is not particularly limited to Sn content of about 60%, but is not limited to this.
If Sn-Ni alloy plating is applied only to the minimum necessary portion of the lead 20, an oxide film is generated on the surface of the resin-sealed lead due to the heating, so the sealing resin is not an oxide film. Because of the close contact, higher adhesion can be obtained compared to the close contact between the encapsulating resin and the Sn-Ni alloy in the case of plating the entire surface, and the electrical connection between the semiconductor chip fixing part of the lead frame and the semiconductor chip. Even if, for example, Au is plated on the portion (for example, the tip end inside the lead to be wire-bonded), there is a problem that the adhesion force is reduced or becomes unstable due to the eutectic of Au and Sn-Ni alloy in the case of full-scale plating. In addition, it is not necessary to form a barrier layer for preventing eutectic between Au and Sn-Ni alloy in order to avoid the eutectic problem between Au and Sn-Ni alloy. , Au to Sn-Ni alloys eutectic problem There is no need to change to an Ag paste that does not have this, and the degree of freedom in material selection is greater than in the case of full-scale plating. However, since the plating metal is relatively inexpensive, it is economical to plate the entire surface.
本発明方法において、必要部分にSn−Ni合金によるメッ
キ８が施され、そのメッキ層上に貴金属の部分メッキ９
が施されたリード20は、該Sn−Ni合金メッキが、具体的
に約300℃の恒温放置５時間後にも全く酸化等による変
色が生じない。従って、そのまま該リードにフラックス
を塗布し、例えばハンダディップ槽内にディッピングす
ることによりリードの全長面積の95％〜100％にハンダ
が付着する等良好なハンダ付着性を示すことが確認され
た。In the method of the present invention, a necessary portion is plated with Sn—Ni alloy 8 and the precious metal is partially plated 9 on the plated layer.
The Sn-Ni alloy plating of the lead 20 subjected to the above-mentioned treatment does not cause discoloration due to oxidation or the like even after being specifically left at a constant temperature of about 300 ° C. for 5 hours. Therefore, it was confirmed that by applying the flux to the lead as it is, and dipping it in a solder dipping bath, for example, solder is attached to 95% to 100% of the total area of the lead, and good solder adhesion is exhibited.
（実施例） Sn含量60％の組成のSn−Ni合金のメッキを必要最小限の
部分、すなわち樹脂封止予定のない領域（外部導出リー
ド）に行い、常法の如くしてAgによる部分貴金属メッキ
を行った第４図の如きリードフレームを得、これをAgペ
ーストを用いてIC組立を行った。上記Agペーストによる
ダイボンディングに際し、Agペーストの硬化は150℃×
１時間の熱処理、その後200℃×２時間のベーキングを
行った。そして以下通常の如くワイヤーボンディング、
及び樹脂封止を行ない、最後に該封止樹脂を完全に硬化
させる目的で、150℃×４時間〜５時間エージングさ
せ、フレームを切断して第２図の如き加工を行ないICを
完成させた。(Example) A Sn-Ni alloy having a composition of 60% Sn content is plated on a minimum necessary portion, that is, a region where no resin sealing is planned (externally derived lead), and a partial precious metal is formed by Ag as in a conventional method. A plated lead frame as shown in FIG. 4 was obtained, and this was assembled into an IC using Ag paste. At the time of die bonding with the Ag paste, the Ag paste cures at 150 ℃
A heat treatment was performed for 1 hour, and then a baking was performed at 200 ° C. for 2 hours. Then, as usual, wire bonding,
Then, resin encapsulation was performed, and finally, for the purpose of completely curing the encapsulation resin, aging was performed at 150 ° C. for 4 to 5 hours, the frame was cut, and processing as shown in FIG. 2 was performed to complete the IC. .
ここで、上述した従来のリードフレームを同様の工程で
組立、樹脂封止した後、上記の酸化皮膜、フラッシュ等
を除去しないままのものを得、上記本発明品と比較して
ハンダディップを行いハンダ付着性を調べた。尚このハ
ンダ付着性テストは、ハンダ槽温度250℃、ディッピン
グ時間５秒の条件で行った。実施例品は、Sn−Ni合金メ
ッキされた全表面積に対して平均95％〜100％のハンダ
付着性であったのに対し、従来品はこれが20〜50％と著
しく低く、本発明の良好なハンダ付着性が確認された。
同様にして、上記Sn−Ni合金メッキに代えてNiメッキを
用いたが、これはリードのSn−Ni合金メッキされた全表
面積に対して平均50〜70％のハンダ付着性であった。Here, after assembling the above-mentioned conventional lead frame in the same process and resin-sealing, a product without removing the above oxide film, flash, etc. is obtained, and solder dip is performed in comparison with the product of the present invention. The solder adhesion was examined. The solder adhesion test was conducted under the conditions of a solder bath temperature of 250 ° C. and a dipping time of 5 seconds. The example products had an average 95% to 100% solder adhesion to the total surface area plated with the Sn-Ni alloy, whereas the conventional products had a significantly low solder adhesion of 20 to 50%, which was good for the present invention. Good solder adhesion was confirmed.
Similarly, Ni plating was used in place of the Sn-Ni alloy plating, which had an average solder adhesion of 50-70% of the total Sn-Ni alloy plated surface area of the lead.
次に本発明の上述したSn−Ni合金メッキ層を形成したサ
ンプルの例えばNi及びSn層に対する耐蝕性を調べるべ
く、各同一形状サンプルを各種酸等に30℃、24時間浸漬
し、その重量減少量を調べ結果を下表に示した。この表
によれば、Sn−Ni合金によるメッキ層が著しく良好な耐
蝕性を示すことが確認された。Next, in order to investigate the corrosion resistance of the sample formed with the above Sn-Ni alloy plating layer of the present invention, for example, Ni and Sn layers, each same shape sample is immersed in various acids or the like at 30 ° C. for 24 hours, and its weight is reduced. The amount was examined and the results are shown in the table below. From this table, it was confirmed that the Sn-Ni alloy plated layer exhibited remarkably good corrosion resistance.
以上、この発明を半導体装置のリード即ちリボンのメッ
キの場合について説明したが、他にセラミックパッケー
ジのリードのメッキ方法についても同様に適用できる。
即ち、該リードの同様にFe−Ni合金からなり、通常Niメ
ッキを行ないその上に金メッキを行っている。従って、
かかるFe−Ni合金のリード端子に上記と同様にして直接
Ni−Sn合金メッキ、具体的には電解メッキで容易にメッ
キ層厚３〜５μを形成することができる。 Although the present invention has been described above for the case of plating the leads of the semiconductor device, that is, the ribbon, the present invention can be similarly applied to the method of plating the leads of the ceramic package.
That is, like the lead, it is made of Fe-Ni alloy, and is usually plated with Ni and then plated with gold. Therefore,
Directly on the lead terminal of such Fe-Ni alloy in the same manner as above.
A plating layer thickness of 3 to 5 μm can be easily formed by Ni—Sn alloy plating, specifically, electrolytic plating.
かかる適用により該リードの組立工程において、熱履歴
による変色を防止でき、更に良好な半田付着性が得ら
れ、高価な金の使用量を低減し、更に有害なシアン廃液
を激減させ得る。By such application, discoloration due to heat history can be prevented in the assembly process of the leads, more favorable solder adhesion can be obtained, the amount of expensive gold used can be reduced, and harmful cyan waste liquid can be drastically reduced.
又上述の従来例の説明のごとく、Agメッキの場合、予め
Cuメッキの下地メッキ上に行うようにしても良い。In addition, as described in the conventional example above, in the case of Ag plating,
It may be performed on the base plating of Cu plating.
（発明の効果） 本発明は上記のように樹脂封止半導体装置を得るに際し
て、そのリード部の樹脂封止部より導出する部分がSn−
Ni合金メッキで被覆されたものを組立てることになり、
上述の封止樹脂外殻から突出したリードとの界面部分
に、素材Fe−Ni合金の露出に起因する腐食発生を減少さ
せることができ、その耐食性が著しく向上する。(Effects of the Invention) In the present invention, when a resin-sealed semiconductor device is obtained as described above, the lead-out portion of the resin-sealed portion is Sn-
It will be assembled with Ni alloy plating,
It is possible to reduce the occurrence of corrosion due to the exposure of the raw material Fe-Ni alloy at the interface portion with the lead protruding from the above-mentioned encapsulating resin outer shell, and the corrosion resistance thereof is significantly improved.
又、上記のホーニング、各種酸処理及び化学研摩液によ
る前処理工程が省略でき、作業性が向上するばかりでな
くコストを低下させ、かつ信頼性の高い半導体装置を得
ることができる等その工業的利用価値は極めて高い。Further, the above-mentioned honing, various acid treatments, and pretreatment steps with a chemical polishing liquid can be omitted, so that not only the workability is improved but also the cost is reduced and a highly reliable semiconductor device can be obtained. The utility value is extremely high.
第１図は従来の部分メッキを施したリードフレームの平
面図、第２図はIC組立完成品の斜視図、第３図は第２図
のリード部分の拡大図、第４図は本発明方法による部分
メッキされたリードフレームの断面図である。 1,11…アイランド、2,20…リード、2a…リード先端メッ
キ部、３…封止樹脂外殻、５…半導体素子、６…界面
部、７…モールドフラッシュ、８…Sn−Niメッキ層、９
…部分貴金属メッキ。FIG. 1 is a plan view of a conventional partially-plated lead frame, FIG. 2 is a perspective view of an IC assembly completed product, FIG. 3 is an enlarged view of the lead portion of FIG. 2, and FIG. 4 is the method of the present invention. FIG. 3 is a cross-sectional view of a lead frame partially plated with. 1, 11 ... Island, 2, 20 ... Lead, 2a ... Lead tip plated portion, 3 ... Encapsulating resin outer shell, 5 ... Semiconductor element, 6 ... Interface portion, 7 ... Mold flash, 8 ... Sn-Ni plating layer, 9
… Partial precious metal plating.
Claims (2)
を備えたリードフレームを準備する工程と、 前記リードフレームを加熱して前記固着部に前記半導体
チップを固着する工程と、 前記半導体チップと前記リードの一部とを樹脂封止する
工程とを備えた樹脂封止半導体装置の製造方法であっ
て、 前記樹脂封止工程で樹脂封止されない前記リードの他部
を成す外部導出リードの表面のみを、前記半導体チップ
の固着工程における加熱より前に、予めSn−Ni合金にて
メッキする工程を有することを特徴とする樹脂封止半導
体装置の製造方法。1. A step of preparing a lead frame having a fixing portion to which a semiconductor chip is fixed, and a lead electrically connected to the semiconductor chip to be fixed, and the fixing portion by heating the lead frame. A method of manufacturing a resin-encapsulated semiconductor device, comprising: a step of fixing the semiconductor chip to a substrate; and a step of encapsulating the semiconductor chip and a part of the lead with a resin. Only the surface of the externally derived lead that forms the other part of the lead that is not stopped, prior to heating in the fixing step of the semiconductor chip, has a step of plating with a Sn-Ni alloy in advance. Device manufacturing method.
れた外部導出リードを、前記樹脂封止工程の後に、金属
にて表面処理する工程を備えたことを特徴とする特許請
求の範囲第１項記載の樹脂封止半導体装置の製造方法。2. The method according to claim 1, further comprising a step of surface-treating the lead-out lead plated with Sn—Ni alloy by the plating step with a metal after the resin-sealing step. Item 8. A method for manufacturing a resin-encapsulated semiconductor device according to item.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58207555A JPH0689478B2 (en) | 1983-11-07 | 1983-11-07 | Method for manufacturing resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58207555A JPH0689478B2 (en) | 1983-11-07 | 1983-11-07 | Method for manufacturing resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60100695A JPS60100695A (en) | 1985-06-04 |
| JPH0689478B2 true JPH0689478B2 (en) | 1994-11-09 |
Family
ID=16541670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58207555A Expired - Lifetime JPH0689478B2 (en) | 1983-11-07 | 1983-11-07 | Method for manufacturing resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0689478B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63150949A (en) * | 1986-12-12 | 1988-06-23 | Nippon Chem Denshi Kk | Lead frame for semiconductor and manufacture thereof |
| JPS6418749U (en) * | 1987-07-24 | 1989-01-30 | ||
| JP4260826B2 (en) * | 2006-07-20 | 2009-04-30 | 日本航空電子工業株式会社 | Connector parts |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS529357B2 (en) * | 1972-04-26 | 1977-03-15 | ||
| JPS5760097A (en) * | 1980-09-29 | 1982-04-10 | Hitachi Cable Ltd | Heat resistant silver coated conductor |
-
1983
- 1983-11-07 JP JP58207555A patent/JPH0689478B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60100695A (en) | 1985-06-04 |
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