JPH07115210A - Semiconductor device - Google Patents

Abstract

(57) [Summary] [Object] To provide a semiconductor device in which a low resistance electrode which does not exhibit rectification like an ohmic electrode is formed by a Schottky electrode. [Structure] An n-type semiconductor region 2 is formed on a semiconductor substrate 1, and a cathode electrode 3 and an anode electrode 4 are provided thereon. Both electrodes 3 and 4 are made of the same Schottky metal and are in Schottky junction with the semiconductor region 2. In order to make the height of the Schottky barrier in the anode electrode 4 lower than the height of the Schottky barrier in the cathode electrode 3, the contact area of the anode electrode 4 is made larger than the contact area of the cathode electrode 3 with the semiconductor region 2. . This facilitates the flow of a reverse current in the anode electrode 4, thereby making the anode electrode 4 in pseudo-ohmic contact with the semiconductor region 2. [Effect] The number of steps is significantly reduced. It is possible to prevent the carrier profile from being disturbed. It is extremely effective in quality control.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor technology and a technology particularly effective when applied to a semiconductor device made of a compound semiconductor. For example, it is used for forming electrodes of a Schottky barrier diode or a Schottky gate type field effect transistor. And useful technology.

[0002]

2. Description of the Related Art Generally, a Schottky barrier diode made of a compound semiconductor such as GaAs has a structure shown in FIG.
As shown in FIG. 3, the cathode electrode 3 is in Schottky contact with the n-type semiconductor region 2 formed in the compound semiconductor substrate 1, and a Schottky barrier is formed between the electrode 3 and the semiconductor region 2. ing. On the other hand, the anode electrode 4
0 is in ohmic contact with the semiconductor region 2.

In the manufacture thereof, first, an n-type impurity is implanted into a predetermined region of the semi-insulating substrate 1 by an ion implantation method, and an activation process is performed to form an n-type semiconductor region 2. Then, the cathode electrode 3 is formed into a desired shape by the photolithography technique and the etching technique.
Then, as shown in FIG. 23, C is further formed on the entire surface.
An insulating film 11 such as SiO ₂ is laminated by the VD method or the like,
The photoresist is patterned as an etching mask 90 into a desired shape. Next, an ohmic metal 41 capable of ohmic contact is laminated on the entire surface of the n-type semiconductor region 2,
The ohmic metal other than the portion to be the anode electrode 40 is removed by the lift-off technique. Then, heat treatment is performed to leave the remaining portion of the ohmic metal 41 (anode electrode 40
(A portion to be formed) and the n-type semiconductor region 2 are alloyed to make the anode electrode 40 an ohmic electrode for the n-type semiconductor region 2.

In a Schottky gate type field effect transistor made of a compound semiconductor, as shown in FIG. 24, the gate electrode 5 forms a Schottky junction with the n-type semiconductor region 2 formed in the compound semiconductor substrate 1. On the other hand, the source / drain electrode 60 is in ohmic contact with the semiconductor region 2.

In manufacturing the same, the n-type semiconductor region 2 is formed on the compound semiconductor substrate 1 as in the case of manufacturing the diode.
After forming, the gate electrode 5 is formed into a desired shape by the photolithography technique and the etching technique. Then, as shown in FIG. 25, CVD is further performed on the entire surface.
An insulating film 12 such as SiO ₂ is laminated by a method or the like, and is patterned into a desired shape using a photoresist as an etching mask 91. Next, an ohmic metal 61 capable of ohmic contact with the n-type semiconductor region 2 is laminated on the entire surface, and the ohmic metal other than the portion to be the anode electrode 60 is removed by a lift-off technique. After that, heat treatment,
The remaining part of the ohmic metal 61 (the part which becomes the source / drain electrode 60) and the n-type semiconductor region 2 are alloyed.

As described above, the anode electrode 40 is conventionally used.
Further, in order to make the source / drain electrode 60 an ohmic electrode, in order to make a metal ohmic contact with the compound semiconductor, A having an n-type or p-type impurity as a dopant is used.
After depositing a metal such as u on the compound semiconductor, it was indispensable to alloy the metal with the semiconductor by heat treatment (Compound Semiconductor Handbook (Science Forum), p. 169).

[0007]

However, the present inventors have clarified that the above-mentioned technique has the following problems. That is, in the Schottky barrier diode, the cathode electrode 3 and the anode electrode 4
0, in the Schottky gate type field effect transistor, the gate electrode 5 and the source / drain electrode 60 had to be formed in separate steps. That is, since the composition and the like of the Schottky metal capable of Schottky junction to the n-type semiconductor region 2 and the ohmic metal are different, it is impossible to simultaneously form the Schottky electrode and the ohmic electrode made of the Schottky metal.

Therefore, in order to form these electrodes 3, 40, 5, 60, metal 4 is formed on the substrate 1 by sputtering or the like.
The step of stacking 1, 61, the step of forming the etching masks 90, 91 by the lithography technique, and the etching step must be repeated at least twice, which has a drawback that the number of steps is increased.
Further, in order to use the metal layered on the compound semiconductor as an ohmic electrode, alloying treatment must be performed by heat treatment, which not only increases the number of steps, but also increases impurities in the n-type semiconductor region 2. There is also a possibility that the carrier profile may be disturbed due to thermal diffusion of the above.

The present invention has been made in view of such circumstances, and in a Schottky barrier diode or a Schottky gate type field effect transistor made of a compound semiconductor, a Schottky electrode which does not exhibit rectifying property like the ohmic electrode and has a low resistance is formed. The main purpose is to provide a semiconductor device formed of electrodes. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0010]

The typical ones of the inventions disclosed in the present application will be outlined below. That is, in the semiconductor device of the present invention, in a semiconductor device such as a Schottky barrier diode or a Schottky gate type field effect transistor formed on a substrate made of a compound semiconductor, an electrode, that is, a diode, which is conventionally formed of ohmic metal. The anode electrode or the source / drain electrode of the field effect transistor is formed of Schottky metal similarly to the cathode electrode of the diode or the gate electrode of the field effect transistor. At this time, the barrier height of the anode electrode is set to be lower than the barrier height of the cathode electrode in order to facilitate the reverse current flow. Further, the barrier height of the source / drain electrodes is set to be lower than the barrier height of the gate electrodes.

Specifically, (1) the anode electrode has a larger contact area with the semiconductor region than the cathode electrode, and (2) the impurity concentration of the semiconductor region formed by joining the cathode electrodes is larger than the impurity concentration of the semiconductor region. To increase the impurity concentration in the semiconductor region formed by joining the anode electrodes,
(3) A heteroepitaxial layer is provided below the anode electrode, (4) different electrode materials are used for the anode electrode and the cathode electrode, or a combination of (1) to (4).

[0012]

According to the above means, in the case of the Schottky barrier diode, since the barrier height of the anode electrode is lower than the barrier height of the cathode electrode, a forward voltage is applied to the cathode electrode and a reverse voltage is applied to the anode electrode. By applying the voltage, the magnitude of the reverse current that can flow in the anode electrode becomes larger than the magnitude of the forward current that flows in the cathode electrode. On the other hand, when the bias is reversed, the magnitude of the reverse current that flows in the cathode electrode is smaller than the magnitude of the forward current that can flow in the anode electrode.

Therefore, current flows when the cathode electrode is forward biased and the anode electrode is reverse biased, but no current flows when the cathode electrode is reverse biased and the anode electrode is forward biased. Since the diode characteristic is obtained in this way, the anode electrode is in pseudo ohmic contact.

As shown in FIG. 1, the compound semiconductor substrate 1 has a cathode electrode 3 and an anode electrode 4 which are respectively Schottky-joined to the n-type semiconductor region 2, and the cathode electrode 3 with respect to the semiconductor region 2 is provided. The operation principle will be described by taking as an example a semiconductor device that constitutes a diode circuit element in which the contact area of the anode electrode 4 is larger than the contact area of. Equivalent circuit of this semiconductor device, as shown in FIG. 2, a diode D ₁ consisting of contact between the anode electrode 4 and the n-type semiconductor region 2, a diode D ₂ consisting contacting the cathode electrode 3 and the semiconductor region 2 However, it seems to have been faced.

In this state, the diode D is supplied by the external power source.
_When a forward voltage is applied to the diode ₂ and a reverse voltage is applied to the diode D ₁ , a forward current flowing through the diode D ₂ is I _F and a backward current flowing through the diode D ₁ is I _R. as shown in, the power supply voltage V becomes I _R> I _F in V ₁ is smaller than the range. Therefore, in the voltage range of V ₁ or less, although the diode D ₁ is reverse-biased, a reverse current I _R sufficiently larger than I _F can flow in the diode D ₁ , so that the anode electrode 4 Has a pseudo ohmic contact with the n-type semiconductor region 2, and a current I flows through this diode circuit.

On the other hand, when the bias is reversed, that is, the reverse voltage is applied to the diode D ₂ and the diode D ₁
In the case of applying the forward voltage, no reverse current rarely flows in the diode D _2, no current flows through the diode circuit. Therefore, this circuit has a diode characteristic like the current-voltage characteristic (measured value) shown in FIG.

Here, as shown as a comparison in FIG. 5, n
When the contact area of the anode electrode 4 to the shaped semiconductor region 2 is equal to or smaller than the contact area of the cathode electrode 3, when the cathode electrode 3 is forward biased and the anode electrode 4 is reverse biased, the anode electrode 4 Since almost no reverse current I _R flows through the diode circuit, no current I flows through this diode circuit. Further, when the bias is reversed, no current flows in this circuit as described above, so this circuit does not have diode characteristics.

The same applies to the Schottky gate type field effect transistor. That is, as shown in FIG. 6, this field effect transistor has a structure in which two diode circuits described above are provided,
The contact area of the source / drain electrode 6 is larger than the contact area of the gate electrode 5 with respect to the n-type semiconductor region 2. Therefore, the currents I _F and I _R that can flow in the n-type semiconductor region 2 through the source / drain electrode 6 become sufficiently easier to flow than the current I _d that flows under the gate electrode 5, that is, in the channel region. The drain electrode 6 is in pseudo ohmic contact with the n-type semiconductor region 2. Therefore, this semiconductor device has a transistor characteristic like the current-voltage characteristic (measured value) shown in FIG.

[0019]

【Example】

(First Embodiment) FIG. 8 shows an example of a Schottky barrier diode to which the semiconductor device according to the present invention is applied. As shown in the figure, in this Schottky barrier diode 100, an n-type semiconductor region 2 is formed on a semi-insulating compound semiconductor substrate 1 made of GaAs or the like, and a cathode electrode (first electrode) is formed on the semiconductor region 2. ) 3 and an anode electrode (second electrode) 4 are provided. And
The cathode electrode 3 and the anode electrode 4 are made of the same Schottky metal and are in Schottky junction with the n-type semiconductor region 2.

The contact area between the electrodes 3 and 4 with respect to the semiconductor region 2 is larger in the anode electrode 4 than in the cathode electrode 3. Examples of the Schottky metal include aluminum, tungsten, palladium, platinum, or a silicide thereof (intermetallic compound with silicon) or the like.

The Schottky barrier diode 100 having the above structure is manufactured as follows.
First, as shown in FIG. 9, a photoresist is patterned by a photolithography technique to form an ion implantation mask 92 on the semiconductor substrate 1 and then IV such as silicon is used.
Substrate 1 by ion-implanting n-type impurities consisting of group elements
To form an n-type semiconductor region 2. Needless to say, the mask 92 is removed and the impurity activation heat treatment is performed after the ion implantation.

Then, as shown in FIG. 10, a Schottky metal 30 is laminated on the substrate 1 by sputtering or the like, and a portion corresponding to each of the cathode electrode 3 and the anode electrode 4 is further formed thereon by photolithography. An etching mask 93 is formed by leaving the photoresist. Then, the Schottky metal 30 is etched to form the cathode electrode 3 and the anode electrode 4, and then the etching mask 93 is removed, whereby the diode 100 shown in FIG. 8 is obtained.

According to the first embodiment, the contact area of the anode electrode 4 with the n-type semiconductor region 2 is the cathode electrode 3.
Since the contact area is larger than the contact area of the Schottky barrier, the height of the Schottky barrier formed between the semiconductor region 2 and the anode electrode 4 is
The height is lower than the height of the Schottky barrier formed between the semiconductor region 2 and the cathode electrode 3. Therefore, when the anode electrode 4 (which constitutes a diode) is reversely biased, a reverse current easily flows in the diode of the anode electrode 4. Therefore, by appropriately forward-biasing the cathode electrode 3 and reverse-biasing the anode electrode 4 so that the magnitude of the reverse current that can flow in the anode electrode 4 is larger than the magnitude of the forward current in the cathode electrode 3. Since a forward current flows through the Schottky barrier diode 100, the anode electrode 4 is in pseudo ohmic contact with the n-type semiconductor region 2.

Although the conductivity type of the semiconductor region 2 is n-type, it is needless to say that it may be p-type. Further, the semiconductor region 2 may be formed by epitaxial growth on the substrate 1, instead of forming the semiconductor region 2 by ion implantation of impurities.

(Second Embodiment) FIG. 11 shows another example of a Schottky barrier diode to which the semiconductor device according to the present invention is applied. The same points as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted. As shown in the figure, the Schottky barrier diode 200 is different from the diode 100 of the first embodiment in that the anode electrode 4 is in Schottky junction with the high concentration n-type impurity region (semiconductor region) 7. is there. The high-concentration n-type impurity region 7 has a higher impurity concentration than the n-type semiconductor region 2. The cathode electrode 3 is in Schottky contact with the n-type semiconductor region 2.

The Schottky barrier diode 200 having the above structure is manufactured as follows.
First, the n-type semiconductor region 2 is formed in the semiconductor substrate 1 by ion implantation (see FIG. 9, but the activation heat treatment is not performed). Subsequently, as shown in FIG. 12, the photoresist is patterned by a photolithography technique to form an ion implantation mask 94 exposing a part of the n-type semiconductor region 2 on the substrate 1.

Then, ion implantation of an n-type impurity made of a group IV element such as silicon is performed again to form a high concentration n-type impurity region 7. The n-type semiconductor region 2 and the high concentration n
The activation heat treatment of the impurities respectively injected into the type impurity regions 7 is performed simultaneously after removing the mask 94 after performing ion implantation to form the high concentration n-type impurity regions 7.

Then, in the same manner as in the first embodiment, n
A cathode electrode 3 is formed on the semiconductor region 2 having a high concentration
If the anode electrode 4 is formed in the type impurity region 7,
The diode 200 shown in 1 is obtained.

According to the second embodiment described above, the cathode electrode 3
Since the anode electrode 4 is joined to the high-concentration n-type impurity region 7 having a higher impurity concentration than the n-type semiconductor region 2 formed by joining the above, the high-concentration n-type impurity region 7 is formed between the high-concentration n-type impurity region 7 and the anode electrode 4. The height of the formed Schottky barrier is lower than the height of the Schottky barrier formed between the semiconductor region 2 and the cathode electrode 3. Therefore, similarly to the first embodiment, by appropriately forward-biasing the cathode electrode 3 and reverse-biasing the anode electrode 4,
Since a forward current flows through the Schottky barrier diode 200, the anode electrode 4 is in pseudo-ohmic contact with the high concentration n-type impurity region 7.

Although the conductivity type of the high concentration impurity region 7 is n type, it is needless to say that it may be p type. In this case, it goes without saying that the conductivity type of the semiconductor region 2 is also the p type. Even if the contact area of the anode electrode 4 is equal to or smaller than the contact area of the cathode electrode 3 by appropriately selecting the impurity concentration difference between the high concentration n-type impurity region 7 and the n-type semiconductor region 2. Similar effects are obtained.

(Third Embodiment) FIG. 13 shows still another example of the Schottky barrier diode to which the semiconductor device according to the present invention is applied. The same points as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted. As shown in the figure, this Schottky barrier diode 300 is different from the diode 100 of the first embodiment in that an epitaxial junction formed between the anode electrode 4 and the n-type semiconductor region 2 is heterojunction with the semiconductor region 2. The point is that the layer (semiconductor layer) 8 is provided. The epitaxial layer 8 is made of, for example, n ⁺ -AlGaAs. The cathode electrode 3 is in Schottky contact with the n-type semiconductor region 2.

The Schottky barrier diode 300 having the above structure is manufactured as follows.
First, the n-type semiconductor region 2 is formed on the semiconductor substrate 1 in the same manner as in the first embodiment (see FIG. 9). Then, in FIG.
As shown in, CVD (Chemical Vapor Deposition) and MBE
The heteroepitaxial layer 80 is grown on the substrate 1 by (molecular beam crystal growth method). Then, an etching mask 95 in which the photoresist is left only in the portion corresponding to the anode electrode 4 is formed thereon by the photolithography technique.

Then, as shown in FIG. 15, the heteroepitaxial layer 80 is etched to form the epitaxial layer 8 only on the portion corresponding to the anode electrode 4, and then the Schottky metal 30 is laminated on the substrate 1. continue,
After the etching mask 96 is formed by leaving the photoresist at the portions corresponding to the cathode electrode 3 and the anode electrode 4 by the photolithography technique, and the Schottky metal 30 is etched to form the cathode electrode 3 and the anode electrode 4. By removing the etching mask 96, the diode 300 shown in FIG. 13 is obtained.

According to the third embodiment described above, the anode electrode 4
Between the n-type semiconductor region 2 and the n-type semiconductor region 2, the epitaxial layer 8 heterojunctioned to the semiconductor region 2 is provided.
The barrier formed between the semiconductor region 2 and the anode electrode 4 by the epitaxial layer 8 is as shown in FIG. 16, and the carrier concentration between the semiconductor region 2 and the anode electrode 4 is increased, and a thin epitaxial layer is formed. The carrier comes to flow through 8 tunnels. Therefore, the height of the barrier formed between the semiconductor region 2 and the anode electrode 4 is lower than the height of the Schottky barrier formed between the semiconductor region 2 and the cathode electrode 3. Therefore, as in the first embodiment, by appropriately forward-biasing the cathode electrode 3 and reverse-biasing the anode electrode 4, a forward current flows through the Schottky barrier diode 300. It is a pseudo ohmic electrode with respect to the shaped semiconductor region 2.

The epitaxial layer 8 is n ⁺ -AlG.
Not only aAs, but the height of the barrier formed between the semiconductor region 2 and the anode electrode 4 becomes lower than the height of the Schottky barrier in the cathode electrode 3, and the reverse current in the anode electrode 4 causes the reverse current. A semiconductor layer of any composition may be used as long as it is easier to flow than the forward current in 3. Although the conductivity type of the epitaxial layer 8 is n-type, it is needless to say that it may be p-type. In this case, it goes without saying that the conductivity type of the semiconductor region 2 is also the p type. Further, by appropriately selecting the composition of the epitaxial layer 8, the same effect can be obtained even if the contact area of the anode electrode 4 is equal to or smaller than the contact area of the cathode electrode 3.

(Fourth Embodiment) FIG. 17 shows still another example of the Schottky barrier diode to which the semiconductor device according to the present invention is applied. The same points as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted. As shown in the figure, the Schottky barrier diode 400 is different from the diode 100 of the first embodiment in that the anode electrode 45 is made of an electrode material different from that of the cathode electrode 3.

The anode electrode 45 and the cathode electrode 3 are
For example, a combination of electrode materials such as aluminum, tungsten, palladium, or platinum, or a silicide thereof is selected such that the height of the Schottky barrier in the anode electrode 45 is lower than the height of the Schottky barrier in the cathode electrode 3. Be done. Needless to say, both the anode electrode 45 and the cathode electrode 3 are Schottky-junctioned to the n-type semiconductor region 2.

The Schottky barrier diode 400 having the above structure is manufactured as follows.
First, the n-type semiconductor region 2 is formed on the semiconductor substrate 1 in the same manner as in the first embodiment (see FIG. 9). Then, in FIG.
As shown in FIG. 3, the Schottky metal 30 is laminated on the substrate 1, and an etching mask 97 is formed by photolithography technology, leaving the photoresist in the portion corresponding to the cathode electrode 3 left, and the Schottky metal 30 is etched. To form the cathode electrode 3.

After removing the etching mask 97, FIG.
As shown in FIG. 9, the Schottky metal 46 made of a material different from the Schottky metal 30 is laminated again on the substrate 1, the etching mask 98 is formed by the photolithography technique in the same manner, and the anode electrode 4 is etched.
5 is formed. Then, by removing the etching mask 98, the diode 400 shown in FIG. 17 is obtained.

According to the fourth embodiment, the height of the Schottky barrier between the n-type semiconductor region 2 and the anode electrode 45 is the same as that of the Schottky barrier between the n-type semiconductor region 2 and the cathode electrode 3. Since the electrode materials of the anode electrode 45 and the cathode electrode 3 are appropriately selected so as to be lower than the height, the cathode electrode 3 is appropriately forward-biased and the anode electrode 45 is reversed as in the first embodiment. By biasing the Schottky barrier diode 40
Since a forward current flows in 0, the anode electrode 45 is n
This means that the semiconductor region 2 is in pseudo-ohmic contact.

The anode electrode 45 and the cathode electrode 3
Even if the contact area of the anode electrode 45 is equal to or smaller than the contact area of the cathode electrode 3 by appropriately selecting the combination of the electrode materials, the same effect can be obtained.

(Fifth Embodiment) FIG. 20 shows an example of a Schottky gate type field effect transistor to which the semiconductor device according to the present invention is applied. As shown in the figure, in this field effect transistor 500, an n-type semiconductor region 2 is formed on a semi-insulating compound semiconductor substrate 1 made of GaAs or the like, and a gate electrode (first electrode) is formed on the semiconductor region 2. 5 and source / drain electrode (second electrode)
6 is provided. The gate electrode 5 and the source / drain electrodes 6 are made of the same Schottky metal and are in Schottky junction with the n-type semiconductor region 2.

The contact area of the electrodes 5 and 6 with the semiconductor region 2 is larger in the source / drain electrode 6 than in the gate electrode 5. Examples of the Schottky metal include aluminum, tungsten, palladium, platinum, or a silicide thereof (intermetallic compound with silicon) or the like.

The Schottky gate type field effect transistor 500 having the above structure is manufactured as follows. First, the n-type semiconductor region 2 is formed on the semiconductor substrate 1 in the same manner as in the first embodiment (see FIG. 9).
Subsequently, as shown in FIG. 21, a Schottky metal 50 is laminated on the substrate 1. Then, an etching mask 99 is formed by photolithography technique, in which the photoresists at the portions corresponding to the gate electrode 5 and the source / drain electrodes 6 are left, and the Schottky metal 30 is etched to form the gate electrode 5 and the source / drain electrode 6. Drain electrode 6
By removing the etching mask 99 after forming, the field effect transistor 500 shown in FIG. 20 is obtained.

According to the fifth embodiment described above, since the contact area of the source / drain electrode 6 with respect to the n-type semiconductor region 2 is larger than the contact area of the gate electrode 5, the contact area between the semiconductor region 2 and the source / drain electrode 6 is increased. The height of the Schottky barrier formed on the semiconductor layer 2 is lower than the height of the Schottky barrier formed between the semiconductor region 2 and the gate electrode 5. Therefore, the current that can flow in the n-type semiconductor region 2 through the source / drain electrodes 6 is sufficiently larger than the current that flows in the channel region below the gate electrode 5, and the source / drain electrodes 6 are n-type semiconductors. It means that the region 2 is in pseudo-ohmic contact.

Although the gate electrode 5 and the source / drain electrodes 6 are made of the same Schottky metal,
As long as the height of the Schottky barrier in the source / drain electrode 6 is lower than the height of the Schottky barrier in the gate electrode 5, they may be formed of different Schottky metals. Further, similarly to the second embodiment, a high concentration n-type impurity region may be formed on the substrate 1 and the source / drain electrode 6 may be bonded to the high concentration n-type impurity region. Further, as in the third embodiment, a heteroepitaxial layer may be provided between the n-type semiconductor region 2 and the source / drain electrode 6.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in the first to fifth embodiments, the compound semiconductor substrate 1 is made of, for example, GaAs, but III other than GaAs is used.
It may be a -V group compound semiconductor or a II-VI group compound semiconductor. Needless to say, the first to fourth embodiments may be combined as appropriate.

In the above description, the case where the invention made by the present inventor is mainly applied to the Schottky barrier diode and the Schottky gate type field effect transistor made of the compound semiconductor, which is the field of application of the invention, has been described. The present invention is not limited to this, and can be used for other semiconductor devices and semiconductor devices made of silicon.

[0049]

The effects obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows. That is, in a Schottky barrier diode or a Schottky gate field effect transistor made of a compound semiconductor, the anode electrode and the source / drain electrodes, which are conventionally composed of ohmic electrodes, should be used as the Schottky electrode like the cathode electrode and the gate electrode. Therefore, the same electrode material can be used.
Therefore, the Schottky metal for the cathode electrode and the gate electrode and the Schottky metal for the anode electrode and the source / drain electrode can be stacked at the same time, so that the cathode electrode and the anode electrode or the gate electrode and the source electrode can be stacked. -The drain electrode can be formed in the same process, and the number of processes is significantly reduced.

Further, in the case of the Schottky electrode, unlike the ohmic electrode, it is not necessary to perform alloying treatment by heat treatment, so that the number of steps is further reduced. In addition, it is possible to prevent the carrier profile from being disturbed due to the heat treatment.

Further, as described above, since the anode electrode and the source / drain electrodes are formed at the same time when the cathode electrode and the gate electrode are formed and the heat treatment is not required, the diode characteristics and the Various characteristics such as transistor characteristics and V _th (threshold voltage) and carrier profile can be examined. Therefore,
After forming a cathode electrode and a gate electrode as in the conventional method, an ohmic metal is laminated and the metal layer is patterned,
Further, compared with the fact that the above characteristics could only be investigated after alloying by heat treatment to form the anode electrode and the source / drain electrodes, the effect is extremely large in quality control.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the operation principle of a semiconductor device according to the present invention, and schematically shows a cross section of a Schottky barrier diode as an example of the semiconductor device.

FIG. 2 is a diagram showing an equivalent circuit of the Schottky barrier diode.

FIG. 3 is a diagram showing current-voltage characteristics of diodes D ₁ and D ₂ in the equivalent circuit.

FIG. 4 is a diagram showing current-voltage characteristics (actually measured values) in the Schottky barrier diode.

FIG. 5 schematically shows a cross section of a semiconductor device which does not have the diode characteristics given as a comparison with the Schottky barrier diode.

FIG. 6 is a diagram for explaining the operation principle in the case of a Schottky gate type field effect transistor as an example of the semiconductor device according to the present invention, in which a cross section of the transistor is schematically shown.

FIG. 7 is a diagram showing current-voltage characteristics (actually measured values) in the field effect transistor. Is.

FIG. 8 is a sectional view schematically showing an example of a Schottky barrier diode which is a first embodiment of the semiconductor device according to the present invention.

FIG. 9 is a cross-sectional view schematically showing a state in which the Schottky barrier diode of the first embodiment is being manufactured, and shows a state in which an n-type semiconductor region is formed.

FIG. 10 is a cross-sectional view schematically showing a state in which the Schottky barrier diode of the first embodiment is being manufactured, and shows a state before patterning the Schottky metal.

FIG. 11 is a sectional view schematically showing an example of a Schottky barrier diode which is a second embodiment of the semiconductor device according to the present invention.

FIG. 12 is a cross-sectional view schematically showing a state in the process of manufacturing the Schottky barrier diode of the second embodiment, showing a high concentration n
The state where the type impurity region is formed is shown.

FIG. 13 is a sectional view schematically showing an example of a Schottky barrier diode which is a third embodiment of the semiconductor device according to the present invention.

FIG. 14 is a cross-sectional view schematically showing a condition of the Schottky barrier diode of the third embodiment which is being manufactured, and shows a condition before patterning the heteroepitaxial layer.

FIG. 15 is a cross-sectional view schematically showing a state in which the Schottky barrier diode of the third embodiment is being manufactured, and shows a state before patterning a Schottky metal.

FIG. 16 is an energy level diagram of a junction between an anode electrode, a heteroepitaxial layer, and a semiconductor region in the Schottky barrier diode of the third embodiment.

FIG. 17 is a sectional view schematically showing an example of a Schottky barrier diode which is a fourth embodiment of the semiconductor device according to the present invention.

FIG. 18 is a cross-sectional view schematically showing a state in which the Schottky barrier diode of the fourth embodiment is being manufactured, and shows a state before patterning a Schottky metal for forming a cathode electrode.

FIG. 19 is a cross-sectional view schematically showing a state in the middle of manufacturing the Schottky barrier diode of the fourth embodiment, showing a state before patterning a Schottky metal for forming an anode electrode.

FIG. 20 is a sectional view schematically showing an example of a Schottky gate type field effect transistor which is a fifth embodiment of the semiconductor device according to the present invention.

FIG. 21 is a cross-sectional view schematically showing a state of the field effect transistor of the fifth embodiment which is being manufactured, and shows a state before patterning a Schottky metal. This is in the first embodiment.

FIG. 22 is a sectional view schematically showing a conventional Schottky barrier diode.

FIG. 23 is a cross-sectional view schematically showing a state of the conventional Schottky barrier diode in the process of being manufactured, showing a state before patterning an ohmic metal for forming an anode electrode.

FIG. 24 is a sectional view schematically showing a conventional Schottky gate type field effect transistor.

FIG. 25 is a cross-sectional view schematically showing a state in the middle of manufacturing the conventional field effect transistor, showing a state before patterning an ohmic metal for forming source / drain electrodes.

[Explanation of symbols]

1 substrate 2 n-type semiconductor region (semiconductor region) 3 cathode electrode (first electrode) 4 anode electrode (second electrode) 5 gate electrode (first electrode) 6 source / drain electrode (second electrode) 7 High-concentration n-type impurity region (semiconductor region) 8 Epitaxial layer (semiconductor layer formed by heterojunction in semiconductor region) 100, 200, 300, 400 Schottky barrier diode (semiconductor device) 500 Schottky gate type field effect transistor (semiconductor apparatus)

Front Page Continuation (72) Inventor Satoshi Kayama 5-201-1, Josuihonmachi, Kodaira-shi, Tokyo Inside Hitate Cho-LS Engineering Co., Ltd. 5-20-20 Honcho Super RLS Engineering Co., Ltd. (72) Inventor Atsushi Kuroda 5-20-1 Josuihoncho, Kodaira-shi, Tokyo Incorporated (72) Inventor Nobuyuki Suzuki 5-201-1, Kamimizuhonmachi, Kodaira-shi, Tokyo Hitate Cho El SII Engineering Co., Ltd.

Claims (3)

[Claims] 1. A substrate formed of a compound semiconductor,
In a semiconductor device having a plurality of electrodes, at least a first electrode and a second electrode of the plurality of electrodes are Schottky junctions in the same or different semiconductor regions, and The barrier height at the junction of the second electrode is lower than the barrier height at the junction of the electrode. 2. The contact area of the second electrode with respect to the semiconductor region formed by joining the second electrodes to the contact area of the first electrode with respect to the semiconductor region formed by joining the first electrodes. Or the impurity concentration of the semiconductor region formed by joining the second electrode is higher than the impurity concentration of the semiconductor region formed by joining the first electrode, or Between the semiconductor region formed by joining the second electrode and the second electrode, is a semiconductor layer formed by heterojunction in the semiconductor region interposed?
2. The semiconductor device according to claim 1, wherein the semiconductor device comprises any one or a combination of two or more thereof. 3. The semiconductor device according to claim 1, wherein the second electrode is an anode electrode in a Schottky barrier diode or a source / drain electrode in a Schottky gate type field effect transistor.