JPH07302190A - Divider and image signal reading device using the same - Google Patents

Abstract

(57) [Abstract] [Purpose] The dividend is M + N (M ≧ N, M and N are natural numbers)
Although it is a bit, the dividend to be used is a divider that can make the number of bits smaller than M + N bits, and by using this divider, multivalued data whose number of bits is represented by N can be used for multivalued data of an image signal. Provided is an image signal reading device capable of suppressing an increase in circuit scale when performing a correction process and guaranteeing the accuracy of an obtained correction result. The shading correction means 44 is a divider, and the output of the A / D conversion means 42 is used as the dividend and the output of the storage medium 43 is used as the divisor to perform division, and the division result obtained by normalizing with 8 bits is added to the addition means. Output from 9. The shading correction unit 44 removes sensor distortion from the image signal read from the line sensor 41 and performs correction processing so that uniform output characteristics can be obtained. The peak correction means 49 is also the same divider as the shading correction means 44.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a divider and an image signal reading apparatus using the divider, and more particularly to a divider for dividing multi-valued data and an image using the divider as a correction means. Scanning, sampling in pixel units, expressing the gray scale of the image with multi-valued data, binarizing with white or black according to the density level, displaying the image, and displaying the color tone with multi-valued data. The present invention relates to an image signal reader.

[0002]

2. Description of the Related Art Copying apparatus, facsimile apparatus, image
Among the image signal reading devices such as the scanner device, for example,
Conventionally, in a facsimile apparatus, the density level of an image (transmission original) is measured by a line sensor (C
Line image is sequentially scanned by a CD image sensor, a contact image sensor, etc., and sampling is performed in pixel units.
The density level is represented by multivalued data. After that, the obtained multivalued data is subjected to γ correction processing and MTF (Modulation Transfer Fu
After the correction processing such as the correction processing is performed, the image is displayed by binarizing, for example, white or black according to the density level. Further, the binarized data is converted into MH (Modified
Huffman) coding method or MR (Modified Relativ)
The data is compressed by an e Element Address Designate (encoding) method, etc., and transmitted via a modem.

In general, a line sensor, which is a reading unit for a transmission original, irradiates the transmission original with light, collects reflected light according to the original density by an optical system such as a lens, and receives and photoelectrically converts the light in a sensor array. It is converted into an electric signal (for example, voltage value) and output as an image signal output. The image signal output thus read depends on the sensor position even when the same density is read due to the influence of the condensing characteristics of the imaging lens provided in the line sensor and the distortion of the electrical characteristics of the sensor array. , The output voltage value is not uniform (sensor output distortion), and accurate reading cannot be performed. Therefore, in general, before performing the binarization processing, the sensor output distortion is removed from the image signal read from the line sensor,
Correction processing (shading correction processing) is performed so that uniform output characteristics can be obtained.

FIG. 19 is a block diagram showing an example of a conventional image signal reading apparatus for performing a shading distortion correction process (Japanese Patent Laid-Open No. Sho 61-88).
63-52575). This image signal reading apparatus includes an image sensor 190 using a charge transfer device (CCD), a switch 191, and an A / D converter 1 for converting an analog image signal input from the image sensor into a digital signal.
92, a reciprocal converter 19 that outputs a reciprocal value that is a value obtained by dividing a predetermined reference value by the output of the A / D converter 192
3. Averaging circuit 194 and averaging circuit 194 for averaging a plurality of reciprocal values for one light receiving element of the image sensor
Random output that can be written to and read as needed.
Access memory (RAM) 195, D / A converter 196 for converting digital data stored in RAM 195 into analog data, analog multiplier 197 for multiplying document data by a correction value, analog data after correction into digital data It comprises an A / D converter 198 for converting.

In the image signal reading device having such a structure,
A reference signal (shading waveform) for shading correction is generated. When reading a white original with the lowest density level of the input image signal, the sensor output becomes maximum (absolute level), and the characteristics of the sensor output are most reflected, so the input image signal is normalized using that value as the reference signal. I am supposed to. First, with the switch 191 closed, a white original serving as a correction reference value is read, the processing by the A / D converter 192, the reciprocal converter 193, and the averaging circuit 194 is obtained, and the correction coefficient is written in the RAM 195. The procedure is performed for all the light receiving elements.

Next, shading correction is performed when actually reading the image. This is because when the document is read, the switch 191 is kept open, and the shading correction value corresponding to each light receiving element is output from the RAM 195 and multiplied by the analog multiplier 197.
The output characteristic distortion of the line sensor 190 is absorbed and converted into digital data by the A / D converter 198. As a result, the shading correction process is performed so that the digital data values obtained for the same density of the original document are substantially uniform among the pixels.

As another example of the conventional image signal reading device, an image signal reading device shown in the configuration diagram of FIG. 20 is known (Japanese Patent Laid-Open No. 2-22961). This image signal reading device includes an A / D converter 202 that converts an analog signal input from a line sensor into a digital signal, a switch 203, a RAM 205, a read only memory (ROM) 208, a selector 204, and the like.

In this image signal reading apparatus, the input signal on the signal line 201 is output by the A / D converter 202 to 1
The pixel is converted into a digital value of M bits. As a correction means, first, the white reference signal is input, and the switch 2
03 is connected to the RAM 205, and the A / D converter 2
Of the M bits forming the output of 02, the lower m bits (m <M) are selected by the selector 204, and the RAM 20
5, the number of pixels for one line is stored.

Next, when actually inputting the image signal of the read original,
Push the switch 203 to the ROM 208 side, and at the same time, RA
The contents of M205 are read. This allows ROM2
08 is an image signal (M bits) on the signal line 207 and RAM
A ROM which is accessed by using a reference signal (m bits) on the signal line 206 from the 206 as an address signal, and corresponding correction data is written in advance as table data.
From 208, shading-corrected data is output.

With this configuration, shading correction can be performed by R
When the OM table method is used, where a ROM having an address of 2M bits should be used, for example, m = M
By setting it to -1, it is possible to use a ROM having an address of (2M-1) bits, and it is possible to perform highly accurate correction processing without losing the information of the white reference signal. Furthermore, since the number of bits of the ROM address is suppressed to a small value, it is possible to suppress an increase in ROM capacity.

[0011]

However, in the case of performing the above shading correction, the conventional apparatus shown in FIG. 19 has a complicated circuit configuration due to the mixture of analog signal processing and digital signal processing.
Furthermore, since there are many places due to analog signal processing, it is very necessary to consider the influence of other disturbances (noise).
Further, in order to improve the bit precision of the multi-valued data obtained by the correction calculation process, the necessary A / D converters 192, 1
98 and the D / A converter 196, the only method that can be achieved is to achieve higher accuracy, and the circuit scale increases in proportion to the calculation accuracy.

On the other hand, in the conventional apparatus shown in FIG. 20, when the correction operation is performed on the multi-valued data by using the divider, the operation result for the operated value is
By using the ROM table system, which is stored in advance in a memory (for example, ROM) as table data, the operand value is accessed as the ROM address data,
There are those that obtain the calculation results. In this case, the calculation accuracy is increased by increasing the number of bits of the operand (the number of ROM address bits). However, since the table data required for the operation also increases in proportion to the number of bits of the operand, the memory capacity required for storing the table data also increases, resulting in an increase in the circuit scale. Will increase.

Further, in the conventional device of FIG. 20, even if the increase in circuit scale is prevented by suppressing the number of address bits, the number of bits of the operand value, for example, the number of bits of the shading waveform, is set. Although this can be achieved by dropping the number of bits, the number of bits that can be dropped as the number of bits of the shading waveform is limited to some extent when the correction accuracy of shading correction is secured to some extent.

In the present invention, the dividend is M + N (M ≧ N, M,
N is a natural number) bit, but the dividend to be used is a divider whose bit number can be smaller than M + N bits, and by using this divider, the number of bits is represented by N for multi-valued data of the image signal. An object of the present invention is to provide an image signal reading device that can suppress an increase in circuit scale when performing correction processing with multi-valued data and can guarantee the accuracy of an obtained correction result.

[0015]

In order to achieve the above-mentioned object, the divider of the present invention uses M bits (M is a natural number).
Multi-valued data division in which the multi-valued data represented by is divided into W (W is a natural number) multi-valued data each represented by K bits (K is a natural number) whose number of bits is smaller than the M bits and output. Means, selecting means for selecting and outputting any one of the multi-valued data represented by the W number of K bits extracted by the multi-valued data dividing means, and K bits obtained by the selecting means. The multi-valued data is a dividend, and the multi-valued data represented by N bits is a divisor, and the data obtained by performing the division process is normalized to P bits (P is a natural number) and output. The obtained P
Delay means for sequentially delaying multivalued data represented by bits; multivalued data represented by P bits extracted by the dividing means; and multivalued data represented by P bits obtained by the delay means. And a means for adding and outputting multi-valued data represented by S bits.

Further, in the divider of the present invention, the bit width of the multi-valued data extracted from the dividing means is determined according to the multi-valued data represented by K bits input from the selecting means to the dividing means. A variable shift means that varies can be provided. The delay means and the addition means input the data obtained by passing the output multivalued data of the variable shift means to the delay means, and add the output multivalued data of the delay means and the output multivalued data of the variable shift means. It may be configured to add by means.

Further, in the image signal reading device of the present invention, the image reading means for generating and outputting the image signal obtained by photoelectrically converting the reflected light from the reading surface of the subject, and the image signal from the image reading means are pixel-based. To M bits (M
Is a natural number) and A / D conversion means for converting into multi-valued data, and N bits of M-bit multi-valued data extracted from the A / D conversion means (where N is a natural number and M ≧ N).
Is a storage medium that stores and holds at least one line, and multivalued data represented by M bits from the A / D conversion means is a dividend, and N-bit multivalued data read from the storage medium is a divisor. , And a correction unit that performs division processing and normalizes the output result with S bits (S is a natural number) to output multi-valued data, and uses the divider of the present invention as the correction unit. It is a thing. As the correction means, there are shading correction means and peak correction processing section.

Further, in the apparatus of the present invention, the M-bit multi-valued data extracted by the A / D conversion means described above is the closest to the white level in the multi-valued data of one line scanned by the image reading means. Peak detection means for detecting value data and outputting multi-valued data represented by N bits, and multi-valued data that is closest to the white level in the line in line units during reading and scanning of the object by the image reading means. One of the ground density detecting means for detecting and outputting multi-valued data represented by N bits, one of the white peak value detected by the peak detecting means, and the multi-valued data representing the ground density detected by the ground density detecting means The first selection means for selecting and outputting and the M-bit multivalued data obtained by the A / D conversion means are the dividends, and the N-bit multivalued data obtained by the first selection means are the divisors. And a peak correction means for normalizing and outputting the data obtained by performing the division processing with S bits (S is a natural number), and using the above-mentioned divider of the present invention as the peak correction means. It was done.

Further, in the image signal reading device of the present invention,
First selection means for selecting and outputting one of the white peak value detected by the peak detection means and the multi-valued data representing the background density detected by the background density detection means, and the first selection means. A storage medium for storing and holding N bits of multi-valued data for at least one line and a multi-valued data represented by M bits as a dividend and a multi-valued data represented by N bits as a divisor for division processing. , Arithmetic means for outputting multi-valued data normalized to S bits, and dividend selection means for inputting the output multi-valued data of the A / D conversion means or the output multi-valued data of the arithmetic means to the arithmetic means as a dividend, 1 by the divisor selecting means for inputting the output multi-valued data of the selecting means or the output multi-valued data of the storage medium as a divisor to the calculating means, and the dividend selecting means
When selecting the output multi-valued data of the D conversion means, the divisor selection means selects the output multi-valued data of the first selection means, and when the dividend selection means selects the output multi-valued data of the arithmetic means, And a control means for selecting the output multi-valued data of the storage medium by the divisor selection means.

[0020]

In the divider of the present invention, the multi-valued data dividing means divides the multi-valued data represented by M bits into W multi-valued data represented by K bits each having a bit number smaller than the M bits. The multivalued data represented by W K bits are sequentially selected by the selecting means and supplied to the dividing means as the dividend, and the multivalued data represented by N bits is used as the divisor. The division processing is performed by supplying the division means. Then, the data obtained by this is P
The output is normalized to bits. Therefore, it is possible to reduce the number of bits of the dividend from M bits to N bits, which reduces the number of (K + N) -bit storage circuits in the dividing means, which originally required (M + N) -bit address terminals. It is possible to use one having an address terminal.

In the image signal reading device of the present invention, A
The N-bit of the image signal converted into the M-bit multi-valued data by the / D conversion unit is held in the storage medium for at least one line, and is supplied to the correction unit as a dividend,
The N-bit multi-valued data read from the storage medium by the correction means is used as a divisor to perform division processing using the divider of the present invention. Then, the output result is normalized with S bits to output multi-valued data. Therefore, it can be realized by all digital processing by using the divider. Further, since it is digital processing, it is possible to obtain substantially uniform operating characteristics, with little consideration given to the influence of variations in elements on the operating characteristics.

Further, since the correction accuracy of the correction means depends only on the accuracy of the table data written in the table of the correction means and the processing of the decimal part, the calculation error is in the number of bits with respect to the correction accuracy that should be originally obtained. The calculation accuracy is almost unrelated. From this, a highly accurate correction result can be calculated.

In the apparatus of the present invention, the M-bit multivalued data obtained by the A / D conversion means is used as the dividend, and the white peak value detected by the peak detection means and the background density detected by the background density detection means are represented. One of the multi-valued data is selected by the first selection means, and the peak correction means performs division processing as a divisor. Then, the obtained data is normalized with S bits (S is a natural number) and output. Therefore, by using the divider of the present invention as the above-mentioned peak correction means, the detected original document background density can be assigned to the high value of the multi-valued data even if the read original document has a background density. it can.

Further, in the present invention, multivalued data represented by M bits is used as a dividend, multivalued data represented by N bits is used as a divisor, and division processing is performed to output multivalued data normalized to S bits. The divisor and dividend are selected and input by the control means to the computing means. Accordingly, the calculation means can be shared in a time-sharing manner as a calculation means for peak correction processing and a calculation means for shading correction. As a result, although two calculation means are originally required, one correction means can realize two correction means.

[0025]

EXAMPLES Next, examples of the present invention will be described.

FIG. 1 shows a block diagram of a first embodiment of the divider of the present invention. In the figure, the divider receives multi-valued data represented by M bits via an input terminal 1 and divides into W multi-valued data represented by K bits each having a bit number smaller than the above M bits. Multi-valued data dividing means 3 for outputting the same and W extracted from the multi-valued data dividing means 3.
First selecting means 4 for selecting and outputting any one of multi-valued data represented by K bits, and first selecting means 4
The multi-valued data represented by K bits obtained by the above is used as the dividend, and the multi-valued data represented by N bits is used as the divisor, and the data obtained by the division processing is P bits (P is a natural number).
A division means 5 for normalizing and outputting, a half-value conversion means 6 for converting the multi-valued data represented by P bits obtained by the division means 5 into half-values, and a delay means 7 for sequentially delaying the half-values.
And a fraction processing means 8 and an addition means 9 for outputting multivalued data represented by S bits to the output terminal 10 as divided and normalized data.

Here, the multi-valued data input through the input terminal 1 is θ, the number of bits M is 8 bits, and the constituent bit data are a7, a6, a5, a4, a.
Assuming that they are 3, a2, a1, and a0 (however, a7 to a0 are binary data), the input multilevel data θ is expressed by the following equation.

[0028]

## EQU00001 ## .theta. = A7.times.128 + a6.times.64 + a5.times.32 + a4.times.16 + a3.times.8 + a2.times.4 + a1.times.2 + a0 (1) The multi-valued data dividing means 3 divides the multi-valued data .theta. That is, as an example of this division processing, if the multi-valued data θ is processed into W pieces (here, W = 2 for simplification, that is, two divisions), the multi-valued data θ is converted into 8-bit bit data. On the other hand, as shown in FIG. 2A, at most K bits for every 2 bits which is a value matching the division number 2, where K is a natural number, M ≧ K, and here M =
8. Since W = 2, K = 4) is extracted in units of bits to extract multivalued data α (constituent bit data: a7, a5, a3, a) represented by two or less 4 bits.
1) and β (configuration bit data: a6, a4, a2,
a0). Here, the multi-valued data α and the multi-valued data β are represented by the following equations, respectively.

[0029]

## EQU2 ## α = a7 × 128 + a5 × 32 + a3 × 8 + a1 × 2 (2)

[0030]

## EQU3 ## β = (a6 × 128 + a4 × 32 + a2 × 8 + a0 × 2) / 2 (3) The first selecting means 4 divides the multivalued data dividing means 3 into multivalued data α and multivalued data β. One of and is selected and output. Here, it is assumed that the multilevel data α and the multilevel data β are output in this order. The division means 5 performs division processing and P bits (P = 8 in this embodiment).
The values normalized by are prepared in advance as table data. Then, the dividing means 5 receives the multivalued data α and β selected by the first selecting means 4 as dividends (numerators), and the multivalued data represented by N bits via the input terminal 2 is a divisor (divisor). Input as the denominator) and perform the division operation.

Here, λ is multi-valued data input through the input terminal 2, the number of bits N is 8 bits, and the constituent bit data are b7, b6, b5, b4, b3, b.
2, b1 and b0 (however, b7 to b0 are binary data). The dividing means 5 uses table data as
For multi-valued data α, the result τ when division and normalization are performed is prepared. That is, the dividing means 5

[0032]

## EQU00004 ## The value .tau. For which .tau. = (. Alpha./.lambda.).times.255 (4) is prepared in advance as table data and stored in a storage means, for example, ROM, and the operands (dividend, divisor) are stored. , ROM table method is used in which the normalization result is obtained by accessing as ROM address data. This is a as address data
7, a5, a3, a1, b7, b6, b5, b4, b
12 bits (= K +) represented by 3, b2, b1, and b0
In step N), the ROM is accessed to obtain division and normalization data for the multivalued data α and the multivalued data λ.

The division and normalization data for the multivalued data β and the multivalued data λ are a6, a4, a2, a0, b7, b6, b5, b4, as address data.
12 bits (= K) represented by b3, b2, b1, and b0
+ N) accesses the ROM having the same table data as the ROM table to obtain the normalization result of the following equation for the value obtained by doubling the multivalued data β shown in the equation (3).

[0034]

Τ = (2β / λ) × 255 (5) This is the normalization result of the value obtained by doubling the multivalued data β. Therefore, the normalization result τ obtained by the expression (5) in the dividing means 5 is half-valued (1
// 2), a division result for the multivalued data β is obtained as represented by the following equation.

[0035]

(6) τ / 2 = (β / λ) × 255 (6) (β / λ) / 2 in FIG. 2A shows the division result half-valued by the half-value half conversion unit 6.

On the other hand, as the table data, since the division and normalization results are represented by 8-bit multivalued data, it is necessary to represent them by natural numerical values. However, since it is a division process, the calculation result is not necessarily a natural number. Processing for the fractional part is required. Therefore, the rounding operation is performed by rounding down or rounding off the decimal part, converting it to a natural number, and using it as table data.

The fraction processing means 7 processes the fraction (fractional part) generated by the half-value conversion processing in the half-value conversion means 6. That is, the fractional part is rounded or truncated to perform the natural number conversion process.

The delay means 7 delays the multi-valued data τ represented by 8 bits which is the normalized data obtained by the division means 5 by a predetermined number. Here, the multivalued data θ having the same dividend is delayed by the number (W = 2) divided by the multivalued data dividing means 3. Here, in the present embodiment, the case where the multi-valued data θ is divided into two is shown, and since the multi-valued data α and the multi-valued data β are selected and output by the first selection means 4 in this order, the division means From 5, the division results for the multivalued data α and the multivalued data β are sequentially output. From this, the process of delaying the division result for the multivalued data α so as to match the output timing of the division result for the multivalued data β is performed.

The adding means 9 is the above-mentioned multi-valued data α and β represented by the pair of 4-bits (= K) obtained by the multi-valued data dividing means 3 and is 8 bits inputted through the input terminal 2. 8 bits (==) obtained by the delay means 7, which is a normalization result for the multivalued data λ of the same value represented by (= N)
Normalized data for the multi-valued data α represented by P),
The multivalued data τ represented by 8 bits (= P) obtained by the dividing means 5 and the normalized data represented by 7 bits (= P−1) with respect to the multivalued data β obtained by the half-value converting means 6 , The value obtained by the fraction processing means 8 is added,
Multi-valued data represented by S bits (S = 8 in this embodiment) is output. In FIG. 2A, the result of this addition is (α /
It is schematically shown as λ) + {(β / λ) / 2}.

As described above, according to this embodiment, the number of bits of the dividend can be halved to a half (M → K: 8 → 4) of the conventional number. As a result, 16 bits (=
M + N, 64 k words) R in the dividing means 5 which was necessary
The capacity of the OM can be suppressed to 12 bits (= K + N, 4k words). Therefore, the capacity of the ROM is 1/1 times that of the conventional one.
It can be reduced by 6 times. Further, in the present embodiment, the division accuracy depends only on the accuracy of the table data written in the ROM table of the division means 5 and the processing of the decimal part generated by the half-value conversion means 6, and therefore the correction accuracy (originally obtained) , A calculation error of ± 1 occurs due to the representation of natural numbers), but a calculation result with high accuracy is calculated because the calculation error is less than ± 2 (almost unrelated to the number of bits) for natural numbers. can do.

As described above, according to this embodiment, the accuracy of the obtained operation result can be ensured even when the number of operation bits of the dividend is limited when performing the division operation. As the configuration of the divider required for the operation, the number of operation bits is limited, so that the increase in the circuit scale can be suppressed.

FIG. 3 shows a block diagram of an embodiment in which the divider of the first embodiment is constructed by hardware. In FIG. 3, a terminal 11 is an input terminal for multi-valued data θ represented by 8 bits, a terminal 12 is an input terminal for multi-valued data λ represented by 8 bits, a terminal 13 is an input terminal for control signals, and a terminal. Reference numerals 14 and 15 respectively denote input terminals for timing signals. The dividing circuit 16 is a circuit that divides the multi-valued data θ in bit units and is a circuit that constitutes the multi-valued data dividing means 3. Multilevel data selection circuit (M
The PX) 17 is a circuit for selecting and outputting one of two-input multi-valued data in accordance with a control signal, and constitutes the first selecting means 4.

Read only memory (ROM) 18
Has a 12-bit address terminal, and the value obtained by performing the division processing shown in the equation (4) and normalized by 8 bits in advance is stored as table data, and the dividend and the divisor are given as address data. When
The circuit for outputting the division result τ constitutes the division means 5. The shift circuit 19 is a circuit that half-values multi-valued data by performing bit shift of multi-valued data, and constitutes the half-value half conversion unit 6. Each of the latch circuits 20 and 22 is a D-type flip-flop that latches multivalued data at a predetermined timing. Latch circuit 20
Constitutes the delay means 7. The adder circuit 21
This is an addition circuit for multi-valued data, and is a circuit corresponding to the addition means 9. Further, the terminal 23 is an output terminal for multivalued data representing the division result.

Next, the operation of this embodiment will be described with reference to the timing chart of FIG. Multi-valued data θ input from terminal 11 as indicated by 11 in FIG.
(Θ1, θ2, θ3, ...) By the multi-valued data division circuit 16, multi-valued data α (constituent bit data: a7, a5) represented by 4 bits as shown in FIG. ，
a3, a1) and multivalued data β (constituent bit data: a6, a4, a2, a0) represented by 4 bits, and as shown in FIG. 4, α0, α1, α, respectively.
2 ,. ． ． , Β0, β1, β2 ,. ． ． Are output in order.

The above-mentioned multi-valued data α and β are supplied to the selection circuit 17, respectively, and output from the terminal 13 to 1 in FIG.
4 are selected alternately according to the control signal shown in FIG.
As shown in 7, α0, β0, α1, β1, α2, β
2 ,. ． ． As described above, the data are alternately combined in time series and then input to the address terminal of the ROM 18. This RO
In M18, 8-bit multi-valued data λ which is a divisor via the terminal 12, as shown in FIG.
λ2 ,. ． ． Input to the remaining address terminals in this order.

As a result, the ROM 18 receives multi-valued data α (constituent bit data: a7, a5, a3, a1) or multi-valued data β input from the multi-valued data selection circuit 17.
(Structure bit data: a6, a4, a2, a0) is the dividend (numerator) (α0, β0, α1, β1, α2, β
2 ,. ． ． ) And multi-valued data λ (configuration bit data: b7, b6, b5, b4, which is input through the terminal 12).
b3, b2, b1, b0) is the divisor (denominator) (λ0, λ
1, λ2 ,. ． ． ), And the data τ normalized to 8 bits is τα0, τβ0, τα1, τ
β1, τα2, τβ2 ,. ． ． Are taken out in the order of.

The shift circuit 19 shifts the output multi-valued data τ of the ROM 18 to the right by 1 bit and divides it by 1/2 to obtain the division result data τ / 2, as shown by 19 in FIG.
τα0 / 2, τβ0 / 2, τα1 / 2, τβ1 / 2, τ
α2 / 2, τβ2 / 2 ,. ． ． Output in the order of. The latch circuit 20 outputs the output division result data τ of the ROM 18 to
It latches at the rising edge of the timing signal 14 shown in FIG. The adder circuit 21 includes the latch circuit 20.
4 and the division result data τ shown by 20 in FIG. 4 and the half-valued data τ / 2 shown by 19 in FIG. 4 from the shift circuit 19.
And are added and output. The latch circuit 22 is
The output addition data of the adding circuit 21 is latched at the rising edge of the timing signal 15 shown in FIG. 4 from the terminal 15, and the result of division of the multivalued data θ and the multivalued data λ is obtained as shown by 22 in FIG. Normalized data (α / λ) +
It outputs {(β / λ) / 2} to the terminal 23.

By the way, in the present embodiment, when the division operation is performed, the number W into which the dividend is divided by the multi-valued data dividing means 3 is set to W = 2, that is, divided into two for the sake of simplicity. The maximum number of K bits per 2 bits that is a value corresponding to the number of divisions 2 (where K is a natural number, M ≧ K, here M = 8, W = 2, so K
= 4) each, the bit-wise division allows
It has been shown that the multi-valued data α (constituent bit data: a7, a5, a3, a1) and β (constituent bit data: a6, a4, a2, a0) represented by two or less 4 bits are divided. However, it is not limited to this, of course.
You may make it divide | segment into a high-order bit and a low-order bit component.

For example, as shown in FIG. 2B, when the division process is performed, the multivalued data dividing means 3 divides the dividend by two.
In the case of performing the division processing, the division method is divided into upper 4 bits and lower 4 bits, that is, multivalued data α (constituent bit data: a7, a6, a
5, a4) and β (constituent bit data: a3, a2,
When divided into a1 and a0), multivalued data α and β represented by two 4 bits can be represented by the following equations, respectively.

[0050]

(7) α = a7 × 128 + a6 × 64 + a5 × 32 + a4 × 16 (7)

[0051]

## EQU00008 ## .beta. = (A3.times.128 + a2.times.64 + a1.times.32 + a0.times.16) / 16 (8) In this case, the dividing means 5 divides and normalizes the multivalued data .alpha. As the ROM table data. Prepare the result τ of the following equation when conversion is performed.

[0052]

Τ = (α / λ) × 255 (9) This is 12 bits (= K +) as the address data.
N), that is, a7, a6, a5, a4, b7, b6,
When the ROM is accessed as b5, b4, b3, b2, b1, b0, multi-valued data α and multi-valued data λ
Obtained as normalized data for.

The normalized data for the multivalued data β and the multivalued data λ is 12 bits (= K + N) as address data, that is, a3, a2, a1, a0, b.
A value obtained by multiplying multi-valued data β represented by the following equation by 16 when a ROM having the same table data as the above ROM table is accessed as 7, b6, b5, b4, b3, b2, b1, b0 It is obtained as a result of normalization for.

[0054]

Τ = (16β / λ) × 255 (10) Therefore, the normalization result τ obtained by the half-value conversion unit 6 is half-valued (1/16 times),

[0055]

## EQU7 ## τ / 16 = (β / λ) × 255 (11) is obtained, and the division result for the multivalued data β is obtained as schematically shown in FIG.

By performing addition processing on the operation result thus obtained in accordance with the divided conditions, only the decimal part generated by the half-value half-converting means 6 is deteriorated, but the operation result for the dividend can be obtained. In addition, it is possible to easily achieve an increase in circuit scale. However, according to this division method, the above-mentioned division number 2
In comparison with the bit-by-bit division method in which a maximum of K bits are extracted for every 2 bits that is a value that coincides with, the arithmetic result has a large fractional part.

As another method, the dividend is divided into two or more parts, a division operation is performed for each of them, and the obtained operation result is added according to the divided condition, whereby the operation on the dividend is performed. You may make it obtain a result. For example, as shown in FIG. 2C, the dividend θ
The same processing can be achieved in the case of dividing into three. That is, at most K bits for every 3 bits, which is a value corresponding to the division number 3, (where K is a natural number, M ≧ K, here M
= 8 and W = 3, K = 3 is extracted, and the multi-valued data α (constituent bit data: a7, a4,
a1), β (constituent bit data: a6, a3, a0) and β ′ (constituent bit data: a5, a2, 0).

As a result, the multivalued data α and the multivalued data β
And the multivalued data β ′ are represented by the following equations, respectively.

[0059]

Α = a7 × 128 + a4 × 16 + a1 × 2 (12)

[0060]

Β = (a6 × 128 + a3 × 16 + a0 × 2) / 2 (13)

[0061]

Β ′ = (a5 × 128 + a2 × 16) / 4 (14) The first selecting means 4 divides the multivalued data dividing means 3 into multivalued data α, multivalued data β and multivalued data. Data β '
It is assumed that any one of the above is selected and output, and the multivalued data α, the multivalued data β, and the multivalued data β ′ are output in this order.

The dividing means 5 prepares in advance, as table data, values obtained by performing division processing and normalization by P bits (P = 8 in this embodiment). In this case, the first
The multivalued data α, β and β ′ selected by the selecting means 4 of the above are the dividend (numerator) and the multivalued data λ from the input terminal 2.
(Structure bit data: b7, b6, b5, b4, b3,
After performing division processing using b2, b1, and b0 (however, b7 to b0 are binary data) as a divisor (denominator), normalization is performed with 8 bits. As table data, division and Result of normalization τ
To prepare. That is,

[0063]

## EQU15 ## The value .tau. For which .tau. = (. Alpha./.lamda.).times.255 (15) is prepared in advance as table data and stored in a storage means, for example, a ROM, and the calculated values (dividend, divisor) are stored. A ROM table method is used, in which the normalization result is obtained by accessing as the ROM address data. This is 1 as address data
1 bit (= K + N), that is, a7, a4, a1, b
By accessing the ROM as 7, b6, b5, b4, b3, b2, b1, b0, the normalized data for the multivalued data α and the multivalued data λ is obtained.

The normalized data for the multivalued data β and the multivalued data λ is 11 bits (= K + N) as address data, that is, a6, a3, a0, b7, b.
6, b5, b4, b3, b2, b1, b0 are the above R
By accessing the ROM having the same table data as the OM table, the normalized result of the following equation for the value obtained by doubling the multivalued data β can be obtained.

[0065]

Τ = (2β / λ) × 255 (16) Therefore, the half-value half-converting unit 6 half-values (1/2 times) the obtained normalization result τ,

[0066]

## EQU17 ## τ / 2 = (β / λ) × 255 (17) is obtained, and the division result for the multivalued data β is shown in FIG.
Obtained as schematically shown in (c).

Further, multi-valued data β'and multi-valued data λ
The normalized data corresponding to 11 bits (= K + N) as address data, that is, a5, a2, 0, b7, b
6, b5, b4, b3, b2, b1, b0 are the above R
By accessing the ROM having the same table data as the OM table, the normalized result of the following equation for the value obtained by multiplying the multivalued data β ′ by 4 is obtained.

[0068]

Τ = (4β ′ / λ) × 255 (18) Therefore, the half-value half-converting unit 6 half-values (1/4 times) the obtained normalization result τ of the above equation,

[0069]

Τ / 4 = (β ′ / λ) × 255 (19) is obtained, and the division result for the multivalued data β ′ is shown in FIG.
Obtained as schematically shown in (c).

By performing addition processing according to the conditions under which the operation result thus obtained is divided, the half-value conversion means 6
Although only the fractional part generated by is deteriorated, it is possible to obtain the calculation result for the dividend. Further, the number of bits of the address of the ROM table can be reduced by one bit compared to the case where the dividend shown in this embodiment is divided into two, so that the ROM capacity can be reduced to 1/2.

When the division processing is performed, the dividend is divided, the division processing is performed for each division, and the addition processing is performed according to the division condition of the obtained calculation result. Therefore, the obtained calculation accuracy may deteriorate to some extent. Is inevitable.
However, since the calculation accuracy for each of the divided dividends can be ensured, it is possible to compensate for the calculation accuracy by considering the bit component to be truncated during the addition process and performing the rounding process or the truncation process.

From this, according to the present embodiment, the rounding error is unavoidable as the calculation result obtained even when the dividend is divided and the calculation is performed, but it is possible to easily secure the calculation accuracy to some extent. .

Furthermore, the divider according to the present invention is not limited to the above-mentioned configuration, and a configuration as shown in FIG. 5 or 6 is also conceivable.

FIG. 5 is a block diagram of a second embodiment of the divider according to the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted. In FIG. 5, the variable shift means 31 variably controls the bit width of the multivalued data, and the addition means 32 adds the output multivalued data of the variable shift means 31 and the output multivalued data of the delay means 33.

Similarly to the above, the multi-valued data θ represented by 8 bits is input from the terminal 1, and the multi-valued data dividing means 3 matches the division number 2, for example, as shown in FIG. A maximum of four data items are extracted for every two bits that are values to be converted into multi-valued data α represented by two four-bit data.
(Structure bit data: a7, a5, a3, a1) and multi-valued data β (Structure bit data: a6, a4, a2, a
0) is divided into two. The dividing means 5 is composed of, for example, the ROM 18 shown in FIG.
A total of 12 bits (= K + N) of data is inputted as address data from the first selecting means 4 and the input terminal 2 to output multi-valued data indicating a division result.

The variable shift means 31 uses the divided multi-valued data α
Is taken as the dividend and multivalued data λ as the divisor is taken out from the dividing means 5 because half value conversion is not necessary and the bit width is output as it is, while the divided multivalued data β Is a dividend and multivalued data λ is a divisor. When multivalued data as a result of division is taken out from the dividing means 5, half-value conversion is necessary. Therefore, division is performed by performing bit width control for bit shifting in the 1-bit subtraction direction. Multiply the resulting multi-valued data by 1/2 and output.

The adding means 32 first cancels the addition result of the previous stage held by the delay means 33 as the processing of the first stage, and inputs the division and normalization results for the multivalued data α from the variable shift means 31. To do. As a result, the addition means 32
From, the division and normalization results for the multi-valued data α are directly extracted and output to the output terminal 10.
The processing of the first stage is completed by being taken in by the delay means 33.

Next, as the processing of the second stage, the division and normalization result τ for the multivalued data β half-valued by the variable shift means 31 and the delay which is the division and normalization result for the multivalued data α. The output of the means 33 is added by the adding means 32, and the added output is taken out and output to the output terminal 10. Thereafter, the same operation as described above is repeated to perform division processing with the multi-valued data θ as the dividend and the multi-valued data λ as the divisor, and output the almost same result as when normalized by 8 bits. You can

According to this embodiment, even when the number of divided multi-valued data θ is increased, only the shift amount of the variable shift means 31 is controlled and the number of delay means 33 required is 1. Since the number of stages is sufficient, it is possible to suppress an increase in the circuit scale due to the number of divisions.

FIG. 6 is a block diagram of a third embodiment of the divider of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

In FIG. 6, the first dividing means 35 and the second dividing means 36 are prepared beforehand as table data with values obtained by division processing and normalization by 8 bits. That is, the first division means 35
And the second division means 36 divides the divided multi-valued data α and β extracted from the multi-valued data division means 3 into the dividend (numerator).
, And multi-valued data λ represented by 8 bits (configuration bit data: b7, b6, b5, b
4, b3, b2, b1, b0) as a divisor (denominator),
The results τ obtained by performing the respective division processing and the normalization processing when commonly input from the input terminal 2 are prepared in advance as table data for each of the divided multi-valued data α and β, and the storage means , For example, R
It is stored in OM.

As a result, 4-bit a7, a5, a3, a which constitutes the divided multi-valued data α as address data.
1 and 8 bits b7, b6, b forming the multivalued data λ
When a total of 12 bits of 5, b4, b3, b2, b1 and b0 are input to the first dividing means 35, the division and normalization result τα for the multivalued data α and λ is output from the first dividing means 35. Taken out. Similarly, 4-bit a6, a4, which form the divided multi-valued data β as address data,
a2 and a0, and 8 bits b7 forming the multivalued data λ,
When a total of 12 bits b6, b5, b4, b3, b2, b1 and b0 are input to the second dividing means 36, the division and normalization result τβ for the multivalued data β and λ is the second.
Is taken out from the division means 36.

The adding means 37 adds these division and normalization results τα and τβ, respectively, and outputs the addition output, which is output to the output terminal 10. Thereafter, the same operation as described above is repeated to perform division processing with the multi-valued data θ as the dividend and the multi-valued data λ as the divisor, and output the almost same result as when normalized by 8 bits. You can

According to the present embodiment, the desired division and normalization results can be obtained with a small number of processing steps, so that the operation processing can be speeded up. Further, according to the present embodiment, although division means corresponding to the number of divisions are required, as described above, since the configuration scale of each division means is sufficiently small, as a whole, when division processing is not performed, Compared with this, the configuration scale can be reduced.

Next, each embodiment of the image signal reading apparatus of the present invention will be described. FIG. 7 shows a block diagram of a first embodiment of the image signal reading apparatus of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

In FIG. 7, the apparatus of this embodiment has a line sensor 41, an A / D converter 42 for sampling the density level of an image in pixel units and converting it into multi-valued data, and at least one multi-valued data. Storage medium 4 for storing lines
3, shading correction means 44, peak detection circuit 4
5, peak holding means 46, ground concentration tracking means 47, second selection means 48, peak correction means 49, γ correction means 50,
It comprises a binarizing means 51, an output terminal 52 for binary data, and an output terminal 53 for multi-valued data.

In this embodiment, the line sensor 41 is line-sequentially arranged.
(One-dimensional scanning (main scanning direction) and sequential movement of the sensor position by (for example, reading the density level of the read original with a CCD sensor or contact sensor and changing the output voltage value according to the density level)) Sub-scanning direction)
The density level of the image is read, the read density level is sampled in pixel units, and the density level of the image represented by multiple gradations is converted into multi-valued data (the high density side (black) is low and low is low). The side (white) is assigned to a high value, and the image signal reading device for a read original is configured to perform binarization with white (minimum density level) or black (maximum density level) depending on the density level. In this embodiment, the divider according to the present invention is applied to each of the shading correction means 44 and the peak correction means 49.

Here, in the present embodiment, the A / D conversion means 4
2, the multilevel data in which the density level is represented by 8 bits in each pixel unit is output (0 to 255, the smaller value is assigned to the higher density level side),
The output terminal 53 outputs multi-valued data represented by 6 bits.

Next, the operation of the first embodiment will be described in detail.

In the line sensor 41, the read original is irradiated with light, reflected light according to the density level of the original is condensed by an optical system such as a lens provided in the line sensor 41, and the sensor array performs light reception and photoelectric conversion. By doing so, it is converted into an electric signal (voltage value) and output as an image signal output.

The A / D conversion means 42 is the line sensor 41.
The density level of the image read from is sampled in pixel units, and the density level is converted into multi-valued data represented by a resolution of M bits (here, M = 8). As a result, multi-valued data θ (0 to 255) for each pixel is output.

The storage medium 43 stores and holds N-bit (here, N = 8) multivalued data θ represented by 8 bits, which is the output of the A / D conversion means 42, for at least one line, and The multi-valued data stored at a predetermined timing is read out and output as λ.

The shading correction means 44 has the same configuration as that of the first embodiment of the divider shown in FIG. That is,
The multi-valued data θ output from the A / D conversion means 42 is the multi-valued data θ represented by 8 bits, and the multi-valued data λ read from the storage medium 43 is the multi-valued data θ output from the A / D conversion means 42. The multi-valued data λ corresponding to the read pixel position is read as a divisor, and is normalized with S bits (S = 8 in this case), that is, 256 gradations, and multi-valued data is output.

With the configuration shown above, the line sensor 4
A case where so-called shading correction processing is performed, in which the sensor distortion is removed from the image signal read from No. 1 and correction processing is performed so that uniform output characteristics are obtained, will be described.

First, the output distortion of the line sensor 41 output is detected. For this, the fact that the sensor output distortion is most reflected when the sensor output is maximum (absolute value) is used.

A white original or a white reflector is prepared, image information is scanned by the line sensor 41, and a voltage value corresponding to the density level is output in pixel units. A / D conversion means 42
Outputs a multi-valued data θ represented by 8 bits by sampling a voltage value based on the density level for each pixel with a fixed level reference value. The multi-valued data θ thus obtained is sequentially written into the storage medium 43 in the order of pixels read by the line sensor 41, for pixels in at least one line section.

At this time, in addition to the characteristics of the line sensor 41, it may not be possible to obtain the output of the line sensor 41 for a white document due to the influence of scratches or dust on the read document. Therefore, the line position of the original to be read is not fixed, and the white original read output of multiple lines is detected,
The influence of scratches or dust on the read document may be suppressed as much as possible by averaging the white document read output of each line in each pixel in the line.

Further, when the density level greatly changes between adjacent pixels, there is an influence of a sensor failure or the like, and the obtained image information cannot accurately read the density level of the read original. For this reason, it is necessary to perform processing so that the adverse effects of sensor failure or the like do not spread as much as possible.
Therefore, when the density level greatly changes between the adjacent pixels, interpolation processing such as averaging of the output values between the adjacent pixels may be performed to minimize the influence of the sensor failure or the like.

The sensor output when the white original thus obtained is read is stored in the storage medium 43 as multi-valued data with one line as a white reference waveform, a so-called shading waveform.

After the shading waveform is generated and stored in the storage medium, the read original is actually scanned by the line sensor 41 to detect and output the density level in pixel units. At this time, as described above, the line sensor has output distortion on a pixel-by-pixel basis. Therefore, the density level for each pixel read from the line sensor 41 and represented by the multi-valued data by the A / D converter 42 is a shading waveform for pixels corresponding to the same position in the line from the storage medium 43. The value data λ is selectively read and the normalization process is performed.

That is, with respect to each of the pixels, the value of the shading waveform represented by the multivalued data λ read from the storage medium 43 is used as a divisor, and the multivalue of the read original output from the A / D conversion means 42 is used. Using the data θ as a dividend, the shading correction means 44 divides and calculates the ratio of the output level and converts it into multi-valued data represented by S bits (S = 8 in this case) to perform normalization processing, so-called shading correction. Achieve processing. As a result, for example, when the density level of the read document is extremely low (white document),
The multi-valued data obtained by the shading correction means 44 is normalized to 255 (d), and conversely, when the density level is infinitely high (black original), the multi-valued data is normalized to 0 (d).

With the above shading correction processing, the sensor density distortion of each pixel is corrected for the original density read by the line sensor 41, so that the shading correction result for the same density level of the read original is substantially uniform in the line. Can be obtained.

The peak detecting means 45 is the line sensor 41.
With respect to the multi-valued data represented by 8 bits which has been subjected to the shading correction by the shading correction means 44, the multi-valued data closest to the white level among the multi-valued data in the line is sequentially detected in the order of read pixels. For example, as the detection process, the maximum value is sequentially detected from the head pixel of the line by size comparison, and at the end of the line, multi-valued data 45a represented by 8 bits relating to the detected maximum value is output as a peak value. Further, the maximum value in the line and the maximum value 45b in the middle of the line are simultaneously output.

Here, the range for peak detection is 1
Although it is a line, of course, it is not limited to this.
The peak detection processing may be performed only within a predetermined range within the line, for example, within the size of the read document, according to the size of the read document. For example, when the size of the line sensor 41 is larger than the size of the read document, the peak detection process is not performed on the area other than the read document. As a result, only the document density of the read document is read without detecting the density of the document roller or the reflection plate existing outside the read document area. It becomes possible to read.

When the peak value is detected, the influence of the characteristic of the line sensor 41 or the noise component is minimized by using the value calculated by the average or the weighted average with the peak value of the continuous or neighboring pixels. By doing so, an almost accurate peak value may be detected.

The peak holding means 46 is the peak detecting means 4
With respect to the white peak value 45a in each line detected by 5, the maximum value in a predetermined number of lines is detected, held and output.

The ground concentration tracking means 47 is the peak detection means 4
From the peak value detection result 45b of No. 5, the peak value for the reading line is output as the document background density so as to follow the white level which is line sequential or close to the white peak value in the line. Further, in this case, a predetermined tracking ground density lower limit value is set as a tracking range of the ground density to the black side, and for example, excessive ground density tracking when the read document is black is prevented.

Next, the background density tracking processing of the background density tracking means 47 will be described in detail with reference to the flowchart of FIG.

First, it is assumed that the processing is carried out pixel by pixel, and the reading of the read original by the line sensor is started (step 61). Then, the line sensor 4 for the read document
At the start of reading by 1, the predetermined value is set as the initial value of the tracking background density for the read document (step 62).
Here, the tracking lower limit value may be set as a predetermined initial value.

Then, the white peak value 45b detected in the line by the peak detecting means 45 is compared with the traced ground density (multivalued data) (step 63). At this time, if the traced ground density is larger than the white peak value 45b, the traced ground density is held and output (step 6).
5). If the traced ground density value (multivalued data) is smaller than the white peak value 45b, the ground density increase control for increasing the traced ground density value (multivalued data) is performed and output (step 64). At this time, since the traced place concentration is represented by 8-bit multivalued data, for example, a process of increasing it by one level is performed, and the obtained result is set as the traced place concentration.
Here, since the value of the traced land density is represented by multi-valued data of 8 bits, the upper limit value of the traced ground density to the white side is 255 (d).
Limit with.

The traced background density obtained by the above processing is output as the document background density for the reading position of the line sensor (step 65). The above steps 63 to 65 are repeated for each pixel until the end of one line. When the line ends, the process proceeds to the next step (step 66). Here, the follow-up to the white side may be performed within a predetermined area instead of performing the pixels in the entire area within one line.

At the end of the line, it is determined whether the reading line position is located in the middle of the read document or the document reading is completed (step 67). When it is determined that the read line position is located in the middle of the read document, the background density reduction processing is performed so that the tracked background density (multivalued data) follows the black side by a predetermined level (step 68). For example, by subtracting only one level, tracking processing to the black side is achieved. The value obtained by this processing is output as the traced ground concentration, and the step 63 is executed again.
~ 67 processing is performed. In this case, a predetermined lower limit of traced ground concentration may be set as a tracking range of the ground concentration to the black side, and processing may be performed so that the traced ground concentration does not fall below the value. If it is determined in step 67 that the reading of the original has been completed,
The above ground concentration tracking processing is ended (step 69).

The background density tracking means 47 detects and outputs the background density of the read document by the above background density tracking processing. Note that, in FIG. 8, only when the peak value detected with respect to the traced background density is large and only one level is increased in the multivalued data as the background density increase control in pixel units has been described. However, of course, the present invention is not limited to this. For example, the follow-up speed to the white side may be controlled by controlling the raising width. Furthermore, even if the tracking speed to the white side is delayed by controlling the increase of the background density only after a predetermined number of pixels with a large peak value detected for the tracked background density are detected, there is no problem at all. There is no.

Also, only the case where the background density reduction control is performed for each one-line reading control has been described, but the present invention is not limited to this. For example, the tracking speed to the black side may be controlled by controlling the amount of reduction in the background density reduction control, and conversely, by performing the background density reduction control in units of multiple lines, The following speed may be slowed down.

Returning to FIG. 7, the description will be continued. The second selecting means 48 compares the white peak value 46a held by the peak holding means 46 and the background density of the read document detected by the background density tracking means 47 with the binary value of multi-valued data described later. It corresponds to the digitization method or the output method of multi-valued data, and either one is selected and output.

The peak correction means 49 has the same configuration as the calculation processing of the shading correction means 44, and the second shading correction result obtained by the shading correction means 44 is selected by the second selection means 48.
A so-called peak correction in which a division operation is performed by either a white peak value 46a represented by multi-valued data of bits or a read document background density 47a, and normalization is performed by multi-valued data represented by 8 bits. Perform processing.

This peak correction means 49 is, for example, the second
When the peak correction is performed on the white peak value 46a selected by the selecting unit 48 of, the peak value detected when the white roller or the white document is read is used as the white peak value, and the peak correction result is as follows. The density level of the read document is reproduced almost faithfully and output.

On the other hand, the peak correction means 49 performs peak correction of the read document background density selected by the second selection means 48, for example, when a document having a background density is read, By the peak correction processing, the components are corrected so as to have the upper limit value on the white side of the multi-valued data represented by 8 bits.

The γ correction means 50 is the multivalued data for the read original read by the line sensor 41, and the result represented by the 8-bit multivalued data corrected by the shading correction means 44 and the peak correction means 49. , Γ correction processing is performed to output multi-valued data with 8-bit precision or less, for example, 6-bit precision. The γ correction means 50 is, for example, multi-valued data represented by 8-bit peak-corrected is input as an address, and is multi-valued data represented by 8-bit which is an input,
Γ represented by 6-bit multivalued data corresponding to each value
The ROM is configured to read out and output the correction result as table data by referring to a table stored in advance.

FIG. 9 shows an example of the conversion table of the γ correction means 50. In the figure, the horizontal axis shows the input peak correction processing result, and the vertical axis shows the γ correction result corresponding to the input. When the table data for performing the conversion process having the linear characteristic indicated by I in FIG. 9 is used as the γ correction result for the input data, the dark output distortion that is the sensor output characteristic is obtained in the region where the density level of the read document is high. Stray light components due to the characteristics or the light source of the line sensor 41 cannot be ignored,
The density level cannot be reflected correctly.

Therefore, in the present embodiment, as indicated by II in FIG. 9, the specific area on the high density side of the input is black solid as the γ correction processing, and on the low density level side. For the specific area of, the table data that is considered as the background density component and has a solid white color is prepared. By using such conversion table data, it is possible to obtain an output that guarantees 64 values as multi-valued data represented by 6-bit precision by the γ correction result.

The sensor output characteristic is not always a linear output characteristic with respect to the density level. Therefore, by checking the output characteristics of the sensor output with respect to the density level in advance, preparing table data for correcting the non-linear characteristics of the sensor output, and performing the γ correction processing, the linear output characteristics with respect to the density level are obtained as the γ correction result. May be obtained.

Further, at the time of γ correction processing, the bit precision of the input value or the output is determined and shown, but it is not fixed to this value. Of course, other bit precision may be used. However, by assigning the same or a small number of bits to the output bit precision of the γ correction result with respect to the input bit precision, it is possible to secure almost all the values corresponding to the bit precision as the value of the γ correction result obtained. It is possible.

Although the case where the γ correction table is performed by using the ROM is shown here, the present invention is not limited to this. The table data may be adaptively rewritten by using other storage means, for example, a RAM or the like, and finer γ correction processing may be performed.

The multi-valued data represented by 6 bits, which has been subjected to the shading correction, the peak value correction processing and the γ correction processing with respect to the multi-valued data corresponding to the density level of the read document, obtained by the γ correction means 50 is , Is output in the state of multi-valued data from the terminal 53, and is supplied to the binarizing means 51. Here, as will be described later, for example, the side having a high density level is assigned to black (eg, 1) and the side having a low density level is assigned to white (eg, 0) 2 corresponding to the density level of the multivalued data.
The binarization process is performed and the binary data is output from the terminal 52.

Next, the structure and operation of the binarizing means 51 will be described in detail with reference to FIG. FIG. 10 is a block diagram showing the configuration of the binarizing means 51.

In FIG. 10, a terminal 71 is an input terminal for multivalued data represented by 6 bits obtained by the γ correction means 50, and a storage medium 72 for storing multivalued data for at least two lines, an image. Area determination means 73, second γ correction means 7
4. It is connected to the edge enhancing means 75 for enhancing the edge means of the line drawing based on the density levels of the target pixel and the peripheral pixels. Further, the mixing unit 77 determines the density levels of the smoothing unit 76 and the edge emphasizing unit 75, which smooth the density levels of the target pixel based on the density levels of the target pixel and the peripheral pixels, by the image area determination unit 73. According to the result, mix at a predetermined ratio.

The binarizing means 78 binarizes the output of the edge emphasizing means 75. Further, a halftone processing section 80 is provided on the output side of the mixing means 77. Halftone processing unit 80
Is a first adding means 81 for adding data, a binarization circuit 82 for converting multi-valued data into binary data (for example, white or black) according to the density level, before and after binarization. Binarization error calculation means 83 and delay means 84, 85, 2 for calculating the quantization error of
It is composed of a storage medium 86 that stores and holds at least one digitization error, first to third calculating means 87 to 89, random number generating means 90, and second adding means 91. Further, the addition control means 79 controls the addition operation of the first addition means 81.

Here, in the present embodiment, as shown in FIG. 11, the image area is uniformly subdivided and each area is defined as one pixel. In addition, as an order of performing the binarization processing on each pixel, a case where the processing is sequentially performed for each pixel located in the main scanning direction and is sequentially performed for each line in the sub-scanning direction is shown. In this case, as shown in FIG. 11, the pixel to be binarized is the target pixel P (0), the line including the target pixel P (0) is the target line, and the target pixel is before and after the target pixel in the target line. Pixels of P (−2), P (−1),
P (1) and P (2), the line located immediately before the target line after binarization processing is the previous line, and the pixels P (-2), P (-1), and P (of the target line are 0), P
L (-2) and L for (1) and P (2), respectively.
Let (-1), L (0), L (1), and L (2). In addition, a line located immediately after the target line before the binarization process is set as the next line, and the pixel P (-
2), P (-1), P (0), P (1), and P (2), respectively, V (-2), V (-1), V (0), V
(1) and V (2).

Further, since the multivalued data representing the density level for each pixel is obtained by 6-bit multivalued data by the γ correction means 50 in this embodiment, the density level is 64 gradations. (0 to 63 gradations). Further, in this embodiment, multi-valued data represented by 64 gradations is converted into binary data.
As the binarization processing for converting into a data, the quantization error at the time of binarization is calculated, and the binarization error is added to the multivalued data of the peripheral pixels, so that the average density level is pseudo 64th floor. This figure shows the case where an error diffusion processing method, which is a method of expressing tones, is used.

FIG. 12 is an explanatory view for explaining this error diffusion processing. As a binarization error at the time of binarization, E01 and E0 are applied to the pixels L (0) and L (1) of the previous line, respectively.
2 and E10 for pixels P (−1) and P (0). In this case, as shown in FIG. 12A, for the pixel of interest P (0) to be binarized, the previous pixel P (-
The binarization error E10 of 1) is corrected by the correction coefficient α and added to the density level of the target pixel P (0). Similarly, the binarization error E01 of the pixel L (0) on the previous line is corrected by the correction coefficient β and added to the density level of the pixel of interest P (0).

Further, the binarization error E02 of the pixel L (1) on the previous line is corrected by the correction coefficient γ and added to the density level of the target pixel P (0). In other words, as shown in FIG. 12B, the binarization error E11 of the target pixel P (0) corrected by the correction coefficients α, β, γ is distributed to the peripheral pixels. As a result, since the binarization error is diffused to the peripheral pixels, the average densities of the images before and after the quantization can be matched.

Next, the binarization processing operation of the binarization means of FIG. 10 will be described. First, input from terminal 71,
The 6-bit multivalued data obtained by the γ correction means 50 is supplied to the storage medium 72, the second γ correction means 74, the image area determination means 73, and the edge enhancement means 75, respectively.

The storage medium 72 stores the output multi-valued data of the γ correction means 50 for at least two lines, and as the multi-valued data of the pixels of the previous two lines corresponding to the read pixel position from the line sensor 41, respectively. Multi-valued data of the previous line 7
The multi-valued data 72b of 2a and the line before the previous line is output.
Here, in the present embodiment, as shown in FIG. 13A, the multi-valued data 72a of the previous line is the target line, the multi-valued data 72b of the line before the previous line is the previous line with respect to the target line, and the multi-valued input of the terminal 71 is performed. The data is shown in correspondence with the next line to the line of interest.

The second γ correction means 74 contrasts the multivalued data 72a and 72b of the previous two lines read from the storage medium 72 and the input multivalued data from the terminal 71 according to the density level of the input. Make adjustments. This is realized by a processing method similar to that described for the γ correction means 50 in consideration of the density characteristic of a multi-valued image, the sharpness of an image obtained by binarization, and the like.
The correction result by the second γ correction means 74 is the smoothing means 7
6 is supplied.

The edge emphasizing means 75 uses the input multi-valued data (next line) from the terminal 71 and the multi-valued data 72a (line of interest) and 72b (previous line) read from the storage medium 72, as shown in FIG. As shown in the figure, weighting factors a, b, c, d, e, f, g, h, and i are determined for the density levels of the meshed pixel of interest and its surrounding pixels, and the corresponding weighting factors are defined. The density level of the target pixel P (0) is determined and output by multiply-add operation with the multivalued data.

The weighting factor gives a positive value (e) to the target pixel P (0) and negative values (a, b, c, d, f, g, h, The value of i) is given and distributed so that the sum of the weighting factors becomes 1. As a result, if the difference in density level between the peripheral pixel and the target pixel P (0) is large, the difference is further emphasized, and as a result, the image boundary portion such as a line drawing is emphasized.

The smoothing means 76 is the second γ correction means 74.
As shown in FIG. 13B, with respect to the multi-valued data of the three adjacent lines of the next line, the line of interest, and the previous line in the multi-valued data that has been subjected to the correction process in FIG. ) And the density level of the surrounding pixels,
As shown, the weighting factors a, b, c, d, e, f, g,
By defining h and i, the pixel of interest P
The density level of (0) is determined and output. Here, the weighting coefficient is given a positive value with respect to the target pixel P (0) and the peripheral pixels, and is distributed so that the sum of the weighting coefficients becomes 1. As a result, smoothing is performed so that the change in the density level of each pixel becomes smooth. Here, the degree of smoothing depends on how the weighting factor is given.

The area of the peripheral pixels of the smoothing filter is not limited to that shown in FIG. 13B, and in the case of a multi-valued image consisting of halftone dots, the area surrounding the halftone dot period is covered. It is necessary to use the pixel area and smooth it so as to detect the average density within the halftone dot period. Here, for the sake of convenience, the 3 × 3 pixel region as shown in FIG. 13B is used to show the principle.

The image area judging means 73 is, for example, as shown in FIG.
As shown in (A), two pixels L (−1), L that are peripheral pixels to the pixel of interest P (0) and sandwich the pixel L (0) of the previous line located above the pixel of interest P (0). (1) and the pixel V (0) of the next line located below the target pixel P (0)
Paying attention to the density levels of the four pixels of V (-1) and V (1) between the two pixels, the difference value of the density level from the target pixel P (0) is obtained as follows.

Two pixels L (-1) located in the main scanning direction,
The difference value Δ1 (absolute value) of the density level between the average value of the density levels of L (1) and the target pixel P (0) is obtained.

[0142]

Δ1 = | {(L (-1) + L (1)) / 2} -P (0) | (20) of two pixels V (-1) and V (1) located in the main scanning direction. The difference value Δ2 (absolute value) of the density level between the average value of the density levels and the target pixel P (0) is calculated.

[0143]

Δ2 = | {(V (−1) + V (1)) / 2} −P (0) | (21) Further, as shown in FIG. 14B, the pixel P (0) of interest is selected. Of the peripheral pixels, two pixels L (-) sandwiching the pixel P (-1) of the line of interest located to the left of the pixel of interest P (0) vertically
1), V (-1) and two pixels L sandwiching the pixel P (1) of the line of interest located to the right of the pixel of interest P (0) vertically.
Focusing on the density levels of the four pixels of (1) and V (1), the difference value between the density level of the pixel of interest P (0) and the density level of the pixel of interest P (0) is obtained as follows.

Two pixels L (-1) located in the sub-scanning direction,
The difference value Δ3 (absolute value) of the density level between the average value of the density levels of V (−1) and the target pixel P (0) is calculated.

[0145]

Δ3 = | {(L (-1) + V (-1)) / 2} -P (0) | (22) of two pixels L (1) and V (1) located in the sub-scanning direction. The difference value Δ4 (absolute value) of the density level between the average value of the density levels and the target pixel P (0) is calculated.

[0146]

[Expression 23] Δ4 = | {(L (1) + V (1)) / 2} -P (0) | (23) It is used that the density level of the read document largely changes at the boundary between the character and line drawing. However, the contour portion of the image can be detected by the difference value between the pixel of interest and the peripheral pixel.
Therefore, the optimum value for separating the contour part and the other parts is statistically determined from the distribution of difference values between pixels obtained for all pixels, and is set as the predetermined value dth. After that, it is determined whether the contour means of the image or not by comparing the difference value between pixels and the predetermined value dth. As a result, if there is a difference value larger than the predetermined value dth among the difference values Δ1 to Δ4, it is determined that the pixel of interest P (0) is located in the contour means of the image, The image area determination result is output.

Here, the area determination is performed based on the difference between the average density levels of the two pixels and the density level of the target pixel.
Change the density level change of black in the halftone dot image and white between halftone dots to 2
This is to avoid erroneous determination as a value image area.

When it is determined that the image belongs to the multi-valued image area portion, the degree of multi-valued image area property (transition part processing between the binary image area and the multi-valued image area) is determined from the degree of density level difference. Set at the same time.

Although the case where the multivalued data after the correction processing by the γ correction means 50 is used as the multivalued data for calculating the difference value of the density level is shown, the smoothing processing or the edge emphasis processing is performed. Multivalued data of, for example,
The image area discrimination accuracy may be enhanced by using the multivalued data after the smoothing processing in consideration of the halftone dot period.

The image area determination is not limited to the above method, and various determination methods can be used. For example, Japanese Patent Laid-Open No. 2-292956 and Japanese Patent Publication No.
As described in Japanese Patent Laid-Open No. 62355/1983, attention is paid to the dot periodicity, and first, a dot area is detected, and thereafter, Japanese Patent Laid-Open No. 58-1.
As described in Japanese Patent No. 15975, the difference between the density level change amount of a character / line drawing and a photographic image (excluding the halftone dot image) and the frequency of change are used to distinguish the character / line drawing and the photographic image, and as a result Alternatively, a binary image area of a character / line drawing and a multi-valued image area of a photograph (including a halftone image) may be discriminated.

Next, the mixing means 77 of FIG. 10 uses the first multi-value smoothed by the smoothing means 76 as a weighting coefficient determined by the output indicating the degree of multi-valued image area property by the image area determination means 73. The weighting coefficient for the data is t, and the weighting coefficient for the second multi-valued data in which the image boundary portion such as a character / line drawing is emphasized by the edge emphasizing means 75 is u (where t
+ U = 1, t ≧ 0, u ≧ 0), weighted averaging of the first and second multivalued data is performed with these weighting factors, and the obtained multivalued data is obtained for the pixel of interest P (0). Output as a density level.

Here, the edge-enhanced value is output in the binary image area, the smoothed value is output in the halftone area, and the intermediate means area of the binary image area and the multivalued image area is output as described above. According to the degree of multi-valued image area property obtained, the weighting coefficient is set to t ≦ u when the area is close to the binary image area, and t> u when the area is close to the multi-valued image area. Determine the concentration level for (0). Mixing means 7
The density level extracted from No. 7 is supplied to the first addition unit 81 and the addition control unit 79 in the halftone processing unit 80.

The first adding means 81 binarizes the corrected peripheral pixels into the multivalued data (0 to 63) represented by the L bits (L = 6) obtained by the mixing means 77. The data (-31 to 3-31) from the second adding means 91 indicating the error.
1) (described later) is added and output (-31 to 94) under the control of the output from the addition control means 79.

The binarizing means 82 is the first adding means 8
The multi-valued data (-31 to 94) for the target pixel P (0), which is the output of 1, is set as the binary data in accordance with the minimum density level (white) or the maximum density level (black).
And output it. That is, the density level represented by the output multi-valued data of the first adding means 81 and the predetermined threshold value t
The value is compared with h (for example, th = 32), and when it is equal to or larger than the threshold value th, it is white as binary data, and when it is smaller than the threshold value th, it is black as binary data. Is determined.

The binarization error calculation means 83 is provided with the binarization circuit 8
First adding means 8 based on the binary data obtained by 2
The binarization error for the output multi-valued data of 1 is calculated in G gradation. For this calculation, according to the binarization result in the binarization circuit 82, the value of the multi-valued data output from the first adding means 81 is output as a binarization error if it is black, and the first addition if it is white. A value obtained by subtracting the minimum density level (63) from the output multilevel data value of the means 81 is output as a binarization error.
In this case, the value range of the binarization error is −31 to 31 and is represented by 6 bits. From this, G = 6
Defined as 4.

The storage medium 86 is a binarization error calculating means 83.
By the binarization error represented by 6-bit multivalued data for the target pixel P (0) obtained by the above, the binarization error similarly obtained for each pixel in the line is sequentially stored for at least one line. Perform the process of holding. In addition, this storage medium 8
6 is a pixel P next to the pixel of interest P (0) to be binarized.
For the pixel L (1) on the previous line corresponding to the position (1), the stored binarization error E02 is read.

In this embodiment, as shown in FIG. 12A, a case will be described in which the binarization errors of three peripheral pixels are added when the error diffusion process is performed on the target pixel P (0). The processing at the time of this addition will be described below.

First, the binarization errors of the pixels on the previous line are sequentially reproduced from the storage medium 86. At this time, as described above, the binarization error E of the pixel L (1) on the previous line corresponding to the position of the next pixel P (1) of the pixel of interest P (0).
02 is played. Further, the binarization error E01 for the pixel L (0) reproduced immediately before from the storage medium 86 is once held by the delay means 85, delayed, and then output.

Further, the binarization error E10 of the pixel P (-1) immediately before in the line of interest with respect to the pixel of interest P (0) extracted from the binarization error calculation unit 83 is temporarily set by the delay unit 84. It is held, delayed, and then output.

The binarization errors E01, E02 and E10 of the three peripheral pixels obtained by the above processing are corrected by the first to third calculating means 87 to 89. That is,
The first to third calculating means 87 to 89 use the binarization error E10 of the previous pixel P (-1), and the pixels L (0) and L (1) of the previous line.
The correction processing is performed by multiplying the binarization errors E01 and E02 with respect to each of the predetermined coefficients α, β, and γ (where α + β + γ ≦ 1) determined from the positional relationship with the pixel of interest.

In this way, the second adding means 91
The addition processing of the correction results obtained by the first to third calculating means 87 to 89 is performed, and the addition is performed from the peripheral pixels (L (0), L (1), P (−1)) with respect to the target pixel P (0). The marginal error is output to the first adding means 81.

The addition control means 79 is the second addition means 91.
The addition operation of the output peripheral error of the above and the output multi-valued data of the mixing means 77 is controlled according to the density level of the input signal from the mixing means 77. That is, when the density level of the input signal from the mixing means 77 is the maximum density level (0) or the minimum density level (63), the output from the second adding means 91 is stopped. That is, the first addition means 81
The density level of the pixel of interest P (0) of the input signal from the mixing means 77 is in a range (1 to 1) other than the maximum or minimum density level.
Only in the case of 62), the operation of converging (adding) the binarization error from the peripheral pixels input from the second adding means 91 is performed.

The first adding means 8 thus obtained
The output data of 1 is binarized by the binarization circuit 82, is sequentially output for each pixel as a binarization result for the pixel of interest P (0), and is supplied to the selection unit 92.

By such error diffusion processing, multi-valued data represented by L bits obtained by the mixing means 77 is converted into G
Bits (where G is a natural number, G ≦ L) are requantized, the quantization error at that time is diffused to surrounding pixels, and halftone processing is performed to match the average density levels before and after binarization. .

It should be noted that when the quantization error of the peripheral pixels is added in the second adding means 91, the random number generating means 90 adds 2
A value independent of the value quantization error may be adaptively generated and added. However, as the value to be added, for example, -1 or 1 (but not limited to this)
Are adaptively added, and the total value of the addition results is controlled to be 0 so that the addition does not affect the average density level of the image.

Although not shown in this embodiment, the degree of diffusion of the quantization error to the peripheral pixels may be determined according to the degree of multi-valued image area property obtained by the image area determination means 73. Further, by the image area determination means 73,
In the multi-valued image area, the directional characteristic of the contour (the contour occurring in the main scanning direction or the contour occurring in the width scanning direction) is detected by the contouring means whose density level changes, and 2
When the pixel of interest to be binarized is located in the vicinity of the contour portion where the density level changes, when the binarization error from the peripheral pixels is added, it is located at a location beyond the contour portion with respect to the pixel of interest. The error diffusion processing is completed in each density level area by not adding the binarization error of the peripheral pixel and adding only the binarization error of the peripheral pixel existing in the same area as the target pixel. This makes it possible to prevent blurring of the contour portion in the multi-valued image area.

Further, as the halftone processing for displaying the multi-valued image area by the binary data, the case where it is performed by the error diffusion processing is shown in the present embodiment, but of course, it may be expressed by the dither method.

The binarization circuit 78 compares the multivalued data corresponding to the density level of the pixel of interest P (0) corrected by the edge emphasizing means 75 with a predetermined threshold value th to determine a predetermined value. When it is larger than the threshold value th, it is judged that it is white and the others are black, thereby generating and outputting binary data which can be represented by 1-bit digital data.

The selection means 92 is the binary data for the pixel of interest P (0), which is obtained by the binarization circuit 78 and the binary data from the binarization circuit 82 which has been halftone-processed by the error diffusion process. Each of the binary data thus obtained is input, and according to the determination result of the image area determination means 73, when the target pixel P (0) is located in the multi-valued image area, the binary data from the binarization circuit 82 is selected. In the case of a binary image area, binary data from the binarization circuit 78 is selected and output to the terminal 52 shown in FIGS. 7 and 10.

As described above, according to this embodiment, since the divider of the present invention shown in FIG. 1 is used as the shading correction means 44 for performing the shading correction processing, it can be realized by all digital processing. For this reason, when it is configured by hardware, it does not become an analog mixed type as in the conventional case, it is possible to prevent the circuit configuration from becoming complicated, and it is possible to easily realize high integration of the circuit. Further, in the present embodiment, since it is digital processing, it is possible to obtain almost uniform operation characteristics without considering the influence of the element variations on the operation characteristics.

Further, even when a highly accurate shading correction result is required, according to this embodiment, a highly accurate calculation result can be obtained without increasing the circuit scale of the divider. Therefore, by performing such shading correction, the same density of the read original is read due to the condensing characteristics of the imaging lens provided in the line sensor 41, the influence of the distortion of the electrical characteristics of the sensor array, or the temperature characteristics. Even when the output voltage value is not uniform due to the sensor position and accurate reading cannot be performed, this distortion can be removed with high accuracy, and it is possible to obtain the same density for the read original. The value of the multi-valued data that is obtained can be obtained as a substantially uniform value.

Further, in the present embodiment, when the peak correction processing is performed, for example, the divider of the present invention having the same configuration as that of FIG. 1 is used as the peak correction means 49. For this reason, since it can be realized by all digital processing, when it is configured by hardware as described above, it does not become an analog mixed type as in the conventional case, the complexity of the circuit configuration is prevented, and the circuit is highly integrated. Since it is easy to perform, and because it is digital processing, almost uniform operating characteristics can be obtained with little consideration given to the influence of variations in elements on the operating characteristics.

Further, even when a highly accurate peak correction result is required, it is possible to easily obtain a highly accurate calculation result without increasing the circuit scale of the divider.
By performing such peak correction, the peak detection unit 46 can be used even if the background density of the read document has density.
The ground concentration tracking means 47 can effectively detect the ground concentration. Therefore, the peak correction means 4 is used with the detected ground concentration.
By normalizing in pixel units according to 9, the document background density can be assigned to the high value of the multi-valued data.

As a result, even if the difference in the density level between the background density level and the density level representing the image information is small (the contrast is low), the contrast can be increased by the background density correction processing by the peak correction means 49. This makes it possible to easily separate the background density of the read document from the image information during the binarization process, and it is possible to improve the image quality of the binary image obtained at the same time.

Further, since the background density tracking means 47 finely tracks the background density of the original on a pixel-by-pixel and line-by-line basis, even if the background density of the read original changes successively, the background density can be accurately measured. It is possible to perform density correction and easily achieve high image quality of the obtained binary or multi-valued image.

Further, for example, the image area determination means 73 determines
When the error diffusion process is performed in the maximum density level area or the minimum density level area that can be determined to be located in the value image area, particularly in the outline portion of the character / line image area, the binary quantization error of the peripheral pixels is added. As a result, gradation is expressed, resulting in blurred contours, which eventually causes deterioration of image quality. However, according to this embodiment,
In the addition control unit 79, the maximum density level (0) or the minimum density level (6
In the case of 3), by controlling not to add the binarization error from the peripheral pixels, it is possible to prevent "blurring" at the boundary portion between the character and line drawing of the image obtained by binarization.

In the present embodiment, when the binarization error from the surrounding pixels is added during the error diffusion processing, the binary quantization error of the surrounding 3 pixels is targeted as described above and fixed to each. Although only the case where the correction processing is performed by performing the multiplication calculation of the correction coefficients α, β, and γ of 1 is shown, the similar processing may be achieved by a lookup table method instead of the multiplication calculation.

For example, the correction coefficients α = 0.6, β = 0.3, γ = 0.
In the case of 1, as shown in FIG. 15, the value of the conversion table can be determined (only positive values are shown because they are positive and negative and have the same value). Further, according to the lookup table method, the correction process can be controlled more finely than in the case where the correction coefficient is fixed. In addition, by optimizing the table data, a specific pattern (texture) is included in the output binary image that is pseudo-displayed in halftone.
It is possible to reduce the occurrence of adverse effects such as.

In addition, during the error diffusion process, by adding a random number when adding the surrounding binarization error, it is possible to prevent a fixed pattern (texture) from occurring in the obtained binary image. It is shown that the smoothness of the value image is realized.
However, the position where the random numbers are added is not limited to this, and addition processing may be performed before and after the processing means before the binarization processing, for example, the shading correction means. Further, there is no problem even if it is added to the output of the line sensor represented by an analog signal.

Further, only one method is shown as the target area and the error diffusion direction when performing the error diffusion processing.
Of course, the present invention is not limited to this, and the same effect can be obtained even when another target region or diffusion direction is set.

Furthermore, in the present embodiment, only the case where an image signal is handled as an analog input signal is shown, but of course, the present invention is not limited to this, and for example, when performing division processing of an audio signal or the like, the same configuration is applied. It goes without saying that such effects can be achieved.

By the way, when multivalued data represented by L gradation is binarized, character / line drawing areas and the contours of the images, and
By effectively extracting the halftone dot / photographic image area and performing the binarization processing according to the respective characteristics, it is possible to further improve the image quality of the obtained binary image. That is, when the original is in a multi-valued image area of a photographic image or a halftone dot image, it is represented by pseudo halftone by the error diffusion process, and a halftone image such as a halftone dot image is displayed.
Due to the relationship between the F characteristic and the halftone dot period of the halftone dot image, even if the density level read from the sensor is non-uniform, error density diffusion processing should be performed to average the density levels of surrounding pixels. Therefore, it is possible to improve the image quality by reducing the occurrence of harmful effects such as moire in the output binary image.

On the other hand, when the original is in the binary image area of the character / line drawing, the threshold value and the density level are compared to determine the value of 2
A simple binarization process for digitizing is performed. Here, the component or calculation error that cannot be completely corrected by the shading correction process or the peak correction process appears as a noise component on the multi-valued data. However, when binarizing this multi-valued data, in comparison of the magnitude with a fixed threshold, the multi-valued data oscillating before and after the threshold is moved back and forth by the threshold due to noise. As a result, there is a great possibility that the obtained binary data will be discontinuous.

Therefore, although not shown in the present embodiment, for example, the image area determination means 73 extracts the contour portion of the image in the character / line drawing area in which the image quality deterioration cannot be avoided by the notch generation in the simple binarization processing. , An optimum threshold according to the binary data of the adjacent pixels belonging to the same contour portion in order to adaptively determine the threshold value according to the density level or to maintain the continuity of the binary data of the adjacent pixels in the contour portion. By the smoothing process that performs the hysteresis binarization process in which the value is adaptively determined, the binary data at the contour portion in the binary image region such as the character / line image region where the density level changes abruptly and unstable It is possible to suppress discontinuity (notch) as much as possible. As a result, it is possible to further improve the image quality of the obtained binary image. Further, the shading correction processing or the peak correction processing described above can also correct a component that cannot be completely corrected or a noise component due to a calculation error.

Next, a second embodiment of the image signal reading device of the present invention will be described. FIG. 16 is a block diagram of the second embodiment of the image signal reading device of the present invention. In the figure, the same components as those in FIGS. 1 and 7 are designated by the same reference numerals, and the description thereof will be omitted.

In this embodiment, as shown in FIG. 16, a peak detecting means 45, a peak holding means 46, and a ground concentration tracking means 4 are provided.
7, a peak correction processing unit composed of the second selection unit 48 and the peak correction unit 49, and the A / D conversion unit 42.
It is located next to.

As a result, the A / D for sampling the density level of the image read from the line sensor 41 in pixel units and converting the density level into multivalued data represented by a resolution of M bits (M = 8 in this case). The multi-valued data (0 to 255) for each pixel extracted by the conversion means 42 is detected by the peak detection means 45 at the maximum value of so-called white peak value of the multi-valued data in the line and the maximum value in the middle of the line. Value detection is performed.

The peak correcting means 49 performs processing similar to the shading correcting means 44 on the 8-bit data selected by the second selecting means 48 for the multi-valued data obtained by the A / D converting means 42. A so-called peak correction process is performed in which a division operation is performed by a value of either a white peak value represented by multivalued data or a read document background density, and normalization is performed by multivalued data represented by 8 bits.

The storage medium 100 stores and holds at least one line of N-bit (here, N = 8) multivalued data θ represented by 8 bits obtained by the peak correction means 49, at a predetermined timing. The multi-valued data stored in is read and output. Shading correction means 101
Has the same configuration as that of the shading means 44, the multivalued data θ represented by 8 bits obtained by the peak correction means 49 is used as the dividend, and the multivalued data λ read from the storage medium 100 is used as the read pixel. Division processing is performed using the multi-valued data λ corresponding to the position as a divisor, and the obtained division result is output as S bits (S = 8 in this case), that is, multi-valued data normalized with 256 gradations.

That is, the shading correction means 101
Is the value λ of the shading waveform represented by the multivalued data read from the storage medium 100 for each pixel.
Is the divisor, the multilevel data θ output from the peak correction means 49 is the dividend, and the ratio of the output level is obtained and converted into multilevel data represented by S bits (S = 8 in this case) to obtain the normal value. A so-called shading correction process is achieved. Thus, for example, when the density level of the read document is extremely low (white document), the arithmetic processing unit 1
The multi-valued data obtained by 04 is 255 (d), conversely,
When the density level is extremely high (black original), the multi-valued data is normalized to 0 (d).

By the shading correction processing described above, the original density read by the line sensor 41 is
Since the sensor output distortion of each pixel is corrected, the shading correction result for the same density level of the read document can obtain a substantially uniform value within the line.

The multi-valued data for the read original read by the line sensor 41 is corrected by the peak correction means 49 and the shading correction means 101.
The multivalued data of bits is subjected to the same γ correction processing as the above-mentioned γ correction processing by the γ correction means 50, so that the multivalued data of 8-bit precision or less, for example, 6-bit precision. It is said that

According to this embodiment, during the correction processing of the read signal when the read original is read by the line sensor 41, A
The peak correction process is performed in the next stage of the / D conversion means 42. Therefore, when the analog signal is converted into multi-valued data by the A / D conversion means 42, if the reference signal in the A / D conversion means 42 is fixed, the maximum value of the input white reference signal is not always A / D. Even if the maximum value of the multi-valued data represented by M bits (M = 8) that can be output by the conversion unit 42 is not reached, according to the present embodiment, the maximum of the input white reference signal is corrected by the peak correction processing. The correction process can be performed so that the value becomes the maximum value of the multi-valued data represented by M bits (M = 8). Therefore, the input white reference signal to the line sensor 41 can be accurately captured as a shading waveform. Furthermore, in the present embodiment, since shading correction is performed using a highly accurate shading waveform, it is possible to obtain a highly accurate correction result.

Next, a third embodiment of the image signal reading device of the present invention will be described. FIG. 17 shows a block diagram of a third embodiment of the image signal reading apparatus of the present invention. 16, those parts which are the same as those corresponding parts in FIGS. 1 and 16 are designated by the same reference numerals, and a description thereof will be omitted.

In this embodiment, as shown in FIG. 17, a storage medium 110, a dividend selection means 111 for selecting a dividend, a divisor selection means 112 for selecting a divisor, and a division processing control means 1.
13, the above-mentioned multi-valued data dividing means 3, the first selecting means 4, the dividing means 5, the half-value converting means 6, the delaying means 7, the fraction processing means 8 and the adding means 9 are included in the calculating means 11
4. Data extracting means 115 for extracting desired multi-valued data from the multi-valued data obtained by the division processing of the calculating means 114
And 116 and so on.

The dividend selection means 111 outputs the multi-valued data θ of the output of the A / D conversion means 42 or the output of the data extraction means 115.
Any one of them is selected and output according to the control signal of the division processing control means 113. The divisor selection unit 112 divides either the multi-valued data obtained by the second selection unit 48 or the output multi-valued data λ of the storage medium 110 into the division processing control unit 113.
Select and output according to the control signal of.

In this case, when the dividend selection means 111 selects the output of the A / D conversion means 42, the division processing control means 113 selects the multivalued data obtained by the second selection means 48 from the divisor selection means. On the other hand, when the dividend selection means 111 selects the output multilevel data θ of the data extraction means 115, the output multilevel data λ of the storage medium 110 is selected by the divisor selection means 112.

In the data extraction means 115, the dividend selection means 111 selects the output of the A / D conversion means 42 as the dividend, and the divisor selection means 112 selects the multivalued data obtained by the second selection means 48 as the divisor. At this time, the result of the division and normalization processing by the calculation means 114, that is, the calculation result of the peak correction processing is extracted and output according to the control signal from the division processing control means 113.

In the data extraction means 116, the dividend selection means 111 selects the output of the data extraction means 115 as the dividend and the divisor selection means 115 selects the output λ of the storage medium 103 as the divisor for division and division. The result of the normalization processing, that is, the result of the shading correction processing is extracted and output according to the control signal from the division processing control unit 113.

According to this embodiment, the same effect as that of the second embodiment can be obtained, and the calculation means 114 is shared in a time division manner as a calculation means for peak correction processing and a calculation means for shading correction. There is. For this reason, although it is possible to realize with one arithmetic unit even though originally two arithmetic units are required, it is not necessary to prepare a plurality of arithmetic units, and the circuit scale can be reduced.

In this embodiment, when the arithmetic means 114 is time-division-multiplexed for another purpose, it is shown only when it is divided into two parts. However, the present invention is not limited to this. Even when it is used by time division multiplexing for a plurality of times, it can be easily achieved by the same configuration as the present configuration shown in the present embodiment.

Next, a fourth embodiment of the image signal reading apparatus of the present invention will be described. FIG. 18 shows a block diagram of a fourth embodiment of the image signal reading apparatus of the present invention. In the figure, the same components as those in FIGS. 1 and 7 are designated by the same reference numerals, and the description thereof will be omitted.

In this embodiment, a multi-valued data image such as a character / line drawing or a photograph is line-sequentially read by a line sensor 41 (a CCD sensor, a contact sensor or the like, for example, and the density level of the image is read, and the density level is read according to the density level. By changing the output voltage value), the density level of the image is read by one-dimensionally scanning (main scanning direction) and sequentially moving the sensor position (sub scanning direction). Then, the read density level is sampled in pixel units, and the density level of the image represented by multiple gradations is assigned by multi-value digital data (the higher density level side is assigned to black and the lower side is assigned to white). The white (minimum density level) or black (maximum density level) is binarized according to the magnitude of the density level, and the binarized data is displayed.
It is applied to a binarization processing device of a read image of an image transmission device (for example, a G3 standard facsimile device) that stores or transmits the data after the data is encoded by MH encoding or MR encoding. It was done.

In FIG. 18, 120 is a size conversion means for reducing and enlarging a read image, 121 is M binary data.
Coding means for carrying out coding by H coding or MR coding to perform data compression, 122 a modem for modulating the coded data, and 123 a line for transmitting the modulated coded data.

In this embodiment, binary data obtained by the same processing as that of the first embodiment shown in FIG. 7 is supplied from the binarizing means 51 to the size converting means 120. Enlargement / reduction processing for the size of the read document, movement processing (rotational movement, parallel movement, reverse movement, etc.), smoothing processing, etc. are performed by pulling processing, logical operation processing, or the like.

The encoding means 121 is the size conversion means 12
Binary data processed by 0 is set to 1 of G3 facsimile.
Data is compressed by MH coding or MR coding which is adopted as an international standard method of dimensional coding. In this encoding method, a short codeword is assigned to a run length having a high frequency of occurrence and a long codeword is assigned to a run length having a low frequency of occurrence according to the frequency of occurrence of a run length of binary data. By doing so, data compression is performed. The coded data compressed by the coding means 121 is modulated by the modem 122 and output to the line 123.

According to this embodiment, it is possible to realize a facsimile apparatus having the same effects as those of the first embodiment, having a simple circuit configuration and having high image quality. In this embodiment, the size conversion process is
Although the case of performing in the state of binary data has been shown, it is needless to say that a similar size conversion process may be performed in the state of multivalued data to obtain a binary image of higher image quality.

Further, according to the present invention, the binary data or multi-valued data obtained by the image signal reading device shown in the above embodiment is converted into another data processing device (for example, an image generating device, a data processing device). A data recording / reproducing device or a data transmitting / receiving device) may be used.

Further, the image signal reading apparatus of the present invention is a hardware
Although the embodiment achieved by using the processing method based on the hardware configuration has been described, the configuration method or components are not limited to this. Furthermore, the processing method according to the present invention is applied to software processing or DSP (Digital Signal).
Even when using a dedicated arithmetic processing unit such as a processor), the same effect can be realized by the same processing configuration.

[0210]

As described above, according to the divider of the present invention, the number of bits of the dividend is reduced from M bits to N bits, so that the division originally required the address terminals of (M + N) bits. There are few memory circuits in the means (K
Since it is possible to use the one having an address terminal of + N) bits, the number M of bits of the dividend can be reduced by half, so that the capacity of the memory circuit can be reduced as compared with the conventional one, and moreover, with high accuracy. The division result can be obtained. As a result, according to the present invention, even when the number of operation bits of the divider is increased, it is possible to prevent the circuit scale from exponentially increasing with respect to the number of bits.

Further, according to the image signal reading apparatus of the present invention, the correction means can be realized by all digital processing by performing the division processing by using the divider of the present invention as the correction means. In this case, the analog mixed type as in the conventional case can be avoided, the complexity of the circuit configuration can be prevented, and the high integration of the circuit can be easily realized.
Further, since the device of the present invention is digital processing, almost uniform operating characteristics are obtained with little consideration given to the influence of element variations on the operating characteristics and almost without considering the influence on almost uniform operating characteristics. be able to.

Further, since the correction accuracy of the correction means of the device of the present invention depends only on the accuracy of the table data written in the table of the correction means and the processing of the decimal part, there is a calculation error with respect to the correction accuracy that should be originally obtained. Since it is possible to calculate a highly accurate correction result because of the calculation accuracy that is hardly related to the number of bits, when the shading correction means or the peak correction means is used as the correction means, the distortion of the image reading means is corrected with high accuracy. Further, the background density of the read document can be accurately detected.

Further, in the apparatus of the present invention, by using the divider of the present invention as the peak correction means, even if the background density of the read document has density, the detected document background density is set to the high value of the multivalued data. Since it is possible to increase the contrast, it becomes easy to separate the background density of the read document from the image information at the time of the binarization processing, and it is possible to improve the image quality of the binary image obtained at the same time. it can.

Further, in the apparatus of the present invention, by sharing in time division as the calculation means for correction, two correction means can be realized by one calculation means although two calculation means are originally required. The circuit configuration can be further simplified.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of a divider according to the present invention.

FIG. 2 is an operation explanatory diagram of a divider.

FIG. 3 is a configuration diagram in which a divider of the present invention is configured by hardware.

FIG. 4 is a timing chart for explaining the operation of FIG.

FIG. 5 is a block diagram of a second embodiment of the divider of the present invention.

FIG. 6 is a block diagram of a third embodiment of the divider of the present invention.

FIG. 7 is a block diagram of a first embodiment of the image signal reading device of the present invention.

8 is a flowchart for explaining the operation of the background concentration tracking means in FIG.

9 is a diagram illustrating γ correction table data in FIG. 7. FIG.

10 is a block diagram of an embodiment of the binarizing means of FIG. 7. FIG.

FIG. 11 is a diagram showing an image signal processing target area in the image signal reading device of the present invention.

FIG. 12 is a diagram illustrating error diffusion processing in the image signal reading device of the present invention.

13 is an explanatory diagram of the operation of the edge enhancing means and the averaging means of FIG.

14 is an explanatory diagram of the operation of the image area determination means in FIG.

FIG. 15 is a diagram illustrating a conversion table for error diffusion processing according to the present invention.

FIG. 16 is a block diagram of a second embodiment of the image signal reading device of the present invention.

FIG. 17 is a block diagram of a third embodiment of the image signal reading device of the present invention.

FIG. 18 is a block diagram of a fourth embodiment of the image signal reading device of the present invention.

FIG. 19 is a block diagram of an example of a conventional image signal reading device.

FIG. 20 is a configuration diagram of another example of a conventional image signal reading device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Multivalued data input terminal used as a dividend, 2 ... Multivalued data input terminal used as a divisor, 3 ... Multivalued data dividing means, 4 ... First selecting means, 5 ... Division means, 6 ... Half-value converting means, 7 Three
3, 84, 85 ... Delay means, 8 ... Fraction processing means, 9, 3
2, 37 ... Addition means, 10 ... Division result output terminal, 31 ...
Variable shift means, 35 ... First division means, 36 ... Second division means, 41 ... Line sensor, 42 ... A / D conversion means, 43, 72, 86, 100, 110 ... Storage medium, 4
4, 101 ... Shading correction means, 45 ... Peak detection means, 46 ... Peak holding means, 47 ... Ground concentration tracking means, 48 ... Second selection means, 49 ... Peak correction means, 5
0 ... γ correction means, 51 ... binarization means, 52 ... binary data output terminal, 53 ... multi-value data output terminal, 73 ... image area determination means, 74 ... second γ correction means, 75 ... edge enhancement means , 76 ... Smoothing means, 77 ... Mixing means, 78, 82 ...
Binarization circuit, 79 ... Addition control means, 80 ... Halftone processing section, 81 ... First addition means, 83 ... Binarization error calculation means, 87-89 ... First to third calculation means, 91 ... 2nd addition means, 111 ... dividend selection means, 112 ... divisor selection means, 113 ... division processing control means, 114 ... calculation means,
115, 116 ... Data extracting means, 120 ... Size converting means, 121 ... Encoding means, 122 ... Modem.

Claims (13)

[Claims] 1. A division process is performed by using multivalued data represented by M bits (M is a natural number) as a dividend and multivalued data represented by N bits (N is a natural number) as a divisor, and an output result is S. In a divider that performs division processing represented by multivalued data of bits (S is a natural number), multivalued data represented by the M bits is represented by K bits (K is a natural number) each having a bit number smaller than the M bits. From multivalued data dividing means for dividing and outputting to W (W is a natural number) multivalued data, and the multivalued data represented by the W pieces of K bits extracted by the multivalued data dividing means , Selecting and outputting any one of them, and multivalued data represented by K bits obtained by the selection means as a dividend, and multivalued data represented by N bits as a divisor to perform division processing. The data obtained is P bits ( P
Is a natural number) and outputs the normalized multivalued data obtained by the dividing means, the delay means sequentially delaying the multivalued data obtained by the dividing means, and the P bits extracted by the dividing means. Dividing means for adding multi-valued data represented by P bits obtained by the delay means, and outputting multi-valued data represented by S bits. . 2. A variable shift means for varying the bit width of the multi-valued data extracted from the dividing means according to the multi-valued data represented by K bits input from the selecting means to the dividing means. The delay means and the adding means input the multi-valued data output from the variable shift means to the delay means, and input the multi-valued output data of the delay means and the output multi-value data of the variable shift means. 2. The divider according to claim 1, wherein the value data and the value data are added by the adding means. 3. The multi-valued data dividing means has a maximum of K constituent bits for each W bit having a value corresponding to the number of divisions W with respect to a bit array of M bits forming the multi-valued data. 2. The divider according to claim 1, wherein the multi-valued data represented by the W number of the K bits or less is divided by dividing the extracted bit unit. 4. The division in the case where the dividing means uses the multivalued data represented by K bits obtained by the multivalued data dividing means as a dividend and the multivalued data represented by the N bits as a divisor. 3. A storage medium which is prepared and stored in advance as multi-valued data obtained by normalizing P bits of a value corresponding to a result or a division result, and the storage medium. Divider. 5. The division means when the multivalued data represented by K bits obtained by the multivalued data division means is a dividend and the multivalued data represented by the N bits is a divisor, 3. The divider according to claim 1, wherein the divider is constituted by a numerical operation means for numerically performing the division processing and the P-bit normalization processing. 6. An image reading means for generating and outputting an image signal obtained by photoelectrically converting reflected light from a reading surface of an object, and the image signal from the image reading means is sampled in pixel units to obtain M bits (M Is a natural number) and A / D conversion means for converting into multivalued data, and N bits of the M-bit multivalued data extracted from the A / D conversion means (where N is a natural number and M ≧ N)
A storage medium that stores and holds at least one line, and multivalued data represented by M bits from the A / D conversion means as a dividend, and the N-bit multivalued data read from the storage medium is a divisor. And a correction means for performing a division process, normalizing the output result with S bits (S is a natural number), and outputting multivalued data, wherein the correction means has a multivalued value represented by the M bits. Multivalued data dividing means for dividing the data into W (W is a natural number) multivalued data each of which is represented by K bits (K is a natural number) whose number of bits is smaller than the M bits, and outputting the multivalued data. Selecting means for selecting and outputting one of the multivalued data represented by the K pieces of W extracted by the data dividing means, and multivalued data represented by K bits obtained by the selecting means. Dividend and expressed in N bits The data obtained by the division process as the divisor multi-level data P bits (P
Is a natural number) and outputs the normalized multivalued data obtained by the dividing means, the delay means sequentially delaying the multivalued data obtained by the dividing means, and the P bits extracted by the dividing means. Image including multivalued data represented by the P-bit obtained by the delay means and outputting multivalued data represented by S bits. Signal reader. 7. The correcting means changes the bit width of the multivalued data extracted from the dividing means in accordance with the multivalued data represented by K bits input from the selecting means to the dividing means. Variable shift means is provided, and the delay means and the adding means input the data obtained by passing the output multi-valued data of the variable shift means to the adding means to the delay means, and the output multi-valued data of the delay means and the variable 7. The image signal reading device according to claim 6, wherein the multi-value data output from the shift means is added by the addition means. 8. An image reading unit for generating and outputting an image signal obtained by photoelectrically converting reflected light from a reading surface of a subject, and the image signal from the image reading unit is sampled in pixel units, and M bits (M Is a natural number) and A / D conversion means for converting into multivalued data, and N bits of the M-bit multivalued data extracted from the A / D conversion means (where N is a natural number and M ≧ N)
A storage medium that stores and holds at least one line, and multivalued data represented by M bits from the A / D conversion means as a dividend, and the N-bit multivalued data read from the storage medium is a divisor. As a result, a shading correction means for performing division processing, normalizing the output result with S bits (S is a natural number) and outputting multi-valued data, and a peak correction processing for the multi-valued data extracted by the shading correction means. A shading correction means for performing multi-valued data represented by M bits, each of which is W represented by K bits (K is a natural number) whose bit number is smaller than the M bits. (W is a natural number) Multi-valued data dividing means for dividing and outputting the multi-valued data, and the multi-valued data represented by the W K bits extracted from the multi-valued data dividing means. From the selection means for selecting and outputting any one of them, the multivalued data represented by the K bits obtained by the selection means is used as the dividend, and the multivalued data represented by the N bits is used as the divisor for division processing. The obtained data is P bits (P
Is a natural number) and outputs the normalized multivalued data obtained by the dividing means, the delay means sequentially delaying the multivalued data obtained by the dividing means, and the P bits extracted by the dividing means. Image including multivalued data represented by the P-bit obtained by the delay means and outputting multivalued data represented by S bits. Signal reader. 9. An image reading means for generating and outputting an image signal obtained by photoelectrically converting reflected light from a reading surface of a subject, and the image signal from the image reading means is sampled in pixel units to obtain M bits (M Is a natural number) and A / D conversion means for converting into multi-valued data, and the M-bit multi-valued data taken out from the A / D conversion means, Peak detection means for detecting multi-valued data closest to the white level in the value data and outputting multi-valued data represented by N bits; and line scanning in line units while the object is being read and scanned by the image reading means. , A ground density detecting means for detecting multivalued data closest to the white level and outputting multivalued data represented by N bits, a white peak value detected by the peak detecting means, and the ground density. First selecting means for selecting and outputting one of the multivalued data representing the background density detected by the outputting means, and M-bit multivalued data obtained by the A / D converting means for the dividend, Peak correction means for normalizing and outputting data obtained by performing division processing using N-bit multivalued data obtained from the selection means as a divisor, the peak correction means , The multi-valued data represented by M bits is divided into W pieces (W is a natural number) of multi-valued data represented by K bits (K is a natural number) each having a bit number smaller than the M bits and output. Multi-valued data division means, second selection means for selecting and outputting any one of the multi-valued data represented by the W K bits extracted from the multi-valued data division means, and the second selection means. K bits obtained by the selection means Division means for normalizing and outputting data obtained by performing division processing with multivalued data represented as a dividend and multivalued data represented by N bits as a divisor; and Delay means for sequentially delaying the multivalued data represented by the P bits obtained by the division means, multivalued data represented by the P bits extracted by the division means, and P bits obtained by the delay means An image signal reading apparatus comprising: an addition unit configured to add the multi-valued data represented by and output the multi-valued data represented by S bits. 10. The peak correction means or the shading means converts the bit width of the multivalued data extracted from the division means into multivalued data represented by K bits input from the selection means to the division means. A variable shift means that varies according to the variable shift means is provided, and the delay means and the adder input the output multi-value data of the variable shift means to the delay means, and the output multi-value of the delay means. 10. The image signal reading device according to claim 8, wherein the data and the output multi-valued data of the variable shift means are added by the adding means. 11. A storage medium for storing and holding at least one line of N bits (where N is a natural number and M ≧ N) of S-bit multi-valued data extracted by the peak correction means, and the peak. The multivalued data from the correction means is used as the dividend, the N-bit multivalued data read from the storage medium is used as the divisor, and the data obtained by performing the division process in the same configuration as the peak correction means is converted into S bits. The image signal reading device according to claim 9, further comprising a shading correction unit that outputs normalized multivalued data. 12. An image reading means for generating and outputting an image signal obtained by photoelectrically converting reflected light from a reading surface of a subject, and the image signal from the image reading means is sampled in pixel units, and M bits (M Is a natural number) and A / D conversion means for converting into multi-valued data, and the M-bit multi-valued data taken out from the A / D conversion means, Peak detecting means for detecting multivalued data closest to the white level in the value data and outputting multivalued data represented by N bits (where N is a natural number, M ≧ N); During the reading and scanning by the reading means, the multi-valued data that is closest to the white level in the line is detected on a line-by-line basis and the multi-valued data represented by N bits is output. First selecting means for selecting and outputting one of the white peak value and the multivalued data representing the background density detected by the background density detecting means, and N of the multivalued data extracted from the first selecting means. A storage medium for storing and holding bits for at least one line, and multivalued data represented by M bits as a dividend, and multivalued data represented by N bits as a divisor are used for division processing, and S
Arithmetic means for outputting multivalued data normalized to bits (S is a natural number); and a dividend for inputting the output multivalued data of the A / D conversion means or the output multivalued data of the arithmetic means as a dividend to the arithmetic means. Selecting means, a divisor selecting means for inputting the output multi-valued data of the first selecting means or the output multi-valued data of the storage medium as a divisor to the computing means, and the dividend selection means of the A / D converting means. When selecting the output multi-valued data, the divisor selecting means selects the output multi-valued data of the first selecting means, and when the dividend selecting means selects the output multi-valued data of the computing means, An image signal reading apparatus comprising: a control unit that selects output multilevel data of the storage medium by a divisor selection unit. 13. The multilevel data extracted after the division processing is divided into two values depending on the density level of the multilevel data.
The image signal reading device according to claim 6, further comprising a binarizing unit that performs a binarizing process.