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JPH0774280A - Flexible circuit board having bump and production thereof - Google Patents

Flexible circuit board having bump and production thereof

Info

Publication number
JPH0774280A
JPH0774280A JP24056993A JP24056993A JPH0774280A JP H0774280 A JPH0774280 A JP H0774280A JP 24056993 A JP24056993 A JP 24056993A JP 24056993 A JP24056993 A JP 24056993A JP H0774280 A JPH0774280 A JP H0774280A
Authority
JP
Japan
Prior art keywords
wiring pattern
circuit wiring
forming
insulating base
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24056993A
Other languages
Japanese (ja)
Other versions
JP3224056B2 (en
Inventor
Masakazu Inaba
雅一 稲葉
Norimasa Fujita
憲政 藤田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to JP24056993A priority Critical patent/JP3224056B2/en
Publication of JPH0774280A publication Critical patent/JPH0774280A/en
Application granted granted Critical
Publication of JP3224056B2 publication Critical patent/JP3224056B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Landscapes

  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To provide a flexible circuit board, and production method thereof, having a circuit wiring pattern narrower than the diameter of a conduction hole for forming a bump in which bumps having uniform profile can be formed stably. CONSTITUTION:The flexible circuit board comprises a flexible insulating base member 1 having one side formed with a circuit wiring pattern 8 and the other side provided with bumps 7 each having one end being jointed electrically, on the other side of the base member 1, with the circuit wiring pattern 8 through the insulating base member 1 at a position corresponding to the wiring pattern 8 and the other end projecting outward from the base member 1, wherein the width of the wiring pattern 8 is set shorter than the diameter of a conduction hole 6 for the bump 7.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、可撓性絶縁べ−ス材上
に所要の回路配線パタ−ンを有し、この回路配線パタ−
ンに電気的に接合すると共に該絶縁べ−ス材を貫通して
外部に突出する回路部品の為のバンプを備える可撓性回
路基板及びその製造法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a required circuit wiring pattern on a flexible insulating base material.
The present invention relates to a flexible circuit board having a bump for a circuit component which is electrically joined to a substrate and which protrudes to the outside through the insulating base material and a method for manufacturing the flexible circuit board.

【0002】[0002]

【従来技術とその問題点】IC等の回路部品を搭載する
為の端子、或いは回路部品を検査する為の端子等の、所
謂、バンプを備えたこの種の可撓性回路基板としては、
図4に示すように可撓性絶縁べ−ス材21の一方面に所
要の回路配線パタ−ン22を備え、そして絶縁べ−ス材
21の他方面に於ける回路配線パタ−ン22の位置する
該当部位からこの絶縁べ−ス材21を貫通して一端が回
路配線パタ−ン22に電気的に接合すると共に、他端が
該絶縁べ−ス材21の外部に突出する回路部品の為のバ
ンプ27を具備するように構成したものがある。ここ
で、回路配線パタ−ン22は、バンプ形成の為の孔26
よりも幅広に形成されている。
2. Description of the Related Art As a flexible circuit board of this type having a so-called bump, such as a terminal for mounting a circuit component such as an IC or a terminal for inspecting a circuit component,
As shown in FIG. 4, a required circuit wiring pattern 22 is provided on one surface of the flexible insulating base material 21, and the circuit wiring pattern 22 on the other surface of the insulating base material 21 is provided. One end of the circuit part which penetrates the insulating base material 21 from the corresponding position and is electrically connected to the circuit wiring pattern 22 and the other end of which protrudes to the outside of the insulating base material 21. For example, some bumps 27 are provided for the purpose. Here, the circuit wiring pattern 22 has holes 26 for forming bumps.
It is formed wider than.

【0003】図5はこのようなバンプを備えた可撓性回
路基板の製造工程図を示すもので、まず同図(1)のよ
うに、可撓性又は硬質の絶縁べ−ス材21の一方面に所
要の回路配線パタ−ン22を形成すると共に、絶縁べ−
ス材21の他方面にはメタルマスク23を形成する。
FIG. 5 is a manufacturing process drawing of a flexible circuit board having such bumps. First, as shown in FIG. 1A, a flexible or hard insulating base material 21 is formed. A required circuit wiring pattern 22 is formed on one surface and an insulation board is formed.
A metal mask 23 is formed on the other surface of the metal material 21.

【0004】このメタルマスク23は、回路配線パタ−
ン22の位置する該当部分に孔24を有するように形成
される。そして、回路配線パタ−ン22の表面にはポリ
イミドワニス等の印刷又はキュアにより表面保護層25
を形成する。この表面保護層25は、ポリイミド等の可
撓性絶縁フィルムを接着剤で貼り合わせて構成すること
もできる。
This metal mask 23 is a circuit wiring pattern.
The hole 24 is formed in a corresponding portion where the hole 22 is located. A surface protection layer 25 is formed on the surface of the circuit wiring pattern 22 by printing or curing with polyimide varnish or the like.
To form. The surface protection layer 25 may be formed by bonding a flexible insulating film such as polyimide with an adhesive.

【0005】次に、同図(2)の如く、メタルマスク2
3の側からエキシマレ−ザ−光Aを照射して回路配線パ
タ−ン22に達する導通用孔26を絶縁べ−ス材21に
形成する。
Next, as shown in FIG. 2B, the metal mask 2
An excimer laser light A is irradiated from the side of 3 to form a conducting hole 26 in the insulating base material 21 which reaches the circuit wiring pattern 22.

【0006】次いで、同図(3)のように、不要となっ
たメタルマスク23をエッチング等の手段で除去した
後、同図(4)の如く、導通用孔26に対して一端が回
路配線パタ−ン22に電気的に接合すると共に他端が絶
縁べ−ス材21から外部に突出するような形状のIC等
の回路部品接続の為のバンプ27を良導電性金属のメッ
キ等の手段で充填処理して形成する。
Next, after removing the unnecessary metal mask 23 by means of etching or the like as shown in FIG. 3C, one end of the circuit wiring is connected to the conduction hole 26 as shown in FIG. A bump 27 for electrically connecting to the pattern 22 and having the other end protruding from the insulating base material 21 to the outside for connecting a circuit component such as an IC is formed by plating with a conductive metal. To fill and form.

【0007】このような手法によれば、バンプ用孔26
の形成部の回路配線パタ−ン22をバンプ用孔26の直
径よりも小さく構成してバンプ配置密度を向上させよう
としても、バンプ27をメッキで構成する際には、メッ
キパタ−ンが導通用孔26の底部の一部分にしか存在し
ないので、均一な形状のバンプを形成することはできな
い。
According to such a method, the bump holes 26 are formed.
Even if an attempt is made to improve the bump arrangement density by making the circuit wiring pattern 22 of the forming portion of the bump smaller than the diameter of the bump hole 26, when the bump 27 is formed by plating, the plating pattern is for conduction. Since only a part of the bottom of the hole 26 exists, it is not possible to form a bump having a uniform shape.

【0008】また、上記手法の場合には、バンプ形成部
に位置する回路配線パタ−ン22はバンプ直径よりも幅
広に形成しなければならないから、微細回路配線パタ−
ンの形成能力を十分に発揮することができず、高密度実
装対応基板を提供することができないという問題があ
る。
Further, in the case of the above method, since the circuit wiring pattern 22 located in the bump forming portion must be formed wider than the bump diameter, the fine circuit wiring pattern is required.
However, there is a problem that the substrate forming capability cannot be fully exerted, and a substrate for high-density mounting cannot be provided.

【0009】[0009]

【課題を解決するための手段】本発明は、バンプ形成の
為の導通用孔の直径よりも幅の狭い回路配線パタ−ンを
有し、また、均一な形状のバンプを安定に形成すること
ができるバンプを備えた可撓性回路基板及びその製造法
を提供するものである。
The present invention has a circuit wiring pattern having a width narrower than the diameter of a conduction hole for forming a bump and stably forming a bump having a uniform shape. The present invention provides a flexible circuit board having bumps that can be manufactured and a method for manufacturing the same.

【0010】その為に本発明では、可撓性絶縁べ−ス材
の一方面に所要の回路配線パタ−ンを備え、上記絶縁べ
−ス材の他方面に於ける上記回路配線パタ−ンの位置す
る該当部位からこの絶縁べ−ス材を貫通して一端が上記
回路配線パタ−ンに電気的に接合すると共に他端がこの
絶縁べ−ス材の外部に突出する回路部品接続の為のバン
プを具備する可撓性回路基板に於いて、上記回路部品接
続の為のバンプと電気的に接続される回路配線パタ−ン
幅は、上記バンプの為の導通用孔の直径よりも小さく形
成されていることを特徴とするバンプを備えた可撓性回
路基板が提供される。
Therefore, according to the present invention, the required circuit wiring pattern is provided on one surface of the flexible insulating base material, and the circuit wiring pattern on the other surface of the insulating base material is provided. For the connection of circuit parts that penetrates the insulating base material from the corresponding portion located at the position of 1 to electrically connect one end to the circuit wiring pattern and the other end protrudes to the outside of the insulating base material. In the flexible circuit board having the bumps, the width of the circuit wiring pattern electrically connected to the bumps for connecting the circuit components is smaller than the diameter of the conduction hole for the bumps. Provided is a flexible circuit board having bumps formed thereon.

【0011】また、その為の製造法としては、可撓性絶
縁べ−ス材の一方面には回路配線パタ−ンを形成する為
の導体層を有し、この導体層の表面には所要の回路配線
パタ−ンを形成する為のエッチングレジストパタ−ンが
形成されると共に、上記可撓性絶縁べ−ス材の他方面に
メタルマスクを形成し、このメタルマスクには上記回路
配線パタ−ンを形成する為のレジストパタ−ンが位置す
る該当部分にその直径が上記回路配線パタ−ンよりも大
きな孔を形成し、次に上記メタルマスク側からエキシマ
レ−ザ−光を照射して上記孔の部位から上記回路配線パ
タ−ンを形成する為の導体層に達する導通用孔を形成
し、次いで上記メタルマスク層を剥離し、上記導通用孔
に対して一端が上記導体層に電気的に接合すると共に他
端が上記絶縁べ−ス材の外部に突出する回路部品接続の
為のバンプを形成した後、上記導体層をエッチングして
回路配線パタ−ンを形成し、次に上記レジスト層を除去
し、次いで上記回路配線パタ−ンの表面に表面保護層を
形成する各工程を採用することができる。
As a manufacturing method therefor, a conductor layer for forming a circuit wiring pattern is provided on one surface of the flexible insulating base material, and a required surface is formed on the conductor layer. An etching resist pattern for forming the circuit wiring pattern is formed, and a metal mask is formed on the other surface of the flexible insulating base material, and the circuit wiring pattern is formed on the metal mask. A hole having a diameter larger than that of the circuit wiring pattern is formed in a corresponding portion where a resist pattern for forming a pattern is located, and then an excimer laser beam is irradiated from the metal mask side to form the above-mentioned hole. A conductive hole is formed from the hole portion to reach the conductor layer for forming the circuit wiring pattern, then the metal mask layer is peeled off, and one end of the conductive hole is electrically connected to the conductive layer. And the other end is the above-mentioned insulating base. After forming bumps for connecting circuit components protruding to the outside, the conductor layer is etched to form a circuit wiring pattern, then the resist layer is removed, and then the circuit wiring pattern is removed. Each step of forming a surface protective layer on the surface can be adopted.

【0012】上記表面保護層はポリイミド等の可撓性絶
縁フィルムを接着剤で貼り合わせて形成することも可能
である。この場合には、バンプ形成工程を複数回に分け
て行う。即ち、最初にバンプ高さを絶縁べ−ス材から突
出しないように形成し、次いで上記表面保護層を形成し
た後、再度バンプメッキを施して所望のバンプ高さを確
保する工程がとられる。
The surface protective layer may be formed by bonding a flexible insulating film such as polyimide with an adhesive. In this case, the bump forming process is performed in multiple steps. That is, a step of first forming the bump height so as not to project from the insulating base material, then forming the surface protective layer, and then performing bump plating again to secure a desired bump height is taken.

【0013】また、上記工程に於いて、メタルマスク層
を剥離する工程の次に、上記導通用孔の底部の導体層に
対して回路配線パタ−ンの形成工程で使用する薬品によ
り腐食されない導電性金属層を形成する工程を加える製
造法も採用できる。この手法によれば、回路配線パタ−
ンのエッチング形成工程の際にバンプの底部が導電性金
属層により保護されてエッチングされる虞がないので、
バンプ強度と信頼性を高次元で達成できる。
Further, in the above step, after the step of peeling off the metal mask layer, the conductive layer which is not corroded by the chemical used in the step of forming the circuit wiring pattern with respect to the conductor layer at the bottom of the conduction hole is used. A manufacturing method including a step of forming a conductive metal layer can also be adopted. According to this method, the circuit wiring pattern
Since there is no risk of the bottom of the bump being protected by the conductive metal layer and being etched during the etching forming step of
Bump strength and reliability can be achieved at a high level.

【0014】[0014]

【実施例】以下、図示の実施例を参照しながら本発明を
更に詳述する。図1は本発明の一実施例に従ったバンプ
を備えた可撓性回路基板の要部を概念的に示す断面構成
図であって、可撓性絶縁べ−ス材1の一方面には所要の
回路配線パタ−ン8を備えており、そして、絶縁べ−ス
材1の他方面に於ける回路配線パタ−ン8の位置する該
当部位からこの絶縁べ−ス材1を貫通して一端が回路配
線パタ−ン8に電気的に接合すると共に、他端がその絶
縁べ−ス材1の外部に突出する回路部品接続の為のバン
プ7を具備するように構成してある。
The present invention will be described in more detail below with reference to the illustrated embodiments. FIG. 1 is a sectional view conceptually showing an essential part of a flexible circuit board having bumps according to an embodiment of the present invention. A required circuit wiring pattern 8 is provided, and the insulating base material 1 is penetrated from the corresponding portion of the other side of the insulating base material 1 where the circuit wiring pattern 8 is located. One end is electrically connected to the circuit wiring pattern 8 and the other end is provided with a bump 7 for connecting a circuit component projecting to the outside of the insulating base material 1.

【0015】ここで、回路配線パタ−ン8の幅は、バン
プ7の為の導通用孔6の直径よりも小さく形成されてい
る。
The width of the circuit wiring pattern 8 is smaller than the diameter of the conduction hole 6 for the bump 7.

【0016】図2の(1)〜(5)はその為の製造工程
図を示すのもで、先ず同図(1)の如く、例えば接着剤
を有するもの又は無接着剤型の両面可撓性銅張積層板等
の材料を用意し、その絶縁べ−ス材1の一方面の銅箔層
2には、回路配線パタ−ンを形成する為のエッチングレ
ジストパタ−ン3が形成され、また、絶縁べ−ス材1の
他方面の銅箔をエッチング処理してメタルマスク4を形
成する。
FIGS. 2 (1) to 2 (5) show manufacturing process diagrams for that purpose. First, as shown in FIG. 1 (1), for example, one having an adhesive or a non-adhesive double-sided flexible type. A material such as a conductive copper clad laminate is prepared, and an etching resist pattern 3 for forming a circuit wiring pattern is formed on the copper foil layer 2 on one surface of the insulating base material 1. Further, the copper foil on the other surface of the insulating base material 1 is etched to form the metal mask 4.

【0017】このメタルマスク4には、回路配線パタ−
ンを形成する為のレジストパタ−ン3が位置する該当部
分に孔5を形成するように処理してある。そして、回路
配線パタ−ンを形成する為のレジストパタ−ン3の幅
は、孔5の直径より小さくなるように形成する。
The metal mask 4 has a circuit wiring pattern.
The hole 5 is formed in the corresponding portion where the resist pattern 3 for forming the pattern is located. The width of the resist pattern 3 for forming the circuit wiring pattern is formed to be smaller than the diameter of the hole 5.

【0018】次に、同図(2)のように、メタルマスク
4の側からエキシマレ−ザ−光Aを照射して孔5の部位
から銅箔層2に達する導通用孔6を形成する。そこで、
同図(3)の如く、メタルマスク4をエッチング除去す
る。
Next, as shown in FIG. 2B, excimer laser light A is irradiated from the side of the metal mask 4 to form a conduction hole 6 reaching the copper foil layer 2 from the hole 5. Therefore,
As shown in FIG. 3C, the metal mask 4 is removed by etching.

【0019】次いで、同図(4)のように、導通用孔6
に対して良導電性金属のメッキ又は半田等による充填処
理で一端が銅箔層2に電気的に接合すると共に、他端が
絶縁べ−ス材1の外部に突出する回路部品接続の為のバ
ンプ7を形成する。
Then, as shown in FIG. 4 (4), the conduction hole 6 is formed.
On the other hand, one end is electrically joined to the copper foil layer 2 by a plating process of a good conductive metal or a filling process with solder or the like, and the other end is projected to the outside of the insulating base material 1 for connecting circuit components. The bump 7 is formed.

【0020】更に、同図(5)の如く、銅箔層2をエッ
チングして所要の回路配線パタ−ン8を形成した後、不
要となったレジストパタ−ン3を除去し、最後に回路配
線パタ−ン8の表面にポリイミドワニスの印刷又はキュ
アで表面保護層9を形成するものである。これによっ
て、回路配線パタ−ン8の幅がバンプ7の為の導通用孔
6の直径よりも狭小に構成されたバンプを備えた可撓性
回路基板を製作することができる。
Further, as shown in FIG. 5 (5), after the copper foil layer 2 is etched to form a desired circuit wiring pattern 8, the unnecessary resist pattern 3 is removed, and finally the circuit wiring is formed. The surface protective layer 9 is formed on the surface of the pattern 8 by printing or curing a polyimide varnish. As a result, it is possible to manufacture a flexible circuit board having bumps in which the width of the circuit wiring pattern 8 is narrower than the diameter of the conduction hole 6 for the bump 7.

【0021】ここで、表面保護層9はポリイミド等の可
撓性絶縁フィルムを接着剤で貼り合わせて形成すること
もでき、この場合には、バンプ形成工程を複数回に分け
て行う。即ち、最初にバンプ高さを絶縁べ−ス材1から
突出しないように形成し、次いで上記表面保護層9を形
成した後、再度バンプメッキを施して所望のバンプ7の
高さを確保する工程が採用される。
Here, the surface protective layer 9 can be formed by bonding a flexible insulating film such as polyimide with an adhesive, and in this case, the bump forming step is performed in plural times. That is, a step of first forming a bump height so as not to project from the insulating base material 1 and then forming the surface protection layer 9 and then performing bump plating again to secure a desired height of the bump 7. Is adopted.

【0022】図3の(1)〜(4)はバンプ強度と信頼
性を高次元に達成できる他の製造工程図であって、上記
工程と同様に同図(1)の如く、メタルマスク4の側か
らエキシマレ−ザ−光Aを照射して孔5の部位から回路
配線パタ−ンを形成する為の銅箔層2に達する導通用孔
6を形成した後、メタルマスク4を剥離する。
3 (1) to 3 (4) are other manufacturing process diagrams capable of achieving bump strength and reliability at a high level. Similar to the above process, as shown in FIG. 3 (1), the metal mask 4 is formed. After the excimer laser light A is irradiated from the side to form the conduction hole 6 reaching the copper foil layer 2 for forming the circuit wiring pattern from the portion of the hole 5, the metal mask 4 is peeled off.

【0023】そこで、同図(2)のとおり、導通用孔6
の底部に露出している銅箔層2に対して後工程の回路配
線パタ−ンを形成する際の薬品により腐食されない金な
どの導電性金属層10を形成する。
Therefore, as shown in FIG. 2B, the conduction hole 6 is formed.
A conductive metal layer 10 of gold or the like, which is not corroded by chemicals when forming a circuit wiring pattern in a later step, is formed on the copper foil layer 2 exposed at the bottom of the.

【0024】以下、上記実施例の工程と同様に同図
(3)及び(4)のとおり、バンプ7の形成工程、回路
配線パタ−ン8の形成工程、レジストパタ−ン3の除去
工程及び表面保護層9の形成工程を順次施すことによ
り、回路配線パタ−ン8の幅がバンプ7の為の導通用孔
6の直径よりも狭小に構成され且つバンプ強度と信頼性
を高次元に達成したバンプを備えた可撓性回路基板を製
作できる。
Similar to the steps of the above embodiment, the bump 7 forming step, the circuit wiring pattern 8 forming step, the resist pattern 3 removing step and the surface are performed as shown in FIGS. By sequentially performing the step of forming the protective layer 9, the width of the circuit wiring pattern 8 is made narrower than the diameter of the conduction hole 6 for the bump 7, and the bump strength and reliability are achieved at a high level. A flexible circuit board having bumps can be manufactured.

【0025】上記実施例に於いて、回路配線パタ−ンを
形成する為のレジストパタ−ン及び銅箔層等の保護の為
のマスキング処理等の工程は必要により任意に実施でき
るものである。
In the above embodiment, steps such as a resist pattern for forming a circuit wiring pattern and a masking process for protecting the copper foil layer and the like can be optionally carried out if necessary.

【0026】[0026]

【発明の効果】本発明によるバンプを備えた可撓性回路
基板及びその製造法によれば、バンプ形成の為の導通用
孔を形成し、バンプを形成した後、回路配線パタ−ンを
形成するので、バンプの為の導通用孔の直径よりも回路
配線パタ−ンの幅を狭く形成しても高精度のバンプを備
えた可撓性回路基板を安定的に提供でき、且つバンプの
配置ピッチを縮小して高密度にバンプを形成できる。
According to the flexible circuit board having bumps and the method of manufacturing the same according to the present invention, a conductive hole for forming a bump is formed, and after forming the bump, a circuit wiring pattern is formed. Therefore, even if the width of the circuit wiring pattern is narrower than the diameter of the conduction hole for the bump, it is possible to stably provide the flexible circuit board having the high-precision bump, and to arrange the bump. The pitch can be reduced to form bumps with high density.

【0027】また、メタルマスク層を剥離する工程の次
に、導通用孔の底部の導体層に対して回路配線パタ−ン
の形成工程で使用する薬品により腐食されない導電性金
属層を形成する工程を加えると、回路配線パタ−ンのエ
ッチング形成工程の際にバンプの底部が導電性金属層に
より保護されてエッチングされる虞がないので、バンプ
強度と信頼性を高次元で達成できる。
After the step of removing the metal mask layer, a step of forming a conductive metal layer which is not corroded by the chemical used in the step of forming the circuit wiring pattern on the conductor layer at the bottom of the conduction hole. In addition, since there is no possibility that the bottom of the bump is protected by the conductive metal layer and etched during the step of etching the circuit wiring pattern, the bump strength and reliability can be achieved at a high level.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の一実施例に従ったバンプを備えた可
撓性回路基板の要部を概念的に示す断面構成図。
FIG. 1 is a sectional configuration view conceptually showing a main part of a flexible circuit board provided with bumps according to an embodiment of the present invention.

【図2】 (1)〜(5)はその製造工程図。2 (1) to (5) are manufacturing process diagrams thereof.

【図3】 (1)〜(4)は本発明の他の実施例による
製造工程図。
3A to 3D are manufacturing process diagrams according to another embodiment of the present invention.

【図4】 従来のバンプを備えた可撓性回路基板の要部
を概念的に示す断面構成図。
FIG. 4 is a sectional configuration view conceptually showing a main part of a conventional flexible circuit board provided with bumps.

【図5】 (1)〜(4)はその製造工程図。5 (1) to (4) are manufacturing process diagrams thereof.

【符号の説明】[Explanation of symbols]

1 可撓性絶縁べ−ス材 2 銅箔層 3 レジストパタ−ン 4 メタルマスク 5 孔 6 導通用孔 7 バンプ 8 回路配線パタ−ン 9 表面保護層 10 導電性金属層 1 Flexible Insulating Base Material 2 Copper Foil Layer 3 Resist Pattern 4 Metal Mask 5 Hole 6 Conduction Hole 7 Bump 8 Circuit Wiring Pattern 9 Surface Protection Layer 10 Conductive Metal Layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 可撓性絶縁べ−ス材の一方面に所要の回
路配線パタ−ンを備え、上記絶縁べ−ス材の他方面に於
ける上記回路配線パタ−ンの位置する該当部位からこの
絶縁べ−ス材を貫通して一端が上記回路配線パタ−ンに
電気的に接合すると共に他端がこの絶縁べ−ス材の外部
に突出する回路部品接続の為のバンプを具備する可撓性
回路基板に於いて、上記回路部品接続の為のバンプと電
気的に接続される回路配線パタ−ン幅は、上記バンプの
為の導通用孔の直径よりも小さく形成されていることを
特徴とするバンプを備えた可撓性回路基板。
1. A flexible insulating base material is provided with a required circuit wiring pattern on one surface thereof, and the corresponding portion where the circuit wiring pattern is located on the other surface of the insulating base material. Through the insulating base material, one end of which is electrically joined to the circuit wiring pattern and the other end of which is provided with a bump for connecting a circuit component protruding outside the insulating base material. In the flexible circuit board, the width of the circuit wiring pattern electrically connected to the bumps for connecting the circuit components is formed to be smaller than the diameter of the conducting hole for the bumps. A flexible circuit board having bumps.
【請求項2】 可撓性絶縁べ−ス材の一方面には回路配
線パタ−ンを形成する為の導体層を有し、この導体層の
表面には所要の回路配線パタ−ンを形成する為のエッチ
ングレジストパタ−ンが形成されると共に、上記可撓性
絶縁べ−ス材の他方面にメタルマスクを形成し、このメ
タルマスクには上記回路配線パタ−ンを形成する為のレ
ジストパタ−ンが位置する該当部分にその直径が上記回
路配線パタ−ンよりも大きな孔を形成し、次に上記メタ
ルマスク側からエキシマレ−ザ−光を照射して上記孔の
部位から上記回路配線パタ−ンを形成する為の導体層に
達する導通用孔を形成し、次いで上記メタルマスク層を
剥離し、上記導通用孔に対して一端が上記導体層に電気
的に接合すると共に他端が上記絶縁べ−ス材の外部に突
出する回路部品接続の為のバンプを形成した後、上記導
体層をエッチングして回路配線パタ−ンを形成し、次に
上記レジスト層を除去し、次いで上記回路配線パタ−ン
の表面に表面保護層を形成する各工程を含むバンプを備
えた可撓性回路基板の製造法。
2. A flexible insulating base material has a conductor layer for forming a circuit wiring pattern on one surface thereof, and a required circuit wiring pattern is formed on the surface of the conductor layer. Etching resist pattern for forming a metal mask is formed on the other surface of the flexible insulating base material, and a resist pattern for forming the circuit wiring pattern is formed on the metal mask. A hole having a diameter larger than that of the circuit wiring pattern is formed in a corresponding portion where the burner is located, and then excimer laser light is irradiated from the metal mask side to form the circuit wiring pattern from the hole portion. A conductive hole for forming a conductive layer is formed, then the metal mask layer is peeled off, one end of the conductive hole is electrically joined to the conductive layer and the other end is Connection of circuit parts protruding outside the insulating base material After forming the bumps for forming the bumps, the conductor layer is etched to form a circuit wiring pattern, the resist layer is then removed, and then a surface protective layer is formed on the surface of the circuit wiring pattern. A method for manufacturing a flexible circuit board having bumps including steps.
【請求項3】 前記メタルマスク層を剥離する工程の次
に、上記導通用孔の底部の導体層に対して回路配線パタ
−ンの形成工程で使用する薬品により腐食されない導電
性金属層を形成する工程を加える請求項2のバンプを備
えた可撓性回路基板の製造法。
3. After the step of peeling off the metal mask layer, a conductive metal layer which is not corroded by the chemical used in the step of forming the circuit wiring pattern is formed on the conductor layer at the bottom of the conduction hole. The method for manufacturing a flexible circuit board having bumps according to claim 2, wherein the step of adding is added.
JP24056993A 1993-09-01 1993-09-01 Flexible circuit board with bumps and method of manufacturing the same Expired - Fee Related JP3224056B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24056993A JP3224056B2 (en) 1993-09-01 1993-09-01 Flexible circuit board with bumps and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24056993A JP3224056B2 (en) 1993-09-01 1993-09-01 Flexible circuit board with bumps and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0774280A true JPH0774280A (en) 1995-03-17
JP3224056B2 JP3224056B2 (en) 2001-10-29

Family

ID=17061478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24056993A Expired - Fee Related JP3224056B2 (en) 1993-09-01 1993-09-01 Flexible circuit board with bumps and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3224056B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316361A (en) * 1995-05-24 1996-11-29 Nec Kyushu Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316361A (en) * 1995-05-24 1996-11-29 Nec Kyushu Ltd Semiconductor device

Also Published As

Publication number Publication date
JP3224056B2 (en) 2001-10-29

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