JPH0783084B2 - Lead device for semiconductor element - Google Patents
Lead device for semiconductor elementInfo
- Publication number
- JPH0783084B2 JPH0783084B2 JP12777286A JP12777286A JPH0783084B2 JP H0783084 B2 JPH0783084 B2 JP H0783084B2 JP 12777286 A JP12777286 A JP 12777286A JP 12777286 A JP12777286 A JP 12777286A JP H0783084 B2 JPH0783084 B2 JP H0783084B2
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- bonding
- lead
- bonding portion
- inner lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は、リードフレームやフィルムキャリアなどの半
導体素子用リード装置に係わり、特にインナーリードが
ファインピッチであってもその先端のボンディング部の
幅が十分広く取れるようにインナーリードのパターンを
工夫した半導体素子用リード装置に関する。The present invention relates to a lead device for a semiconductor element such as a lead frame or a film carrier, and more particularly, even if the inner leads have a fine pitch. The present invention relates to a semiconductor device lead device in which the inner lead pattern is devised so that the bonding portion can have a sufficiently wide width.
（従来の技術） リードフレームやフィルムキャリアのインナーリード
は、その先端のボンディング部がペレットの側縁から適
当な距離をおいてその側縁に沿ってペレット上のボンデ
ィングパッドと同一ピッチで配列されていることが、ワ
イヤボンディングの特性上望ましい。(Prior Art) The inner lead of a lead frame or film carrier has a bonding portion at the tip thereof arranged at an appropriate distance from the side edge of the pellet and arranged at the same pitch as the bonding pad on the pellet along the side edge. Is desirable in terms of wire bonding characteristics.
このようにボンディング部を配列する従来のインナーリ
ードのパターンとしては、第２図のようにインナーリー
ド１をその先端付近の部分がペレット２上のボンディン
グパッド３と同一ピッチで互いに平行に並ぶように引き
出してその先端のボンディング部1aを一列に配列した平
行出しと呼ばれるものや、第３図のようにインナーリー
ド11の引き出す長さを変えてボンディング部11aを互い
違いに配列することにより、このボンディング部11aの
幅を平行出しより広く取れるようにした千鳥配列と呼ば
れるものなどがある。As a conventional inner lead pattern in which the bonding portions are arranged in this manner, as shown in FIG. 2, the inner leads 1 are arranged such that the portions near the tips thereof are arranged in parallel with the bonding pads 3 on the pellet 2 at the same pitch. What is called a parallel extension in which the bonding portions 1a at the tip end thereof are arranged in a line, or the bonding portions 11a are arranged alternately by changing the extraction length of the inner lead 11 as shown in FIG. There is a so-called staggered arrangement in which the width of 11a can be made wider than the parallel projection.
（発明が解決しようとする問題点） ところで、リードフレーム又はフィルムキャリアのパタ
ーン形成において、現状ではインナーリードとインナー
リードとの間隔は40μｍ程度が最小の限界値であり、こ
の値以下にリード間隔を縮めることは極めて困難であ
る。そのため、ファインピッチのリードフレームやフィ
ルムキャリアにおいては、ボンディング部の幅が十分に
取れないという問題が生じる。(Problems to be solved by the invention) By the way, in the pattern formation of the lead frame or the film carrier, the distance between the inner leads is currently around 40 μm, which is the minimum limit value. It is extremely difficult to shrink. Therefore, in a fine pitch lead frame or film carrier, there arises a problem that the width of the bonding portion cannot be sufficiently obtained.
例えば第２図、第３図において、仮にパッド３のピッチ
を100μｍとし、リード間隔をその最小限界値である40
μｍとしたならば、第２図の平行出しのパターンにおい
てはボンディング部1aのとり得る最大幅は図示のように
60μｍであり、第３図の千鳥配列では90μｍである。For example, in FIG. 2 and FIG. 3, assuming that the pitch of the pads 3 is 100 μm and the lead interval is the minimum limit value of 40 μm.
Assuming μm, the maximum width of the bonding portion 1a in the parallel pattern shown in FIG. 2 is as shown in the figure.
It is 60 μm, and 90 μm in the staggered arrangement in FIG.
インナーリードのボンディング部の幅は、ワイヤボンデ
ィングの優劣に多大の影響を及ぼし、上記例のような幅
ではワイヤがボンディング部からはみ出すなどの欠陥が
生じる可能性が大きい。The width of the bonding portion of the inner lead has a great influence on the superiority or inferiority of wire bonding, and with the width as in the above example, a defect such as a wire protruding from the bonding portion is likely to occur.
また、上記例においてパッド３のピッチを更に60μｍま
で縮めたならば、ボンディング部の最大幅は平行出しで
は20μｍ、千鳥配列では10μｍとなり、このような細い
パターンは作成不可能である（現状で量産可能なインナ
ーリードの最小幅は約40μｍである）。Further, in the above example, if the pitch of the pads 3 is further reduced to 60 μm, the maximum width of the bonding portion becomes 20 μm in the parallel projection and 10 μm in the staggered arrangement, and such a thin pattern cannot be produced (currently in mass production. The smallest possible inner lead width is about 40 μm).
このようにファインピッチ化すると、インナーリードの
幅、特にその先端のボンディング部の幅が小さくなり過
ぎるという問題がある。本発明はフィインピッチであっ
てもボンディング部の幅は十分に広く取ることができる
半導体素子用リード装置を提供することを目的とする。When the fine pitch is used as described above, there is a problem in that the width of the inner lead, particularly the width of the bonding portion at the tip thereof becomes too small. An object of the present invention is to provide a semiconductor device lead device in which the width of the bonding portion can be made sufficiently wide even with a fin pitch.
（問題点を解決するための手段） 上記目的達成のために、本発明はインナーリード先端の
ボンディング部を複数の列に分けてペレットの側縁に沿
って配列し、ペレットに近い側に配列したボンディング
部からはインナーリードをペレット方向へ引き出して、
ペレットに遠い側に配列したボンディング部からアウタ
ーリードへ向って引き出されているインナーリード群の
外方を迂回させてアウターリードへ導いたものである。(Means for Solving the Problems) In order to achieve the above object, the present invention divides the bonding portions at the tips of the inner leads into a plurality of rows and arranges them along the side edges of the pellets, and arranges them on the side close to the pellets. Pull out the inner leads from the bonding section in the pellet direction,
The outer lead of the inner lead group drawn out from the bonding portions arranged on the far side of the pellet toward the outer lead is guided to the outer lead.
（作 用） インナーリードのボンディング部は複数列に分けて配列
してあるので、第２図の平行出しのように一列に配列し
ている場合に比較してボンディング部の幅は当然広く取
ることができる。しかも、ペレットに近い側に配列した
ボンディング部からは、インナーリードをペレット方向
へ引き出してペレットに遠い側のボンディング部からの
インナーリード群を迂回させてアウターリードへ導いて
いるので、第３図の千鳥配列のようにペレットに遠い側
のボンディング部の間にペレットに近い側のボンディン
グ部からのインナーリードが入り込むことがなく、ボン
ディング部の幅の拡大が邪魔されない。(Operation) Since the bonding parts of the inner leads are arranged in multiple rows, the width of the bonding parts should be wider than that in the case where they are arranged in one row as shown in parallel in Fig. 2. You can Moreover, since the inner leads are pulled out in the pellet direction from the bonding portions arranged on the side closer to the pellet and the inner leads from the bonding portions on the side farther from the pellet are bypassed and guided to the outer leads, The inner leads from the bonding portion on the side closer to the pellet do not enter between the bonding portions on the side farther from the pellet as in the staggered arrangement, and the expansion of the width of the bonding portion is not hindered.
（実施例） 以下、実施例により本発明を説明する。(Examples) Hereinafter, the present invention will be described with reference to Examples.
本発明の一実施例を示す第１図において、インナーリー
ド21の先端のボンディング部21aは、ペレット１の辺縁
に近い側の列Ａと遠い側の列Ｂとに分けられて、ペレッ
ト辺縁に沿ってペレット上のボンディングパット３と同
一ピッチで配列されている。このように二列に分かれて
配列されている結果、各列A,Bにおけるボンディング部2
1aのピッチはボンディングパット３のピッチの２倍とな
っている。In FIG. 1 showing an embodiment of the present invention, a bonding portion 21a at the tip of the inner lead 21 is divided into a row A on the side closer to the edge of the pellet 1 and a row B on the far side, and the pellet edge Are arranged at the same pitch as the bonding pads 3 on the pellets. As a result of being arranged in two rows in this way, the bonding portion 2 in each row A, B
The pitch of 1a is twice the pitch of the bonding pad 3.
ペレット１に遠い側の列Ｂに配列された各ボンディング
部21aからは、インナーリード21はペレット１から遠ざ
かる方向へ引き出されて各々のアウターリード（図示せ
ず）へ導かれている。また、ペレット１に近い側の列Ａ
に配列された各ボンディング部21aからは、インナーリ
ード21はペレット１へ向って引き出されてから、列Ｂの
ボンディング部21aから引き出されているインナーリー
ド群の外方を迂回して各々のアウターリード（図示せ
ず）へ導かれている。The inner leads 21 are pulled out from the respective bonding portions 21a arranged in the row B on the side far from the pellet 1 in the direction away from the pellets 1 and led to the respective outer leads (not shown). Also, row A on the side closer to pellet 1
The inner leads 21 are pulled out toward the pellet 1 from the respective bonding portions 21a arranged in a row, and then the outer leads of the outer leads of the inner lead groups pulled out from the bonding portions 21a in the row B are bypassed. (Not shown).
このため、列Ｂのボンディング部21aの相互間に列Ｂか
らのインナーリード21が入り込まず、各ボンディング部
21aの幅は隣接のボンディング部21aに接触しない最大限
まで拡大できる。Therefore, the inner leads 21 from the row B do not enter between the bonding portions 21a of the row B, and
The width of 21a can be expanded to the maximum without contacting the adjacent bonding portion 21a.
このようなインナーリードパターンにおいて、前述の第
2,3図と同様の条件下でボンディング部21aのとり得る最
大幅を求めてみると、ボンディングパッド３のピッチが
100μｍの場合には、上記最大幅は160μｍとなり、の第
2,3図の従来パターンに比較して２倍近くに拡大するこ
とができる。また、ボンディングパッド３のピッチが60
μｍの場合には、上記最大幅は80μｍとなり、この場合
には形成不可能である従来パターンに対して、本発明の
パターンは十分に形成可能である。In such an inner lead pattern,
When the maximum width of the bonding portion 21a is calculated under the same conditions as those in FIGS. 2 and 3, the pitch of the bonding pads 3 is
In case of 100 μm, the maximum width is 160 μm.
It can be enlarged almost twice as much as the conventional pattern shown in Figs. Also, the pitch of the bonding pad 3 is 60
In the case of μm, the maximum width is 80 μm. In this case, the pattern of the present invention can be sufficiently formed as compared with the conventional pattern which cannot be formed.
更に、スペースが許すならば第３図の千鳥配列を併用し
て、例えば列Ｂのボンディング部21aを千鳥配列するよ
うにしたならば、更にその幅を大きくとることができ
る。Furthermore, if the space permits, the zigzag arrangement shown in FIG. 3 may be used together, and for example, if the bonding portions 21a of the row B are arranged in a zigzag arrangement, the width can be further increased.
尚、ボンディング部21aとボンディングパッド３とを接
続したワイヤが下方へたれ下がる、いわゆるワイヤーア
ンダーループによって、たれ下がったワイヤーがペレッ
ト１側へ引き出されたインナーリード21に接触する可能
性があるが、これはボンディング部21a以外の部分を絶
縁膜でマスクすることで防止できる。There is a possibility that the wire connecting the bonding portion 21a and the bonding pad 3 hangs downward, so-called wire under loop, and the hung wire may come into contact with the inner lead 21 pulled out to the pellet 1 side. Can be prevented by masking a portion other than the bonding portion 21a with an insulating film.
以上説明したように、本発明はインナーリード先端のボ
ンディング部をペレットからの距離が異なる複数列に分
けて配列し、ペレットに近い側のボンディング部からは
ペレット方向へインナーリードを引き出して、ペレット
に遠い側のボンディング部から引き出されているインナ
ーリード群の外方を迂回させて各々のアウターリードへ
導いているので、従来の比較してボンディング部の幅を
格段に広くすることができ、従ってインナーリードのフ
ァインピッチ化ひいては半導体素子の高集積化、小型化
に大きく寄与することができる。As described above, according to the present invention, the bonding portion at the tip of the inner lead is arranged in a plurality of rows at different distances from the pellet, and the inner lead is pulled out in the pellet direction from the bonding portion on the side closer to the pellet to form the pellet. Since the outer side of the inner lead group pulled out from the bonding portion on the far side is diverted to lead to each outer lead, the width of the bonding portion can be significantly widened as compared with the conventional one, and thus the inner portion can be made wider. This can greatly contribute to the fine pitch of the leads and further to the high integration and miniaturization of the semiconductor element.
第１図は本発明の一実施例のインナーリードのパターン
図、第２図及び第３図は従来のインナーリードのパター
ン図である。 1,11,21……インナーリード、1a,11a,21a……ボンディ
ング部、２……ペレット、３……ボンディングパッド、
A,B……ボンディング部の列。FIG. 1 is a pattern diagram of an inner lead according to an embodiment of the present invention, and FIGS. 2 and 3 are pattern diagrams of a conventional inner lead. 1,11,21 …… inner lead, 1a, 11a, 21a …… bonding part, 2 …… pellet, 3 …… bonding pad,
A, B ... Row of bonding section.
フロントページの続き (56)参考文献 特開 昭61−90452（ＪＰ，Ａ) 特開 昭61−32452（ＪＰ，Ａ) 実開 昭59−72731（ＪＰ，Ｕ)Continuation of the front page (56) References JP-A-61-90452 (JP, A) JP-A-61-32452 (JP, A) Practical application Sho-59-72731 (JP, U)
Claims (1)
ペレット側縁からの距離が異なる複数の列に分けて前記
側縁に沿って配列し、前記ペレットに遠い側に配列した
ボンディング部からは、前記ペレットから遠ざかる方向
へインナーリードを引き出してアウターリードへ導き、
また前記ペレットに近い側に配列したボンディング部か
らは、前記ペレットへ向う方向へインナーリードを引き
出して、前記ペレットに遠い側のボンディング部から引
き出されたインナーリード群の外方を迂回させてアウタ
ーリードへ導いたことを特徴とする半導体素子用リード
装置。1. A bonding portion at the tip of the inner lead is
From the bonding portion arranged on the side farther from the pellet, the inner lead is pulled out to the outer lead by being divided into a plurality of rows having different distances from the pellet side edge and arranged along the side edge. Guide,
Also, the inner lead is pulled out from the bonding portion arranged on the side closer to the pellet in the direction toward the pellet, and the outer lead is diverted to the outside of the inner lead group pulled out from the bonding portion on the side far from the pellet. A lead device for a semiconductor device, which is characterized in that
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12777286A JPH0783084B2 (en) | 1986-06-02 | 1986-06-02 | Lead device for semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12777286A JPH0783084B2 (en) | 1986-06-02 | 1986-06-02 | Lead device for semiconductor element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62283653A JPS62283653A (en) | 1987-12-09 |
| JPH0783084B2 true JPH0783084B2 (en) | 1995-09-06 |
Family
ID=14968312
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12777286A Expired - Lifetime JPH0783084B2 (en) | 1986-06-02 | 1986-06-02 | Lead device for semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0783084B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0371646U (en) * | 1989-11-16 | 1991-07-19 | ||
| JPH04186755A (en) * | 1990-11-20 | 1992-07-03 | Matsushita Electron Corp | Lead frame |
| JP2001298039A (en) * | 2000-04-12 | 2001-10-26 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| KR100654338B1 (en) * | 2003-10-04 | 2006-12-07 | 삼성전자주식회사 | Tape wiring board and semiconductor chip package using same |
| JP2005252140A (en) * | 2004-03-08 | 2005-09-15 | Olympus Corp | Package for solid-state imaging device |
-
1986
- 1986-06-02 JP JP12777286A patent/JPH0783084B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62283653A (en) | 1987-12-09 |
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