JPH08162001A - Electron source substrate, electron source, image forming device and manufacture - Google Patents

Abstract

(57) [Summary] [Structure] At least the device electrodes (2) on the substrate (1),
In a surface conduction electron-emitting device composed of (3) and a thin film including an electron emitting portion (5), a silicon nitride film (33) is formed on the surface of the substrate on which the thin film including at least the electron emitting portion is formed. A surface conduction electron-emitting device characterized by the above. Also provided are an electron source provided with a large number of the surface conduction electron-emitting devices, an image forming apparatus to which the electron source is applied, and manufacturing methods thereof. [Effect] By having a silicon nitride film on the surface of a substrate on which a thin film including at least an electron emitting portion is formed,
It is possible to suppress the decrease in resistance of the conductive thin film after the sealing step and perform good forming of each element, and (2) the same characteristics can be obtained even when a plurality of electron-emitting devices having the same characteristics are used.
Furthermore, in the image forming apparatus of the present invention, (3) no-emission point,
An image with no brightness unevenness can be obtained, and (4) inexpensive soda lime glass can be used, and it can be manufactured at low cost.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source and an image forming apparatus such as a display device which is an application of the electron source, and more particularly, to an electron source having a large number of surface conduction electron-emitting devices using fine particles as electron-emitting portions, and The present invention relates to an image forming apparatus such as a display device, which is an application thereof, and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, two types of electron emitters, a thermoelectron source and a cold cathode electron source, are known. The cold cathode electron source includes a field emission type (hereinafter abbreviated as FE type), a metal / insulating layer / metal type (hereinafter abbreviated as MIM type), a surface conduction type electron emitting device, and the like. As an example of FE type, WP Dyke & WW Dola
n, “Filed emission”, Advance in Electron Physics,
8 , 89 (1956) or CA Spindt, “Physical Propert
ies of thin-film fieldemission cathodes with molyb
denium ”, J. Appl. Phys., 47 , 5248 (1976) are known.

An example of the MIM type is CA Mead, “The
tunnel-emission amplifier ”, J.Appl. Phys., 32 , 6
46 (1961) are known.

As an example of the surface conduction electron-emitting device type,
MI Elinson, Radio Eng. Electron Phys., 10 , (196
5) etc. The surface conduction electron-emitting device utilizes a phenomenon in which electron emission occurs when a current is applied to a thin film having a small area formed on a substrate in parallel with the film surface.
As the surface conduction electron-emitting device, one using a SnO ₂ thin film by Erinson et al., One using an Au thin film [G. Dittmer: "ThinSolid Films", 9 , 317 (197
2)], by In ₂ O ₃ / SnO ₂ thin film [M. Hartwe
ll and CG Fonstad: “IEEE Trans. ED Conf.”, 519
(1975)], those using a carbon thin film [Hiraki Araki et al .: Vacuum, Vol. 26, No. 1, p. 22 (1983)] and the like.

As a typical device configuration of these surface conduction electron-emitting devices, the above-mentioned M. The Hartwell device configuration is shown in FIG. In the figure, 1 is a substrate. Reference numeral 4 denotes a conductive thin film, which is composed of a metal oxide thin film or the like formed by sputtering on an H-shaped pattern, and the electron emitting portion 5 is formed by an energization process called energization forming described later.
The element electrode spacing L in the figure is 0.5 to 1 mm, W '
Is set to 0.1 mm. The position and shape of the electron emitting portion 5 are shown as a schematic diagram.

Conventionally, in these surface conduction electron-emitting devices, the electron-emitting portion 5 is subjected to an energization process called energization forming in advance on the conductive thin film 4 before the electron emission.
Was commonly formed. That is, the energization forming means that a direct current voltage or a very slow rising voltage, for example, about 1 V / min is applied to both ends of the conductive thin film 4, and the conductive thin film is locally broken, deformed or altered to generate electricity. That is, the electron emitting portion 5 is formed in a high resistance state. In the electron emitting portion 5, a crack is generated in a part of the conductive thin film 4, and electrons are emitted from the vicinity of the crack. The surface conduction electron-emitting device that has been subjected to the energization forming process is one in which electrons are emitted from the electron-emitting portion 5 by applying a voltage to the conductive thin film 4 and passing a current through the device.

The above-mentioned surface conduction electron-emitting device has an advantage that a large number of devices can be arrayed over a large area because it has a simple structure and is easy to manufacture. Therefore, various applications that can make full use of this feature are being researched. For example, a charged beam source, a display device such as an image forming device, etc. may be mentioned.

Various methods are conceivable as a method of manufacturing the above-mentioned surface conduction electron-emitting device, one example of which is shown in FIG.
Shown in

A description will be given below with reference to FIGS. 18 and 19. FIG. 18 shows a plan view (a) and a sectional view (b) showing the configuration of a conventional surface conduction electron-emitting device. Note that FIG.
The same members are designated by the same reference numerals.

1) After the substrate 1 is thoroughly washed with a detergent, pure water and an organic solvent, element electrode materials are deposited by a vacuum deposition method, a sputtering method or the like, and then the element electrodes 2, 3 are formed on the substrate 1 by a photolithography technique. (Fig. 19)
(A)).

2) An organic metal thin film is formed by applying an organic metal solution on the substrate 1 provided with the device electrodes 2 and 3 and leaving it to stand. The organometallic solution mentioned here is a solution of an organometallic compound containing the metal forming the conductive film 4 as a main element. After that, the organometallic thin film is heated and baked,
The conductive thin film 4 is formed by patterning by lift-off, etching or the like (FIG. 19B). Although the description has been given here by using the coating method of the organic metal solution, the present invention is not limited to this, and the vacuum deposition method, the sputtering method, the chemical vapor deposition method,
It may be formed by a dispersion coating method, a dipping method, a spinner method, or the like.

3) Next, when an energization process called energization forming is performed with a voltage between the element electrodes 2 and 3 by a pulsed or high-speed rising voltage by a power source (not shown), the conductive thin film 4 is removed. An electron emitting portion 5 having a changed structure is formed at the portion (FIG. 19C). The electrically-conductive thin film 4 is locally destroyed, deformed or altered by this energization process, and a portion whose structure is changed is referred to as an electron-emitting portion 5. The applicants have observed that the electron emitting portion 5 is composed of conductive fine particles.

Next, the structure of an electron source substrate in which a large number of surface conduction electron-emitting devices are arranged in a matrix will be described with reference to FIGS. 20 and 21.

FIG. 20 shows a plan view of a part of the electron source substrate. Also. FIG. 21 is a sectional view taken along the line AA ′ in the figure. However, in FIG. 20 and FIG. 21, the same symbols are the same. Here, 1 is a substrate, 72 is an X-direction wiring (also referred to as lower wiring) corresponding to Dxm, 73 is a Y-direction wiring (also referred to as upper wiring) corresponding to Dyn, 4 is a conductive thin film,
Reference numerals 2 and 3 are element electrodes, 31 is an interlayer insulating layer, and 32 is a contact hole for electrically connecting the element electrode 2 and the lower wiring 72.

An image forming apparatus using the above electron source substrate will be described with reference to FIG. In FIG. 7, 71 is an electron source substrate having an electron-emitting device formed on the substrate, 81 is a rear plate to which the electron source substrate 71 is fixed, 8
6 is a face plate having a fluorescent film 84, a metal back 85 and the like formed on the inner surface of a glass substrate 83, and 82 is a support frame. The rear plate 81, the support frame 82 and the face plate 86 are coated with frit glass or the like, and the atmosphere. The envelope 88 is configured by sealing by firing in air or nitrogen at 400 to 500 degrees for 10 minutes or more.

In FIG. 7, 74 corresponds to the electron emitting portion in FIG. Reference numerals 72 and 73 denote X-direction wiring and Y-direction wiring connected to a pair of device electrodes of the surface conduction electron-emitting device.

[0017]

However, in the above conventional example, when the image forming apparatus is manufactured, the rear plate,
There is a step of sealing the support frame and the face plate at 400 to 500 degrees. At this time, when glass containing a large amount of alkali metal or alkaline earth metal such as soda glass as impurities is used for the glass substrate, the interlayer insulating layer is formed. In some cases, these impurities diffused and diffused to the conductive thin film (4 in FIG. 18), resulting in a significant decrease in the resistance. In addition, since the degree of decrease in the resistance varies depending on each element, the forming condition changes, which causes a problem of variations in the characteristics of the electron-emitting element after forming. In addition, forming may be performed for each line, such as a ladder-type arrangement electron source in which a large number of surface conduction electron-emitting devices are arranged in parallel. At this time, if the combined resistance of the element becomes equal to or less than the wiring resistance due to the resistance decrease after sealing, the effect of the voltage drop due to the wiring resistance is stronger for the element farther from the place where the voltage is applied, and uniform forming is performed. It was difficult to do it within one line. In addition, variations in the brightness due to variations in the characteristics of each element, non-emission points, etc. occur, and the reduction in yield becomes a problem, making it difficult to fabricate a large-screen matrix electron source and an image forming apparatus using the same. It was

In view of the above drawbacks, the present invention has been made in order to eliminate the above-mentioned conventional problems, and the purpose thereof is (1) reduction in resistance of the conductive thin film after the sealing step. Suppresses
Good forming of each element can be performed.

(2) When using a plurality of electron-emitting devices having the same characteristics, the same characteristics are obtained. That is the object of the present invention,
It is an object of the present invention to provide a surface conduction electron-emitting device that simultaneously satisfies (1) and (2), and an image forming apparatus using the same.

[0020]

SUMMARY OF THE INVENTION That is, the present invention, which has been made to achieve the above-mentioned object, is firstly a surface conduction electron-emitting device which is composed of at least a device electrode and a thin film including an electron-emitting portion on a substrate. Provided is a surface conduction electron-emitting device having a silicon nitride film on the surface of the substrate on which a thin film including at least an electron-emitting portion is formed. Although the reason why the performance of the structure of the present invention is not impaired is still unclear, diffusion of impurities from the glass substrate or the like is prevented when the conductive thin film for forming the electron-emitting portion is subjected to high-temperature treatment such as sealing. It is considered that the resistance reduction of the electron-emitting device is suppressed by suppressing the resistance by the silicon nitride film.

Secondly, a surface conduction electron composed of at least a device electrode and a thin film including an electron emitting portion is formed on the insulating substrate by row-direction wiring and column-direction wiring laminated via an insulating layer. By connecting a pair of opposing device electrodes of the electron-emitting device and the electron-emitting portion, respectively, a thin film including at least the electron-emitting portion is formed in the electron source substrate in which a large number of surface conduction electron-emitting devices are arranged in a matrix. There is provided an electron source having a silicon nitride film on the surface of the substrate to be formed.

Thirdly, on the insulating substrate, a pair of opposing device electrodes and electron emitting portions of the surface conduction electron-emitting device, which are composed of at least device electrodes and a thin film including electron emitting portions, are connected respectively. In an electron source having a plurality of surface conduction electron-emitting devices arranged in parallel with each other having a common wiring, a silicon nitride film is formed on a surface of the substrate on which a thin film including at least an electron-emitting portion is formed. To provide an electron source.

Fourthly, there is provided an image forming apparatus comprising at least a phosphor and an electron source, wherein the electron source is the second or third electron source.

In the surface conduction electron-emitting device, the silicon nitride film is formed on the surface forming the thin film including at least the electron-emitting portion, so that the resistance of the conductive thin film after the sealing process is prevented from decreasing and each device has Good forming can be performed. Further, even when using a plurality of electron-emitting devices having the same characteristics, the same characteristics can be obtained.

Further, in the image forming apparatus using such an electron source, an image having no light emission point and no unevenness in brightness can be obtained, and inexpensive soda lime glass can be used, so that it can be manufactured at low cost.

Preferred embodiments of the present invention will be described below with reference to the drawings.

There are basically two types of surface conduction electron-emitting devices that can be used in the present invention: a planar surface conduction electron-emitting device and a vertical surface conduction electron-emitting device. FIG. 1 is a schematic plan view (FIG. 1- (a)) and a cross-sectional view (FIG. 1- (b)) showing the configuration of a basic planar surface conduction electron-emitting device. FIG. 3 shows the manufacturing method.

In FIGS. 1 and 3, 1 is a substrate, 2 and 3 are device electrodes, 4 is a conductive thin film, 5 is an electron emitting portion, and 33 is a silicon nitride film.

As the substrate 1, quartz glass, glass having a low content of impurities such as Na, soda lime glass, a glass substrate having SiO ₂ formed on its surface, and a ceramic substrate such as alumina are used.

A general conductor is used as the material of the device electrodes 2 and 3, for example, Ni, Cr, Au, Mo, W, P.
a metal or alloy such as t, Ti, Al, Cu and Pd, and a printed conductor composed of a metal or metal oxide such as Pd, Ag, Au, RuO ₂ , Pd-Ag and glass;
It is appropriately selected from a transparent conductor such as In ₂ O ₃ —SnO ₂ and a semiconductor material such as polysilicon.

The device electrode spacing L is preferably several hundreds of angstroms to several hundreds of micrometers. Further, it is desirable that the voltage applied between the device electrodes is low, and it is required to produce the device with good reproducibility. Therefore, the preferred device electrode interval is several micrometers to several tens of micrometers.

The device electrode length W is preferably several micrometers to several hundreds of micrometers in view of the resistance value of the electrodes and electron emission characteristics, and the film thickness of the device electrodes 2 and 3 is preferably several micrometers to several micrometers. .

In addition to the structure shown in FIG. 1, the silicon nitride film 33, the conductive thin film 4, and the device electrodes 2 and 3 may be formed in this order on the substrate 1.

The silicon nitride film 33 is formed by plasma CVD.
A (Chemical Vapor Deposition) apparatus is used to form a film using SiH ₄ and N ₂ . The film thickness is appropriately set depending on the structure of the device and the like, but is preferably 1000 angstrom to 1 micrometer (FIG. 3A).

The conductive thin film 4 is particularly preferably a fine particle film composed of fine particles in order to obtain good electron emission characteristics.
The film thickness is appropriately set depending on the step coverage to the device electrodes 2 and 3, the resistance value between the device electrodes 2 and 3, and the energization forming conditions described later, etc., but is preferably several angstroms to several thousand angstroms, and particularly preferably Is 500 angstroms rather than 10 angstroms. The sheet resistance value is 10 ³ to 10 ⁷ Ω / □ (FIG. 3B).

The material forming the conductive thin film 4 is P
d, Pt, Ru, Ag, Au, Ti, In, Cu, C
Metals such as r, Fe, Zn, Sn, Ta, W, Pb; Pd
Oxides such as O, SnO ₂ , In ₂ O ₃ , PbO and Sb ₂ O ₃ ; HfB ₂ , ZrB ₂ , LaB ₆ , CeB ₆ , YB
₄ , boride such as GdB ₄ ; TiC, ZrC, HfC, T
Carbides such as aC, SiC, WC; TiN, ZrN, Hf
Examples thereof include nitrides such as N; semiconductors such as Si and Ge; carbon and the like.

The fine particle film described here is a film in which a plurality of fine particles are aggregated, and its fine structure is not only a state in which the fine particles are dispersed and arranged but also a state in which the fine particles are adjacent to each other or overlap each other (islands). The particle size of the fine particles is from several angstroms to several thousand angstroms, preferably from 10 angstroms to 200 angstroms.

The electron emitting portion 5 is a high resistance crack formed in a part of the conductive thin film 4, and is formed by energization forming or the like. In addition, the cracks may contain conductive fine particles having a particle diameter of several angstroms to several hundred angstroms. The conductive fine particles contain at least a part of the elements forming the conductive thin film 4. (Fig. 3
(C)).

The electron emitting portion 5 and the conductive thin film 4 in the vicinity thereof may contain carbon or a carbon compound.

FIG. 2 is a schematic sectional view showing the structure of a basic vertical surface conduction electron-emitting device.

In FIG. 2, the same members as those in FIG. 1 are designated by the same reference numerals. Reference numeral 21 is a step forming portion.

Substrate 1, device electrodes 2 and 3, conductive thin film 4,
The electron emitting portion 5 can be made of the same material as that of the above-mentioned planar surface conduction electron-emitting device, and the step forming portion 21.
Is an insulating material, and the film thickness of the step forming portion 21 is the device electrode interval L of the flat surface conduction electron-emitting device described above.
Equivalent to. The spacing is tens of micrometers rather than hundreds of angstroms. This distance can be controlled by the manufacturing method of the step forming portion and the voltage applied between the device electrodes, but is preferably several hundred angstroms to several micrometers.

The silicon nitride film 33 is formed by plasma CVD.
Using a (Chemical Vapor Deposition) device, SiH ₄ and N ₂ are used to form a film over the entire surface including the step forming portion 21.
The film thickness is appropriately set depending on the element configuration, etc.
It is preferably 1000 angstroms to 1 micrometer. After the film formation, anisotropic etching is performed by dry etching using CF ₄ to remove only the silicon nitride film on the flat portion and leave the silicon nitride film 33 only on the side wall of the step forming portion 21.

The conductive thin film 4 is formed on the device electrodes 2 and 3 because the device electrodes 2 and 3, the step forming portion 21 and the silicon nitride film 33 are formed after they are formed. In FIG. 2, the electron emitting portion 5 is shown as being linearly formed on the silicon nitride film 33 on the side wall of the step forming portion 21, but the shape depends on the manufacturing conditions, energization forming conditions, and the like. The position is not limited to this.

An energization process called energization forming is performed. In the energization forming, electricity is applied between the device electrodes 2 and 3 by a power source (not shown) to locally break, deform or alter the conductive thin film 4 to form a portion having a changed structure. The site where the structure is locally changed is called an electron emitting portion 5 (FIG. 3- (c)). An example of the voltage waveform of energization forming is shown in FIG.

A pulse waveform is particularly preferable as the voltage waveform. When the voltage pulse having a constant pulse peak value is continuously applied (FIG. 4 (a)), and when the voltage pulse is applied while increasing the pulse peak value. (Fig. 4 (b)). First, when the pulse peak value is a constant voltage (Fig. 4 (a))
Will be described.

T1 and T2 in FIG. 4 (a) are the pulse width and pulse interval of the voltage waveform. T1 is 1 microsecond to 10 milliseconds, T2 is 10 microseconds to 100 milliseconds, and a triangular wave The high value (peak voltage at the time of energization forming) is appropriately selected according to the form of the surface conduction electron-emitting device, and is applied for several seconds to several tens of minutes under a suitable vacuum degree, for example, in a vacuum atmosphere of about 10 ⁻⁵ torr. . The waveform applied between the electrodes of the element is not limited to the triangular wave, and a desired waveform such as a rectangular wave may be used.

T1 and T2 in FIG. 4 (b) are the same as those in FIG. 4 (a), and the peak value of the triangular wave (peak voltage during energization forming) is increased by, for example, about 0.1 V step. Apply in a simple vacuum atmosphere.

In the energization forming process in this case, the resistance value is measured by measuring the element current at a voltage that does not locally break or deform the conductive thin film 4 during the pulse interval T2, for example, a voltage of about 0.1V. Is determined, and the energization forming is completed when the resistance is 1 M ohm or more.

Next, it is desirable to perform a process called an activation process on the element which has completed the energization forming.

The activation step is, for example, 10 ^-4 to 10 ^-5.
Similar to energization forming, this is a process of repeatedly applying a voltage pulse with a constant pulse peak value at a degree of vacuum of about torr. Carbon and carbon compounds derived from organic substances existing in vacuum are deposited on a conductive thin film. , Element current I
f, a process of significantly changing the emission current Ie. In the activation process, while measuring the device current If and the emission current Ie,
For example, the process ends when the emission current Ie is saturated. Further, it is preferable that the applied voltage pulse is an operation drive voltage.

Here, carbon and carbon compound are graphite (single and polycrystalline) and amorphous carbon (mixture of amorphous carbon and polycrystalline graphite), and their film thickness. Is preferably 500 angstroms or less, more preferably 300 angstroms or less.

It is preferable to drive the electron-emitting device thus produced in an atmosphere having a higher vacuum degree than the vacuum degree in the forming step and the activation step. In addition, it is desirable to operate after heating at 80 ° C. to 150 ° C. in an atmosphere of a higher degree of vacuum.

The vacuum degree higher than the vacuum degree in the forming step and the activation step means, for example, about 10 ⁻⁶ torr.
The degree of vacuum is equal to or higher than r, more preferably an ultrahigh vacuum system, and the degree of vacuum is such that new carbon and carbon compounds are hardly deposited on the conductive thin film. By doing so, the device current If and the emission current Ie can be stabilized. Next, the image forming apparatus of the present invention will be described.

The electron source substrate used in the image forming apparatus is
It is formed by arranging a plurality of surface conduction electron-emitting devices on a substrate.

As a method of arranging the surface conduction electron-emitting devices, the surface conduction electron-emitting devices are arranged in parallel, and both ends of each device are connected by a ladder arrangement (hereinafter referred to as a ladder arrangement electron source substrate and Or a simple matrix arrangement (hereinafter referred to as a matrix-type arrangement electron source substrate) in which X-direction wiring and Y-direction wiring are connected to a pair of device electrodes of the surface conduction electron-emitting device, respectively. An image forming apparatus having a ladder type electron source substrate requires a control electrode (grid electrode) which is an electrode for controlling the flight of electrons from the electron-emitting device.

The structure of the electron source constructed based on this principle will be described below with reference to FIG. 71 is an electron source substrate, 72 is an X-direction wiring, 73 is a Y-direction wiring, 74 is a surface conduction electron-emitting device, and 75 is a connection. The surface conduction electron-emitting device 74 may be either the flat type or the vertical type described above.

In the figure, the substrate used for the electron source substrate 71 is the above-mentioned glass substrate or the like, and its shape is appropriately set according to the application.

The X wirings 72 in the X direction are Dx ₁ , Dx ₂ ,.
.., Dx _m , and the Y-direction wiring 73 includes Dy ₁ , Dy ₂ ,
..., Dy _n wirings.

Further, the material, the film thickness, and the wiring width are appropriately set so that a substantially uniform voltage is supplied to many surface conduction elements.

These m X-direction wirings 72 and n Y-direction wirings 73 are electrically separated by an interlayer insulating layer (not shown) to form a matrix wiring (m and n are both positive integers). .

An interlayer insulating layer (not shown) is formed in a desired region on the entire surface or a part of the substrate 71 on which the X-direction wiring 72 is formed. The X-direction wiring 72 and the Y-direction wiring 73 are drawn out as external terminals.

Further, the device electrodes (not shown) of the surface conduction electron-emitting device 74 are electrically connected to the m X-direction wirings 72 and the n Y-direction wirings 73 by the connecting wires 75, and are connected to the substrate or not shown. It may be formed on any of the interlayer insulating layers.

Further, as will be described later in detail, a scanning (not shown) for applying a scanning signal for scanning the row of the surface conduction electron-emitting devices 74 arranged in the X direction according to the input signal is applied to the X-direction wiring 72. It is electrically connected to the signal generating means.

On the other hand, the Y-direction wiring 73 generates a modulation signal (not shown) for applying a modulation signal that modulates each of the rows of the surface conduction electron-emitting devices 74 arranged in the Y direction according to the input signal. Is electrically connected to the means.

Further, the driving voltage applied to each element of the surface conduction electron-emitting device is supplied as a difference voltage between the scanning signal and the modulation signal applied to the element.

In the above structure, individual elements can be selected and driven independently by simple matrix wiring.

Next, an image forming apparatus using the simple matrix type arrangement electron source created as described above will be described with reference to FIGS. 7, 8 and 9. 7 is a basic configuration diagram of the image forming apparatus, FIG. 8 is a fluorescent film, and FIG. 9 is NTSC.
FIG. 2 is a block diagram of a drive circuit for displaying in accordance with a television signal of a system, and shows an image forming apparatus including the drive circuit.

As described above, in FIG. 7, 71 is an electron source substrate on which an electron-emitting device is formed, 81 is a rear plate to which the electron source substrate 71 is fixed, and 86 is a glass substrate 8.
A face plate having a fluorescent film 84, a metal back 85 and the like formed on the inner surface of 3 and a support frame 82. The rear plate 81, the support frame 82 and the face plate 86 are coated with frit glass or the like in the atmosphere or nitrogen. At 400 ~
Enclose and seal by firing at 500 degrees for 10 minutes or more 8
Make up 8.

Reference numeral 74 shown in FIG. 7 corresponds to the electron emitting portion in FIG. Reference numerals 72 and 73 denote X-direction wiring and Y-direction wiring connected to a pair of device electrodes of the surface conduction electron-emitting device.

The envelope 88 is composed of the face plate 86, the support frame 82, and the rear plate 81 as described above.
The rear plate 81 is provided mainly for the purpose of reinforcing the strength of the electron source substrate 71. Therefore, if the electron source substrate 71 itself has sufficient strength, the separate rear plate 81 is unnecessary, and The support frame 82 may be directly sealed, and the face plate 86, the support frame 82, and the electron source substrate 71 may constitute the envelope 88. Furthermore, by installing an atmospheric pressure resistant support member called a spacer between the face plate 86 and the rear plate 81, it is possible to make the envelope 88 having sufficient strength against atmospheric pressure.

Reference numeral 92 in FIG. 8 is a phosphor. Phosphor 92
In the case of monochrome, it is composed of only the phosphor, but in the case of a color phosphor film, it is composed of a black conductive material 91 called a black stripe or a black matrix depending on the arrangement of the phosphor and a phosphor 92. In the case of color display, the purpose of providing the black stripes and the black matrix is to make the mixed portions between the phosphors 92 of the three primary color phosphors black so as to make the color mixture inconspicuous, and the phosphor film 84 ( This is to suppress the decrease in contrast due to the reflection of external light in FIG. 7). The material of the black stripe is not limited to the commonly used material containing graphite as a main component, but is not limited to this as long as it is a material having conductivity and little light transmission and reflection.

As a method of applying the phosphor to the glass substrate, a precipitation method or a printing method is used regardless of monochrome or color.

A metal back 85 is usually provided on the inner surface of the fluorescent film 84 (FIG. 7). The purpose of the metal back is to improve the brightness by specularly reflecting the light to the inner surface side of the light emitted from the phosphor to the face plate 86 side, to act as an electrode for applying an electron beam acceleration voltage, and This is to protect the phosphor from damage due to collision of negative ions generated in the enclosure. The metal back can be manufactured by performing a smoothing process (usually called filming) on the inner surface of the fluorescent film after manufacturing the fluorescent film, and then depositing Al by vacuum evaporation or the like.

On the face plate 86, a transparent electrode (not shown) may be provided on the outer surface side of the fluorescent film 84 in order to further enhance the conductivity of the fluorescent film 84.

When the above-mentioned sealing is performed, in the case of color, it is necessary to associate each color phosphor with the electron-emitting device, and it is necessary to perform sufficient alignment.

The envelope 88 is connected through an exhaust pipe (not shown) to
Vacuum is set to about ^-7 torr and sealing is performed. In addition, a getter process may be performed in order to maintain the degree of vacuum after the envelope 88 is sealed. Immediately before or after sealing the envelope 88, the getter placed at a predetermined position (not shown) in the envelope 88 is heated by a heating method such as resistance heating or high frequency heating. This is a process of forming a vapor deposition film. The getter usually has Ba as a main component,
Due to the adsorption action of the deposited film, for example, 1 × 10 ⁻⁵ to 10 ⁻⁷
The degree of vacuum of torr is maintained. The steps after the forming of the surface conduction electron-emitting device are appropriately set.

Next, referring to the block diagram of FIG. 9, a schematic structure of a drive circuit for performing a television display of an image forming apparatus constructed by using a simple matrix type arrangement electron source substrate on the basis of an NTSC system television signal will be described. Explain. 101
Is the display panel, and 102 is a scanning circuit, 10
3 is a control circuit, 104 is a shift register, 105 is a line memory, 106 is a synchronizing signal separation circuit, 107 is a modulation signal generator, and Vx and Va are DC voltage sources.

The function of each unit will be described below. First, the display panel 101 has terminals Dox ₁ to Dox _m ,
And terminals Doy ₁ to Doy _n , and the high voltage terminal Hv to connect to an external electric circuit. Of these, terminal D
In ox ₁ to Dox _m , an electron source provided in the display panel, that is, a group of surface conduction electron-emitting devices which are matrix-wired in a matrix of M rows and N columns are sequentially driven row by row (N elements). A scanning signal for application is applied.

On the other hand, a modulation signal for controlling the output electron beam of each element of the surface conduction electron-emitting devices of one row selected by the scanning signal is applied to the terminals Dy ₁ to Dy _n . Further, the high voltage terminal Hv has a DC voltage source V
For example, a DC voltage of 10K [V] is supplied from a,
This is an accelerating voltage for giving enough energy to excite the phosphor to the electron beam output from the surface conduction electron-emitting device. Next, the scanning circuit 102 will be described. The circuit includes M switching elements inside (indicated by S ₁ to S _m in the figure), and each switching element is an output voltage of the DC voltage source Vx or 0 [V]. One of (ground level) is selected, and the terminals Dx ₁ to Dx of the display panel 101 are selected.
It is to be electrically connected to _m . Each of the switching elements S ₁ to S _m operates based on the control signal Tscan output from the control circuit 103. However, in practice, by combining switching elements such as FETs (field effect transistors), It is possible to configure.

The DC voltage source Vx is set so that the drive voltage applied to the non-scanned element is equal to or lower than the electron emission threshold voltage based on the characteristics (electron emission threshold voltage) of the surface conduction electron-emitting element. It is set to output a constant voltage.

The control circuit 103 has a function of matching the operation of each part so that an appropriate display is performed based on an image signal input from the outside. The synchronization signal Tsy sent from the synchronization signal separation circuit 106 described next
Based on nc, Tscan, Tsft, and Tmry control signals are generated for each unit.

The sync signal separation circuit 106 is a circuit for separating the sync signal component and the luminance signal component from the NTSC system television signal input from the outside, and can be constructed by using a frequency separation (filter) circuit. is there. The sync signal separated by the sync signal separation circuit 106 is composed of a vertical sync signal and a horizontal sync signal, as is well known, but is shown here as a Tsync signal for convenience of description. On the other hand, the luminance signal component of the image separated from the television signal is referred to as a DATA signal for convenience, but the signal is input to the shift register 104.

The shift register 104 performs serial / parallel conversion of the DATA signal serially input in time series for each line of the image, and based on the control signal Tsft sent from the control circuit 103. It operates (that is, the control signal Tsft may be rephrased as a shift clock of the shift register 104). The serial / parallel converted image data for one line (corresponding to drive data for N electron emission elements) is output from the shift register 104 as n parallel signals Id ₁ to Id _n .

[0085] The line memory 105 is a storage device for storing data of one line of the image only for a necessary time, stores the contents of appropriate Id ₁ to Id _n in accordance with the control signal Tmry sent from the control circuit 103 To do. The stored contents are output as Id ₁ to Id ′ _n and input to the modulation signal generator 107.

The modulation signal generator 107 is a signal source for appropriately driving and modulating each of the surface conduction electron-emitting devices according to each of the image data Id ' ₁ to Id' _n , and its output signal is It is applied to the surface conduction electron-emitting device in the display panel 101 through the terminals Doy ₁ to Doy _n .

As described above, the electron-emitting device according to the present invention has the following basic characteristics with respect to the emission current Ie (FIG. 5). That is, a clear threshold voltage V for electron emission
and electron emission occurs only when a voltage higher than Vth is applied.

For voltages above the electron emission threshold,
The emission current also changes according to the change in the voltage applied to the element. The value of the electron emission threshold voltage Vth or the degree of change of the emission current with respect to the applied voltage may change by changing the material, configuration, or manufacturing method of the electron emitting element. Can be said.

That is, when a pulsed voltage is applied to this element, for example, no electron emission occurs even if a voltage below the electron emission threshold is applied, but when a voltage above the electron emission threshold is applied, an electron beam is applied. Is output. In that case, firstly, the intensity of the output electron beam can be suppressed by changing the peak value of the pulse. Second, it is possible to control the total amount of charges of the electron beam output by changing the pulse width.

Therefore, as a method of modulating the electron-emitting device according to the input signal, a voltage modulation method, a pulse width modulation method, etc. can be mentioned. A voltage-modulation circuit is used to generate a voltage pulse having a length of, but to appropriately modulate the peak value of the pulse according to the input data. In order to implement the pulse width modulation method, the modulation signal generator 1
As 07, a voltage pulse with a constant peak value is generated,
A circuit of a pulse width modulation system that appropriately modulates the width of the voltage pulse according to the input data is used.

Through the series of operations described above, the image forming apparatus of the present invention can display television on the display panel 101. Although not particularly described in the above description, the shift register 104 and the line memory 105 are
It does not matter whether it is a digital signal type or an analog signal type, and the point is that the serial / parallel conversion and storage of the image signal may be performed at a predetermined speed.

When the digital signal system is used, it is necessary to convert the output signal DATA of the sync signal separation circuit 106 into a digital signal.
It is possible if a converter is provided. Also in connection with this,
The circuit used for the modulation signal generator 107 is slightly different depending on whether the output signal of the line memory 105 is a digital signal or an analog signal.

First, the case of digital signals will be described. In the voltage modulation method, for example, a well-known D / A conversion circuit may be used as the modulation signal generator 107, and an amplification circuit or the like may be added if necessary.

In the case of the pulse width modulation method, the modulation signal generator 107 is, for example, a high-speed oscillator and a counter (counter) for counting the number of waves output from the oscillator, and the output value of the counter and the output value of the memory. It can be configured by using a circuit in which comparators for comparison are combined. If necessary, an amplifier for voltage-amplifying the pulse-width-modulated modulation signal output from the comparator to the drive voltage of the surface conduction electron-emitting device may be added.

Next, the case of an analog signal will be described.
In the voltage modulation method, for example, a well-known amplifier circuit using an operational amplifier or the like may be used as the modulation signal generator 107, and a level shift circuit or the like may be added if necessary. In the case of the pulse width modulation method, for example, a well-known voltage control type oscillation circuit (VCO) may be used, and if necessary, an amplifier for amplifying the voltage up to the driving voltage of the surface conduction electron-emitting device may be used. May be added. In the image display device completed as described above, each of the electron-emitting devices has an external terminal Dox ₁ to Dox _m , D
Electrons are emitted by applying a voltage through oy _{1 to} Do _n , and the metal back 8 is supplied through the high voltage terminal Hv.
5 or a transparent electrode (not shown) is applied with a high voltage, the electron beam is accelerated, collided with the fluorescent film 84, excited and emitted to display an image.

The structure described above is a schematic structure necessary for manufacturing a suitable image forming apparatus used for display and the like, and the detailed parts such as the material of each member are not limited to the above contents. Instead, it is appropriately selected to suit the application of the image forming apparatus. Further, although the NTSC system is given as an example of the input signal, the input signal is not limited to this, and PAL, SECA
Various methods such as the M method may be used, or a TV signal (for example, a high-definition TV such as the MUSE method) including a plurality of scanning lines may be used.

Next, the above-mentioned ladder type electron source substrate and the image display device using the same will be described with reference to FIGS.

In FIG. 10, 110 is an electron source substrate, 1
11 is an electron-emitting device, 112 is Dx ₁ ~ Dx_TenIs the above
It is a common wiring connected to the electron-emitting device. Electron-emitting device
A plurality of 111 are arranged on the substrate 110 in parallel in the X direction.
Is done. (This is called an element row). Multiple rows of this element
It is arranged on a substrate to become a ladder type electron source substrate. For each element row
By applying a drive voltage as appropriate between common lines, each element row
Can be driven independently. That is, electronic mail
A voltage above the electron emission threshold is applied to the device row that emits
, The electron emission threshold for the device rows that do not emit the electron beam.
The following voltages may be applied. Also, common between each element row
Wiring Dx₂ ~ Dx₉ Is, for example, Dx₂ , Dx₃ Same distribution
You may make it a line.

FIG. 11 is a diagram showing the structure of an image forming apparatus provided with a ladder-type electron source. 120 is a grid electrode, 121 is a hole through which electrons pass, 122
Is an external terminal of the container made of Dox ₁ , Dox ₂ , ..., Dox _m , and 123 is a G connected to the grid electrode 120.
_1, G _2, ···, vessel terminals consisting of G _n, 124 is an electron source substrate of the common wiring of each element rows were identical wiring as described above. The same reference numerals as those in FIGS. 7 and 10 denote the same members. The difference from the image forming apparatus having the simple matrix arrangement (FIG. 7) described above is that the grid electrode 120 is provided between the electron source substrate 110 and the face plate 86.

The grid electrode 120 is capable of modulating the electron beam emitted from the surface conduction electron-emitting device, and passes the electron beam through a striped electrode provided orthogonally to the ladder-shaped arrangement of element rows. For this reason, one circular opening 121 is provided for each element.
The shape and installation position of the grid are not necessarily as shown in FIG. 11, and a large number of passage openings may be provided in the form of a mesh as openings. For example, they may be provided around or near the surface conduction electron-emitting device. .

The external terminal 122 and the grid external terminal 123 are electrically connected to a control circuit (not shown).

In this image forming apparatus, the modulation signals for one line of the image are simultaneously applied to the grid electrode columns in synchronization with the sequential driving (scanning) of the element rows one column at a time, so that each electron beam is scanned. Control the irradiation of the phosphor of the
Can be displayed line by line.

Further, according to the present invention, it is possible to provide an image forming apparatus suitable for not only a display device for television broadcasting but also a display device such as a video conference system and a computer. Furthermore, it can also be used as an image forming apparatus as an optical printer including a photosensitive drum or the like.

[0104]

The present invention will be described in more detail with reference to the following examples. [Embodiment 1] This embodiment shows a method of manufacturing an image forming apparatus using a surface conduction electron-emitting device of the present invention and an electron source in which a large number of such devices are arranged in a matrix.

A plan view of a part of the electron source is shown in FIG. 13 is a sectional view taken along the line AA ′ in the figure. However,
2, FIG. 13, and FIG. 14 that indicate the same symbols indicate the same things. Here, 1 is a substrate, 72 is an X-direction wiring (lower wiring) corresponding to Dx _m in FIG. 6, 73 is a Y-direction wiring (upper wiring) corresponding to Dy _n in FIG. 6, 4 is a conductive thin film, 2 ，
3 is a device electrode, 31 is an interlayer insulating layer, 32 is a contact hole for electrical connection between the device electrode 2 and the lower wiring 72,
33 is a silicon nitride film.

Next, the manufacturing method will be specifically described in the order of steps with reference to FIG.

Step- (a) A silicon oxide film having a thickness of 0.5 μm was formed on the substrate 1 made of cleaned soda-lime glass by a sputtering method. 50 angstrom thick Cr, 60 thick by vacuum evaporation
After sequentially stacking Au of 00 angstrom, a photoresist (manufactured by AZ1370 Hoechst) is spin-coated by a spinner and baked, and then a photomask image is exposed and developed to form a resist pattern of the lower wiring 72.
The Cr deposition film is wet-etched to form the lower wiring 72 having a desired shape.

Step- (b) Next, an interlayer made of a silicon oxide film having a thickness of 0.5 μm.
The insulating layer 31 is deposited by the RF sputtering method, and the thickness is further increased.
Plasma CVD of 0.5 micron silicon nitride film 33
Method by SiH_Four And N₂ Are sequentially deposited. Silico
SiH as a gas for forming a nitride film_Four And N₂ Used
But SiH_Four And NH₃ , SiCl_Four And NH ₃ , SiCl
_Four And N₂ You may form into a film by the combination of these.

Step- (c) A photoresist pattern for forming contact holes is formed in the silicon oxide film and the silicon nitride film deposited in the step- (b), and using this as a mask, the interlayer insulating layer 31 and the silicon nitride film 33 are formed. Contact hole 3 by etching
Form 2 The etching was performed by RIE (Reactive Ion Etching) method using CF ₄ and H ₂ gas.

Step- (d) Next, a pattern for forming the device electrodes 2 and 3 and the gap G between the device electrodes is formed into a photoresist (RD-2000N-41).
(Manufactured by Hitachi Chemical Co., Ltd.), and Ti having a thickness of 50 Å and Ni having a thickness of 1000 Å were sequentially deposited by a vacuum vapor deposition method. The photoresist pattern was dissolved in an organic solvent, the Ni / Ti deposition film was lifted off, the device electrode spacing G was set to 3 μm, and device electrodes 2 and 3 having a device electrode width of 300 μm were formed.

Step- (e) After forming a photoresist pattern for the upper wiring 73 on the device electrodes 2 and 3, Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially deposited by vacuum evaporation, and lift-off is performed. The unnecessary portion was removed and the upper wiring 73 having a desired shape was formed.

Step- (f) Organic Pd (ccp4230 Okuno Pharmaceutical Co., Ltd.) was formed on the substrate surface.
Was manufactured by spin coating with a spinner and heated and baked at 300 ° C. for 10 minutes. The conductive thin film 4 for forming the electron-emitting portion, which was formed of fine particles of Pd as the main element, was about 100 Å in thickness and the sheet resistance was 5 × 10 ⁴ Ω / □. Step- (g) A pattern to be the conductive thin film 4 for forming the electron emission portion was formed with a photoresist (OMR83 20 cp, manufactured by Tokyo Ohka Co., Ltd.), and dry etching was performed. Dry etching is a normal parallel plate cathode coupled type, and an apparatus using a turbo molecular pump and a rotary pump for the vacuum exhaust system,
Ar flow rate = 20 sccm, gas pressure 4.5 Pa, RF
(13.56 MHz) Power = 150 W was performed for 3 minutes.

After completion of the dry etching, the photoresist was removed by UV / 30 asher treatment at 150 ° C. for 30 minutes.

Through the above steps, the lower wiring 72, the interlayer insulating layer 31, the silicon nitride film 33, the upper wiring 73, the device electrodes 2 and 3, the conductive thin film 4 and the like were formed on the insulating substrate 1.

An electron source and an image forming apparatus (FIG. 7) were produced using the matrix type electron source substrate (FIG. 12) having the surface conduction electron-emitting device thus obtained. As described in detail in the above embodiment, each member is coated with frit glass, and 400 to 500 is applied in air or nitrogen atmosphere.
The envelope 88 was configured by sealing by firing at 10 ° C. for 10 minutes or more.

Next, after exhausting with a vacuum pump and reaching a sufficient degree of vacuum, terminals Dox ₁ to Dox _m and Doy ₁
To Don _n through electrodes 2 and 3 of the electron-emitting device 74
A voltage was applied in the meantime, and the conductive thin film 4 was energized (forming) to form the electron emitting portion 5. The voltage waveform of the forming process is shown in FIG.

In FIG. 4, T1 and T2 are the pulse width and pulse interval of the voltage waveform. In this embodiment, T1 is 1 millisecond,
T2 is 10 milliseconds, the peak value of the triangular wave (peak voltage during forming) is 5 V, and the forming process is about 1
It was performed for 60 seconds in a vacuum atmosphere of × 10 ^-6 torr. Although there was no decrease in resistance after sealing of the electron-emitting devices 74 and a slight increase in resistance was observed on the contrary, each device could be formed uniformly. In the electron-emitting portion 5 thus manufactured, the fine particles containing the baladium element as the main component are dispersed and arranged, and the average particle diameter of the fine particles is 30.
It was Angstrom.

The characteristics of the electron-emitting device which has completed the above-mentioned forming are activated in a vacuum atmosphere of about 1 × 10 ^-5 torr with the voltage of the metal back 85 being 1 kV and the distance between the metal back and the electron-emitting device being 4 mm. Emission current Ie
When the device voltage was 14 V, the device current If was 2.2 mA and Ie was 1.1 μA.
The variation between f and Ie between the respective elements was ± 5 to 6%.

The atmosphere of the envelope thus completed is evacuated by a vacuum pump through an exhaust pipe (not shown),
The exhaust pipe (not shown) was welded by heating with a gas burner at a vacuum degree of about 0 ⁻⁷ torr to seal the envelope.

Finally, a getter process was performed to maintain the degree of vacuum after sealing. Immediately before the sealing, a getter arranged at a predetermined position (not shown) in the image forming apparatus was heated by high-frequency heating or the like to form a vapor deposition film. The getter was mainly composed of Ba or the like.

In the image display device of the present invention completed as described above, each electron-emitting device has a terminal Dox ₁ outside the container.
To Dox _m , Doy ₁ to Doy _n , electrons are emitted by applying a scanning signal and a modulation signal from a signal generating means (not shown), and a high voltage of several kV or more is applied to the metal back 85 through the high voltage terminal Hv. Then, the electron beam was accelerated, collided with the fluorescent film 84, and excited and emitted to display an image. At this time, since the forming of each element after sealing was performed uniformly, the electron emission characteristics were uniform, and uneven brightness, no light emission point, etc. were not observed.

The structure described above is a schematic structure necessary for manufacturing a suitable image forming apparatus used for display and the like, and the detailed parts such as the material of each member are not limited to the above contents. , As appropriate for the application of the image device.

Further, according to the idea of the present invention, it is not limited to a suitable image forming apparatus used for display, but an alternative light emitting source such as a light emitting diode of an optical printer including a photosensitive drum and a light emitting diode. As the above, the above-mentioned image forming apparatus can be used. At this time, by appropriately selecting the above-mentioned m row-direction wirings and n column-direction wirings, it can be applied not only as a line-shaped light emitting source but also as a two-dimensional light-emitting source.

[Embodiment 2] In this embodiment, an image is formed using the surface conduction electron-emitting device of the present invention and an electron source (ladder type arrangement electron source) in which a large number of such devices are arranged in parallel. This is a method for manufacturing the device.

In FIG. 10, as described above, 110
Is an electron source substrate, 111 is an electron-emitting device, and 112 is Dx _1.
Dx ₁₀ are common wirings connected to the electron-emitting devices. A plurality of electron-emitting devices 111 are arranged on the substrate 110 in parallel in the X direction. A plurality of the element rows are arranged on the substrate to form a ladder type electron source substrate. Reference numeral 112 is a wiring electrode for connecting electrodes of surface conduction electron-emitting devices arranged in a staggered pattern on the substrate in parallel. Such devices are connected in parallel between the wiring electrodes, and each wiring electrode line with respect to the electrode gap G is connected. The voltage can be applied sequentially.

FIG. 11 is a perspective view showing an image forming apparatus using the ladder type electron source substrate of the present invention. In this figure, the surface-conduction type electron-emitting devices 111 and the rows of the grid 120 arranged in parallel are configured to have a matrix structure in which they intersect each other at a right angle.

That is, for the column of the surface conduction electron-emitting devices 111 connected in parallel by the wiring electrodes 112 of the devices, the grid 120 having an opening on the electrode gap G, which is an electron-emitting portion, is interposed via the insulating layer 31. The rows are formed orthogonally. Here, the rows of the grid 120 are a matrix that covers a series of elements orthogonal to the rows of the surface conduction electron-emitting devices 111. Now, a high voltage is applied to the metal back 85, and a voltage is sequentially applied and swept to the staggered wiring line of the wiring electrode 112 to electron-emit the surface conduction electron-emitting device 111 line-sequentially. Next, grid 12
By sequentially applying an arbitrary signal voltage to the 0th column, it is possible to display an arbitrary image by fluorescent surface emission.

Next, the method of manufacturing the ladder type power supply substrate of the present invention and the structure of the image forming apparatus will be specifically described with reference to FIGS.

Step- (a) A silicon nitride film 33 having a thickness of 0.5 μm is formed on the cleaned soda-lime glass 1 by a plasma CVD method.

Step- (b) Next, a pattern for forming the device electrodes 2 and 3 and the gap G between the device electrodes is patterned with a photoresist (RD-2000N-41).
(Manufactured by Hitachi Chemical Co., Ltd.), and Ti having a thickness of 50 Å and Ni having a thickness of 1000 Å were sequentially deposited by a vacuum vapor deposition method. The photoresist pattern was dissolved in an organic solvent, the Ni / Ti deposition film was lifted off, the device electrode spacing G was set to 3 μm, and device electrodes 2 and 3 having a device electrode width of 300 μm were formed.

Step- (c) After forming a photoresist pattern of the common wiring 112 on the device electrodes 2 and 3, a T film having a thickness of 50 Å is formed.
i, Au having a thickness of 5000 Å was sequentially deposited by vacuum evaporation, and unnecessary portions were removed by lift-off to form a common wiring 112 having a desired shape.

Step- (d) On the surface of the substrate, organic Pd (ccp4230 Okuno Pharmaceutical Co., Ltd.)
Was manufactured by spin coating with a spinner and heated and baked at 300 ° C. for 10 minutes. The conductive thin film 4 for forming the electron-emitting portion, which was formed of fine particles of Pd as the main element, was about 100 Å in thickness and the sheet resistance was 5 × 10 ⁴ Ω / □. Further, a pattern to be the conductive thin film 4 for forming the electron emitting portion was formed with a photoresist (OMR8320cp manufactured by Tokyo Ohka Co., Ltd.) and dry etching was performed. Dry etching
Ordinary parallel plate cathode coupling type, using turbo molecular pump and rotary pump for vacuum exhaust system, Ar flow rate =
20 sccm, gas pressure 4.5 Pa, RF (13.56)
MHz) Power = 150 W, and the operation was performed for 3 minutes.

After completion of the dry etching, the photoresist was removed by UV / 30 asher treatment at 150 ° C. for 30 minutes.

Through the above steps, the silicon nitride film 33, the common wiring 112, the device electrodes 2 and 3, and the conductive thin film 4 for forming the electron emitting portion were formed on the insulating substrate 1.

Step- (e) Next, an SiO 2 layer having a thickness of 8500 angstroms is formed thereon.
_An insulating layer 31 made of ₂ and a grid 120 made of Cr having a thickness of 1000 angstroms / Ni having a thickness of 20000 angstroms / Cr having a thickness of 1000 angstroms / Al having a thickness of 10000 angstroms are sequentially vacuum-deposited.

Step- (f) Next, the electron-emitting device 11 is formed by photolithography etching.
The insulating layer 31 and the grid 120 were formed by patterning SiO ₂ and Cr / Ni / Cr / Al so as to provide an opening in a rectangular shape of 190 × 34 μm on 1 (FIG. 11).

Since the above steps have a structure in which the surface conduction electron-emitting device 111, the insulating layer 31, and the grid 120 are sequentially formed on the same substrate, a thin film, photolithography,
A technique such as etching can be used. Therefore, there is a degree of freedom in selecting the material of each member, and dimensional accuracy and positional accuracy as high as those of a semiconductor manufacturing apparatus can be obtained. Further, by using a mask aligner for a large substrate such as photolithography, it is possible to easily increase the area. Also, at the opening of the grid 120, 190
If the error is about ± 4 μm with respect to × 34 μm, the driving voltage may be slightly changed, but sufficient modulation can be performed.
In addition, the insulating layer 31 also has a thickness of 8.5 μm to 12 μm.
If the distance is between m, similarly, sufficient modulation can be performed for driving.

Within the above-mentioned respective dimensions, it was possible to actually obtain similar bright spots on the phosphor screen.

Using the ladder-type electron source substrate having the surface conduction electron-emitting device thus obtained, the above-mentioned electron source and image forming apparatus (FIG. 11) were manufactured. As described in detail in the above embodiment, each member was coated with frit glass and baked by baking at 400 to 500 ° C. for 10 minutes or more in the air or a nitrogen atmosphere to seal the members.

Next, after exhausting with a vacuum pump and reaching a sufficient degree of vacuum, the terminals Dox ₁ and Doy ₁ , Dox ₂ and D
oy _2, · · · ·, through Dox _n and Doy _n, the voltage applied to between the electrodes 2 and 3 of the electron-emitting device 111, the electron-emitting region 5, the energization process (forming process the electron-emitting region forming thin film 4 ) Was performed. FIG. 4 shows the voltage waveform of the forming process.

In FIG. 4, in the present embodiment, T1 is 1 millisecond,
With T2 set to 10 milliseconds, the peak value of the triangular wave (forming
The peak voltage is 7V, and the forming process is about 1x
10 ^-6It was performed for 60 seconds under a vacuum atmosphere of torr. Each electric
Assuming that the resistance of the child emission device 111 is uniform.
If RΩ is set, it corresponds to one line in which n elements are arranged in parallel.
The resistance value of only this element is R / n (Ω). After sealing
The resistance of each element decreases, and R / n is the resistance of the common wiring 112.
If the value is equal to or less than the value, formin
The voltage drop caused by the wiring resistance during voltage application
Element farther away is stronger and has uniform forming
It was difficult to do in-line. However, this electronic release
There is no decrease in resistance after sealing the output element,
Although a slight increase was observed, each element was uniformly exposed for each line.
I was able to Electron produced in this way
The emitting portion 5 is made up of fine particles mainly composed of the element valadium.
The particles are dispersed and the average particle size of the particles is 30.
It was Angstrom. Finished the above forming
The characteristics of the electron-emitting device are about 1 × 10^-Fivevacuum of torr
Activated in an atmosphere and measured when Ie is saturated
Then, the device current If = 14V when the device voltage If = 2.2
mA, emission current Ie = 1.1 μA, and If and Ie are both
The variation between the elements was ± 5 to 6%.

The atmosphere of the envelope thus completed is evacuated by a vacuum pump through an exhaust pipe (not shown),
At a vacuum degree of about 10 ^-7 torr, an exhaust pipe (not shown) is heated by a gas burner to weld and seal the envelope,
Further, getter processing was performed. A grid electrode 120 is provided between the substrate 110 and the face plate 86. The grid electrode 120 is capable of modulating the electron beam emitted from the surface conduction electron-emitting device, and passes the electron beam through a striped electrode provided orthogonal to the ladder-type arrangement of the element rows. A circular opening 121 is provided for each element. At this time, since the formation of each element after sealing was performed uniformly, the electron emission characteristics were uniform, and the uneven brightness and the
No light-emitting point was observed.

In this image forming apparatus, the modulation signals for one line of the image are simultaneously applied to the grid electrode columns in synchronization with the sequential driving (scanning) of the element rows one column at a time, so that each electron beam Control the irradiation to the phosphor and display the image 1
Can be displayed line by line.

[0144]

As described above, in the surface conduction electron-emitting device, the silicon nitride film is formed on the surface on which the thin film including at least the electron-emitting portion is formed. (1) Conductivity after the sealing step Suppresses the decrease in the resistance of the thin film,
Each element can be formed under the same conditions.

(2) The same characteristics are obtained even when a plurality of electron-emitting devices having the same characteristics are used.

Further, in the image forming apparatus using such an electron source, (1) an image having no light emitting point and uneven brightness can be obtained.

(2) Inexpensive soda lime glass can be used and can be manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a schematic diagram illustrating the configuration of a basic flat surface conduction electron-emitting device of the present invention. (A) Plan view (b) Sectional view

FIG. 2 is a schematic cross-sectional view illustrating the configuration of a basic vertical surface conduction electron-emitting device of the present invention.

FIG. 3 is a schematic cross-sectional view illustrating an example of a method of manufacturing a surface conduction electron-emitting device of the present invention.

FIG. 4 is a graph illustrating an example of a voltage waveform of energization forming according to the present invention. (A) When the pulse peak value is constant (b) When the pulse peak value is increased

FIG. 5 is a graph illustrating characteristics of the electron source of the present invention.

FIG. 6 is a schematic diagram illustrating an electron source having a simple matrix arrangement.

FIG. 7 is a perspective view illustrating an example of a schematic configuration of an image forming apparatus of the present invention.

FIG. 8 is a schematic diagram illustrating a fluorescent film. (A) Stripe (b) Matrix

FIG. 9 is a block diagram illustrating a drive circuit for performing display in accordance with an NTSC television signal and an image display device including the drive circuit.

FIG. 10 is a schematic plan view illustrating a ladder-type electron source.

FIG. 11 is a perspective view illustrating an example of a schematic configuration of an image forming apparatus of the present invention.

FIG. 12 is a schematic plan view illustrating an electron source substrate having a simple matrix arrangement according to the present invention.

13 is a cross-sectional view illustrating a cross section taken along the line AA ′ in FIG.

FIG. 14 is a cross-sectional view illustrating a manufacturing process of an electron source substrate having a simple matrix arrangement according to the present invention.

FIG. 15 is a cross-sectional view illustrating a manufacturing process of an electron source substrate having a simple matrix arrangement according to the present invention.

FIG. 16 is a cross-sectional view illustrating the manufacturing process of the ladder-type arrangement electron source substrate of the present invention.

FIG. 17 is a schematic plan view illustrating a conventional surface conduction electron-emitting device.

FIG. 18 is a schematic diagram illustrating a configuration of a conventional surface conduction electron-emitting device. (A) Plan view (b) Sectional view

FIG. 19 is a schematic cross-sectional view illustrating an example of a method for manufacturing a conventional surface conduction electron-emitting device.

FIG. 20 is a schematic plan view illustrating a configuration of a conventional electron source substrate having a simple matrix arrangement.

21 is a schematic cross-sectional view for explaining the AA ′ cut surface of FIG. 20. FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Substrate 2, 3 Element electrode 4 Conductive thin film 5 Electron emitting portion 21 Step forming portion 31 Interlayer insulating layer 32 Contact hole 33 Silicon nitride film 71 Electron source substrate 72 X direction wiring 73 Y direction wiring 74 Surface conduction electron emitting element 75 Wiring 81 Rear plate 82 Support frame 83 Glass substrate 84 Fluorescent film 85 Metal back 86 Face plate 87 High voltage terminal 88 Envelope 91 Black conductive material 92 Phosphor 93 Glass substrate 101 Display panel 102 Scanning circuit 103 Control circuit 104 Shift register 105 lines Memory 106 Synchronous signal separation circuit 107 Modulation signal generator, Vx and Va: DC voltage source 110 Electron source substrate 111 Electron emission device 112 Dx _{1 to} Dx ₁₀ are common wiring for wiring the electron emission device 120 Grid electrode 121 Electron Passed through Holes _{122 Dox 1, Dox 2, ···} , G 1 , which is connected to the vessel terminals 123 grid electrodes 120 made of Dox _m, G _2, · of
.... _Gn external terminals 124 Electron source substrate

Claims (4)

[Claims] 1. A surface conduction electron-emitting device comprising at least a device electrode and a thin film including an electron emitting portion on a substrate, wherein a silicon nitride film is formed on the surface of the substrate on which the thin film including at least the electron emitting portion is formed. A surface-conduction type electron-emitting device having. 2. A surface conduction electron-emitting device comprising at least a device electrode and a thin film including an electron-emitting portion on an insulating substrate by row-direction wiring and column-direction wiring laminated via an insulating layer. By connecting a pair of opposing device electrodes and electron-emitting portions, a thin film including at least electron-emitting portions is formed on the electron source substrate in which a large number of surface-conduction electron-emitting devices are arranged in a matrix. On the substrate surface,
An electron source having a silicon nitride film. 3. A common structure for connecting a pair of facing device electrodes and an electron emitting portion of a surface conduction electron-emitting device, which are composed of at least a device electrode and a thin film including an electron emitting portion, on an insulating substrate. In an electron source having wiring and arranging a large number of surface conduction electron-emitting devices in parallel, an electron characterized by having a silicon nitride film on the surface of the substrate forming a thin film including at least an electron-emitting portion. source. 4. An image forming apparatus comprising at least a phosphor and an electron source, wherein the electron source is the electron source according to claim 2 or 3.