JPH08162563A - Element junction structure for semiconductor mounting board and its manufacture - Google Patents

Abstract

PURPOSE: To provide a semiconductor device mounting board capable of being made with low cost and having an input and output pin of high strength and a junction of a lead in a semiconductor device to which LSI's such as a multi- layer wiring substrate, a semiconductor package, an insulation substrate using glass ceramic or the like are mounted. CONSTITUTION: In an element junction pad on a semiconductor mounting board 1, an element junction pad structure provided in a thin film metallized part 3 inside a cavity 2 is structured and parts such as a Kovar pin 6 or the like are connected with solder or brazing material 4. Even the semiconductor mounting board 1 having a comparatively low mechanical strength such as low temperature sintered glass ceramic, etc., can be used, and the element junction pad is metallized with a thin film in the cavity, whereby it is possible to obtain a junction body comprising glass ceramic having low cost and high strength and an input and output part composed of a metal or a brazing material.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bonding structure of a semiconductor device for mounting an LSI such as a multilayer wiring substrate, a thick film multilayer substrate, a semiconductor package, and an insulating substrate using glass ceramic.

[0002]

2. Description of the Related Art Generally, element bonding pads of a semiconductor mounting ceramic substrate are formed by thick film metallization. However, when a thick film metallized substrate is formed on a low temperature sintered substrate such as a glass ceramic substrate and the input / output pins or leads made of metal or alloy are joined by solder or brazing material, there is a problem that metallization peels off. . Therefore, the element bonding pads on the conventional low temperature sintered substrate are often formed of a thin film. FIG. 5 shows a configuration example of a bonded body of a mounting substrate and an input / output pin made of metal when a thin film metallization is formed on a conventional mounting substrate. Conventionally, when forming a thin film metallized pad, after polishing the substrate, a thin film is formed on the substrate by sputtering or vapor deposition through a metal mask, or after polishing the substrate, after sputtering or vapor deposition, the thin film metallization is performed through photolithography and etching processes. Had formed a pad.
When a metal mask is used, the process time can be shortened relatively, but there is a problem that a short pitch occurs in a narrow pitch pattern because the sputtered particles wrap around between the substrate and the mask. In addition, when the photolithography process is used, the process time becomes significantly longer than when the thick film metallization is formed, which causes a problem of increasing cost. Also,
Even when the thin film metallization is used, the tensile stress generated at the time of joining with the solder or the brazing material is concentrated on the metallized end portion, so that metallization peeling may occur.

Further, from the viewpoint of miniaturization of package, high density, sealing property and signal propagation characteristics, a structure for mounting an LSI chip in a cavity is disclosed in Japanese Patent Laid-Open No. 62-4859.
JP-A-58-74047, JP-A-58-
There are many reports in Japanese Patent No. 111350, Japanese Unexamined Patent Publication (Kokai) No. 4-24955, etc., but no one in which an element bonding pad is provided in an independent cavity is reported, and even if the element itself is in the cavity. From the viewpoint of bonding strength, the presence or absence of cavities has no meaning.

[0004]

As described above, in the low-temperature sintered substrate, particularly the metallized structure and the bonding structure on the glass ceramic substrate, the low-cost, high-strength low-temperature sintered substrate and the input / output pin made of metal are used. It was impossible to obtain a joint with the lead.

An object of the present invention is to eliminate such drawbacks of the prior art and manufacture at low cost, and a semiconductor device mounting board represented by glass ceramics having high strength input / output pin and lead bonding. It is to provide a joint structure applicable to the above.

[0006]

According to the present invention, in a device bonding pad on a low temperature sintered substrate on which a semiconductor is mounted, the pad is a device bonding pad consisting of thin film pads on the side surface and the bottom surface in independent cavities. Is characterized by.

FIG. 1 shows an example of the structure of the element bonding pad of the present invention. A glass ceramic substrate or a ceramic substrate is preferably used as the mounting substrate used in the present invention, but the composition thereof is not limited and is applied to a wide range of materials. The conductor material used for the substrate is also not limited. The composition, thickness, and forming method of the thin film metallization are not limited, and sputtering, vapor deposition, electroless plating, electrolytic plating, etc. are appropriately selected. Also, the shape and size of the cavity are not limited.

2 and 3 show examples in which the package lead and the input / output pin are bonded to the device bonding pad of FIG. 1, respectively. The material and shape of the parts to be joined are not limited. Further, as the brazing material and the solder, the Ag—Cu based eutectic alloy is also suitable, but the Au—Si based alloy, the Au—Ge based alloy, the Au—Cu based alloy, and the Al—Si.
Alloy, Cu-Zn alloy, Ni-Cr alloy, Mg-
Al-based alloy, Sn-Pb-based alloy, Sn-Zn-based alloy, S
n-Ag type alloy, Sn-Sb type alloy, Cd-Zn type alloy, Pb-Ag type alloy, Cd-Ag type alloy, Zn-Al
The alloy may be an Al-based alloy, an Au-Sn-based alloy, or the like, without limitation.
It may be at a temperature (about 1000 ° C. or less) at which the glass ceramic substrate does not soften or the conductor material of the substrate does not melt.
Further, after the bonding, plating of the element pads and the bonded alloy or metal with Ni / Au or the like is more effective from the viewpoint of the bonding property and the anticorrosion property in a later step.

According to the present invention, the metallized end is located on the side surface of the cavity, and the fillet end of the brazing filler metal, which has the most stress generated at the time of joining, does not coincide with the end of the metallization. It is possible to obtain a high-strength bonded body without the metallization peeling that has occurred in the bonded body having no cavity.

FIG. 4 shows an example of manufacturing the device bonding pad of FIG. By forming a thin film metallization on the entire surface of the substrate in which the cavities are previously provided at the time of manufacture, the substrate surface is polished to obtain an element bonding pad formed of the thin film metallization in the cavities. According to this method, it is possible to significantly reduce the process time for forming the thin film metallization, so that cost reduction can be realized.

[0011]

[Examples] The substrate, thin film layer structure, brazing material,
The example which changed the joining element variously is shown.

(Example 1) Diameter 0.8 mm, depth 0.5 mm
It has cavities of 1.27 mm pitch and is made of borosilicate glass and alumina with Ag-Pd as the inner conductor.
Cr on a multi-layer wiring glass-ceramic substrate fired at 00 ° C
After forming the / Cu thin film layers by sputtering to a thickness of 0.1 μm and 0.5 μm, respectively, the surface of the substrate was polished to form the element bonding pad in the cavity. A Ni thin film layer having a thickness of 0.1 μm is formed on the pad by electroless plating, and is made of Sn-Pb-based solder.
Leads made of Au-plated Kovar in a 0 pin-alumina package were bonded in nitrogen at 230 ° C. With this package, even if pulling 10 kgf in the vertical and 45 ° directions, a strong joint was obtained without causing breakage such as peeling of the joint. The process time required for joining is
It was 50 minutes.

(Embodiment 2) Diameter 1.7 mm, depth 0.5 mm
The same Ag-Pd multilayer wiring glass-ceramic substrate as in Example 1 having the cavities of 2.54 mm pitch and Ti
/ Mo thin film layers having a thickness of 0.1 μm and 1.5 μm respectively were formed by sputtering, and then the substrate surface was polished to form element bonding pads in the cavities. A Ni thin film layer having a thickness of 0.1 μm was formed on the pad by electroless plating, and Kovar input / output pins were bonded in nitrogen at 780 ° C. by an Ag—Cu eutectic brazing material. The joining strength of the input / output pins was 10 kgf or more in the vertical direction and 6.6 kgf in the 45 ° direction, which was a sufficient value. The process time required for joining was 1 hour.

(Embodiment 3) Diameter 1.3 mm, depth 0.5 mm
The same Ag-Pd multilayer wiring glass ceramic substrate as in Example 1 having the cavities of 2.54 mm pitch and Cr
The / Pd thin film layers were formed by sputtering to have thicknesses of 0.1 μm and 0.6 μm, respectively. Next, by polishing the surface of the substrate, an element bonding pad in the cavity was formed. Further, Kovar input / output pins plated with Au by Au—Sn solder were joined at 320 ° C. in nitrogen. The joint strength of the I / O pin is 5kgf in the vertical direction.
It showed a practical value of 2.3 kgf in the 45 ° direction. The process time required for joining was 1 hour.

(Comparative Example 1) Example 1 without cavity
After polishing the surface of the same multi-layer wiring glass-ceramic substrate as above, the Cr / Cu thin film layers were each 0.1 μm and 0.5 μm.
After forming to a thickness of m by sputtering, patterning by photolithography and wet etching were performed to obtain a substrate surface with a diameter of 0.8 mm and a pitch of 1.2.
A 7 mm element bonding pad was formed. A Ni thin film layer having a thickness of 0.1 μm is formed on the pad by electroless plating,
The lead portion of another 460-pin-alumina package was bonded in nitrogen at 230 ° C. with Sn—Pb based solder. The package was not peeled off even if it was pulled by 10 kgf in the vertical and 45 ° directions. However, when 10 kgf was pulled in the 45 ° direction, 23 leads were peeled from the substrate side. In addition, the process time required for joining has become as long as 1 hour and 30 minutes.

(Comparative Example 2) Example 2 without cavity
After polishing the surface of the same multi-layer wiring glass-ceramic substrate as described above, a Ti / Mo thin film layer of 0.1 μm and 1.5
After forming by sputtering to a thickness of μm, patterning is performed by photolithography, and wet etching is performed to obtain a substrate surface diameter of 1.7 mm and a pitch of 2.
A 54 mm element bond pad was formed. Ni on the pad
A thin film layer having a thickness of 0.1 μm was formed by electroless plating, and I / O pins made of Kovar were joined at 780 ° C. in nitrogen by an Ag—Cu eutectic brazing material. The joint strength of the I / O pin is 8.8kgf in the vertical direction and 4.2k in the 45 ° C direction.
Although gf was a practical value, the strength was low as compared with the present invention. In addition, the process time required for joining was as long as 1 hour and 40 minutes.

Comparative Example 3 Example 3 without cavity
After polishing the surface of the same multi-layer wiring glass-ceramic substrate as above, the Cr / Pd thin film layers were 0.1 μm and 0.6 μm respectively
After forming by sputtering to a thickness of m, patterning is performed by photolithography, and wet etching is performed to obtain a substrate surface diameter of 1.3 mm and a pitch of 2.5.
A 4 mm element bonding pad was formed. Further, Kovar input / output pins plated with Au by Au—Sn solder were joined at 320 ° C. in nitrogen. The joint strength of the I / O pin is 4.3kgf in the vertical direction and 1.7kg in the 45 ° direction.
The value was as low as f. Also, the process time required for joining is
It has become 1 hour and 40 minutes long.

[0018]

As described above, according to the present invention,
It is possible to obtain a bonded body of a low-temperature sintered substrate such as a high-strength glass ceramic substrate and an input / output pin or kovar made of a metal or an alloy. Further, since the process time for forming the element bonding pad can be shortened, the cost can be reduced.

The bonding structure for a semiconductor mounting substrate according to the present invention is an L substrate for an insulating substrate, a multilayer wiring substrate, a semiconductor package or the like.
It is useful as a junction structure of a semiconductor device on which SI is mounted, and its industrial value is extremely high.

[Brief description of drawings]

FIG. 1 is a view showing a structure of a bonding pad of the present invention.

FIG. 2 is a diagram showing a bonding structure between a substrate and a package lead of the present invention.

FIG. 3 is a diagram showing a bonding structure of input / output pins to a substrate of the present invention.

FIG. 4 is a diagram showing a method of manufacturing a bonding pad according to the present invention.

FIG. 5 is a diagram showing a structure of a conventional bonding pad.

[Explanation of symbols]

 1 Semiconductor Mounting Substrate 2 Cavity 3 Thin Film Metallization 4 Solder or Brazing Material 5 Package Lead 6 Kovar Pin 7 Glass Ceramic Substrate

Claims (2)

[Claims] 1. A joint structure of a low temperature sintered substrate and an input / output pin or lead, wherein the input / output pin and lead are made of a metal or an alloy, and the low temperature sintered substrate has a thin film metallized on a side surface and a bottom surface. An element bonding structure for a semiconductor mounting substrate, which has an independent cavity, and the thin film metallization and the input / output pins or leads are connected by solder or brazing material. 2. A step of forming a thin film layer on the entire surface including the inside of the cavity of a ceramic substrate provided with a cavity, and a step of removing the thin film layer except the inside of the cavity by polishing the surface of the substrate. And a step of joining the input / output pins or leads with solder or a brazing material using the thin film layer in the cavity as metallization.