JPH08195648A - Tuning amplifier - Google Patents

Abstract

PURPOSE: To provide a tuning amplifier which is optionally adjustable without mutual interference between the tuning frequency and maximum attenuation quantity. CONSTITUTION: This tuning amplifier includes two phase shifting circuits 10 and 30 consisting of operational amplifiers 12 and 32 which input input signals at their inverted input terminal through resistances 18 and 38, series circuits of capacitors 14 and 34 and variable resistances 16 and 36 across which the voltages of the input signals are applied on the both ends, and resistances 20 and 40 which feed the outputs of the operational amplifies 12 and 32 back to the inverted input terminals, and an adding circuit which adds the signal outputted from the rear-stage phase shifting circuit 30 and the input signal inputted to an input terminal 90 at a specific ratio through a feedback resistance 70 and an input resistance 74. The tuning frequency is adjusted by varying the time constants of the series circuits, and the maximum attenuation quantity is adjusted by varying the resistance ratio of the input resistance 74 and feedback resistance 70.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tuning amplifier which can be easily integrated, and more particularly to a tuning amplifier which can arbitrarily adjust the tuning frequency and the maximum attenuation without interfering with each other.

[0002]

2. Description of the Related Art Conventionally, various types of amplifier circuits using active elements and reactance elements have been proposed and put into practical use as tuning amplifiers.

[0003]

In the conventional tuning amplifier, when the tuning frequency is adjusted, the Q and gain depending on the LC circuit are changed, and when the maximum attenuation is adjusted, the tuning frequency is changed. As shown by the characteristic curves A and B of No. 22, since the gain at the tuning frequency changes when the maximum attenuation amount is adjusted, the tuning frequency, the gain at the tuning frequency, and the maximum attenuation amounts C1 and C2 are adjusted without interfering with each other. It was extremely difficult.

Further, it has been difficult to form a tuning amplifier capable of adjusting the tuning frequency and the maximum attenuation amount by an integrated circuit.

Therefore, the present invention was devised to solve such a problem.

[0006]

In order to solve the above-mentioned problems, the tuning amplifier of the present invention has an input side impedance element to which an AC signal input to an input terminal is input at one end and a feedback signal to one side. An adder circuit including a feedback-side impedance element that is input to an end, and an addition circuit that adds the AC signal input to the input terminal and the feedback signal, and one end of the first resistor is connected to the inverting input terminal. Differential input amplifier, a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, and a third resistor and a capacitor connected to the other end of the first resistor. And a series circuit formed by connecting the third resistor and the capacitor to a non-inverting input terminal of the differential input amplifier. Connect in cascade When the signal added by the adder circuit is input to the preceding phase shift circuit of the two phase shift circuits connected in cascade, the signal output from the subsequent phase shift circuit is used as the feedback signal. Is input to one end of the impedance element on the feedback side, and the output of either of these two phase shift circuits is taken out as a tuning signal.

The tuning amplifier of the present invention includes an input-side impedance element to which an AC signal input to the input terminal is input at one end, and a feedback-side impedance element to which a feedback signal is input at one end. Of the differential input amplifier, an adder circuit for adding the AC signal input to the input terminal and the feedback signal, a differential input amplifier having one end of the first resistor connected to the inverting input terminal, and A second resistor connected between the inverting input terminal and the output terminal;
A series circuit including a third resistance and a capacitor connected to the other end of the resistance of the third resistance and the capacitor, and connecting the third resistance and the capacitor to a non-inverting input terminal of the differential input amplifier. A phase shift circuit and a non-inverting circuit that outputs the input AC signal without changing the phase of the AC signal. The two phase shifting circuits and the non-inverting circuit are respectively cascade-connected, and a plurality of the cascade-connected circuits are connected. In addition to inputting the signal added by the adding circuit to the first-stage circuit of the circuit, the signal output from the last-stage circuit is input to the one end of the feedback-side impedance element as the feedback signal. However, the output of any one of the plurality of circuits is taken out as a tuning signal.

The tuning amplifier according to the present invention further comprises a first differential input amplifier, a series circuit including a resistor and a capacitor to which an input AC signal is applied, and a signal generated in the capacitor, which is the first circuit. A circuit for inputting to the non-inverting input terminal of the differential input amplifier, an input resistance connected to the inverting input terminal of the first differential input amplifier, to which an input signal is applied, and an output of the first differential input amplifier. A first phase shift circuit having a feedback resistor connected between a terminal and an inverting input terminal, a second differential input amplifier, a capacitor to which an output signal of the first phase shift circuit is applied, and A series circuit including a resistor, a circuit for inputting a signal generated in the resistor to a non-inverting input terminal of the second differential input amplifier, and a circuit connected to the inverting input terminal of the second differential input amplifier, Of the first phase shift circuit An input resistance to which a force signal is applied and a feedback resistance connected between the output terminal and the inverting input terminal of the second differential input amplifier, and in a direction opposite to the first phase shift circuit. A second phase shift circuit for shifting the phase;
A feedback resistor for returning the output of the phase shift circuit to the input of the first phase shift circuit, and an input resistor for inputting an AC signal to be amplified to the first phase shift circuit. .

In the tuning amplifier of the present invention, an operational amplifier, a time constant circuit including a resistor and a capacitor to which an input AC signal is applied, and a signal generated in the capacitor are input to a non-inverting input terminal of the operational amplifier. Circuit,
The input resistance is connected to the inverting input terminal of the operational amplifier and has an input resistance to which an input signal is applied and a feedback resistance connected between the output terminal and the inverting input terminal of the operational amplifier. The two-stage phase shift circuit that shifts the phase in the opposite direction, the input-side impedance element that inputs an AC signal to the front-stage phase shift circuit, and the output of the latter-stage phase-shift circuit through the feedback-side impedance element And a circuit that feeds back to the input of the phase circuit.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A tuning amplifier according to an embodiment of the present invention will be specifically described below with reference to the drawings.

The tuning amplifier of this embodiment is characterized by a phase shift circuit in the preceding stage that shifts the phase of an AC signal input via an input side impedance element (for example, input resistance),
The output of the latter phase shift circuit that shifts the phase of the AC signal so that the phase relationship between the input and output voltages is opposite to that of the former phase shift circuit and the output of the latter phase shift circuit are input to the former phase shift circuit. Feedback impedance element for feedback (eg feedback resistance)
And the gain of the entire system is set to about 1, and the tuning amplification operation is performed at the frequency at which the total sum of the phase differences of the closed circuit becomes 0 °.

FIG. 1 is a circuit diagram showing a configuration of a tuning amplifier of an embodiment to which the present invention is applied. The tuning amplifier 1 shown in the figure has two phase shift circuits 10 and 30, each of which performs a phase shift of 0 ° in total at a predetermined frequency by shifting a phase of an input signal by a predetermined amount, a feedback resistor 70 and an input. A signal (feedback signal) output from the phase shift circuit 30 in the subsequent stage through each of the resistors 74 (the input resistor 74 has a resistance value n times the resistance value of the feedback resistor 70). It is configured to include an adder circuit that adds a signal (input signal) input to the input terminal 90 at a predetermined ratio.

FIG. 2 shows the extracted structure of the phase shift circuit 10 at the preceding stage shown in FIG. The phase shift circuit 10 in the preceding stage shown in the figure is an operational amplifier (operational amplifier) 12 which is a kind of differential input amplifier, and a non-inverting input of the operational amplifier 12 by shifting a phase of a signal input to an input end 22 by a predetermined amount. Capacitor 14 and variable resistor 16 input to the terminal, and resistor 18 inserted between the input end 22 and the inverting input terminal of the operational amplifier 12.
And a resistor 20 inserted between the output terminal 24 of the operational amplifier 12 and the inverting input terminal.

In this specification, the operational amplifier 12 and the like are assumed to operate ideally, and a description will be added each time a deviation from the ideal is a problem when actually designing a circuit.

In the phase shift circuit 10 having such a structure, when a predetermined AC signal is input to the input end 22, the voltage VR1 appearing across the variable resistor 16 is applied to the non-inverting input terminal of the operational amplifier 12. To be done.

Since there is no potential difference between the two inputs (the inverting input terminal and the non-inverting input terminal) of the operational amplifier 12 shown in FIG. 2, the potential of the inverting input terminal of the operational amplifier 12, the capacitor 14 and the variable resistor 16 are different. Is equal to the potential at the connection point.
Therefore, the same voltage VC1 that appears across the capacitor 14 appears across the resistor 18.

Here, when the resistance values of the resistor 18 and the resistor 20 are equal, the same current flows through these two resistors 18 and 20, so that the voltage VC1 also appears across the resistor 20. Moreover,
The voltage VC1 appearing across each of these two resistors 18 and 20 has the same vector direction, and considering the inverting input terminal (voltage VR1) of the operational amplifier 12 as a reference, the voltage VC1 across the resistor 18 is Input voltage Ei is the vector addition
Then, the voltage VC1 of the resistor 20 is vector-subtracted to obtain the output voltage Eo.

FIG. 3 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit 10 and the voltage appearing at the capacitor or the like.

As shown in the figure, the voltage VR1 appearing across the variable resistor 16 and the voltage VC1 appearing across the capacitor 14 are 90 ° out of phase with each other, and the vector addition of these results in the input voltage. It becomes Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes,
Along the circumference of the semi-circle shown in FIG.
R1 and the voltage VC1 across the capacitor 14 change.

The output voltage Eo is obtained by subtracting the voltage VC1 from the voltage VR1 in a vector manner. Considering the voltage VR1 applied to the non-inverting input terminal as a reference, the input voltage Ei
The output voltage Eo differs from the output voltage Eo only in the direction in which the voltage VC1 is combined, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be expressed by an isosceles triangle having the input voltage Ei and the output voltage Eo as hypotenuses and the base being twice the voltage VC1, and the amplitude of the output signal is related to the frequency. It can be seen that the amplitude is the same as that of the input signal and the phase shift amount is represented by φ1 shown in FIG.

As is clear from FIG. 3, the voltage VR1
And the voltage VC1 intersect at a right angle on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VR1 changes from 90 ° to 0 ° as the frequency ω changes from 0 to ∞. The phase shift amount φ1 of the entire phase shift circuit 10 is twice that, and changes from 180 ° to 0 ° depending on the frequency.

Next, the relationship between the input and output voltages described above will be verified quantitatively.

When the input voltage Ei is applied to the input end 22, the current flowing through the resistors 18 and 20 from the input end 22 to the output end 24 is I, and the resistance values of the resistors 18 and 20 are equal to each other. Is r, the voltage across the resistors 18 and 20 is −
I · r.

By the way, as described above, since no potential difference should occur between the two inputs of the operational amplifier 12 shown in FIG. 2, the voltage VR1 across the variable resistor 16 applied to the non-inverting input terminal of the operational amplifier 12 and the output. Between the voltage Eo,

[Equation 1] There is a relationship.

In order to prevent a potential difference between the two inputs of the operational amplifier 12, the voltage VC1 across the capacitor 14 and the resistance
Since the value obtained by adding the voltage across both ends of 18 −I · r must be 0,

[Equation 2] Becomes From equation (1) and equation (2),

(Equation 3) Becomes

Since the sum of the voltages VR1 and VC1 across the variable resistor 16 and the capacitor 14 is the voltage Ei applied to the input end 22, the voltage Ei applied between these voltages is

[Equation 4] There is a relationship. From equation (3) and equation (4),

(Equation 5) Becomes Here, C is the capacitance of the capacitor 14, R is the resistance value of the variable resistor 16, and the time constant of the CR circuit is T (= C
R).

Substituting s = jω in the equation (5) and transforming it,

(Equation 6) Becomes When the absolute value of the output voltage Eo is calculated from the equation (6),

(Equation 7) Becomes That is, the equation (7) is the phase shift circuit 10 of this embodiment.
Indicates that no matter how the phase between input and output rotates, the amplitude of the output signal is equal to the amplitude of the input signal and is constant.

Further, from the equation (6), the input voltage E of the output voltage Eo is
When the phase shift amount φ1 for i is calculated,

(Equation 8) Becomes From this equation (8), for example, ω is approximately 1 / T (= 1
The phase shift amount φ1 at a frequency such that / (CR)) is approximately 90 °, and only the phase can be shifted by approximately 90 ° without attenuating the amplitude of the input signal. Moreover, by changing the resistance value R of the variable resistor 16, the frequency ω at which the phase shift amount φ1 becomes approximately 90 ° can be changed.

FIG. 4 shows the extracted structure of the phase shift circuit 30 at the latter stage shown in FIG. The subsequent phase shift circuit 30 shown in the figure is an operational amplifier which is a kind of differential input amplifier.
32, the variable resistor 36 and the capacitor 34 that shift the phase of the signal input to the input terminal 42 by a predetermined amount and input to the non-inverting input terminal of the operational amplifier 32, and between the input terminal 42 and the inverting input terminal of the operational amplifier 32. Resistor 38 and the operational amplifier
A resistor 40 inserted between the output 44 of 32 and the inverting input
It is comprised including.

In the phase shift circuit 30 having such a configuration, when a predetermined AC signal is input to the input end 42, the voltage VC2 appearing across the capacitor 34 is applied to the non-inverting input terminal of the operational amplifier 32. It

Further, since there is no potential difference between the two inputs (the inverting input terminal and the non-inverting input terminal) of the operational amplifier 32 shown in FIG. 4, the potential of the inverting input terminal of the operational amplifier 32, the variable resistor 36 and the capacitor 34. Is equal to the potential at the connection point.
Therefore, the same voltage VR2 that appears across the variable resistor 36 appears across the resistor 38.

Here, when the resistance values of the resistor 38 and the resistor 40 are the same, the same current flows through these two resistors 38 and 40, so that the voltage VR2 also appears across the resistor 40. Moreover,
The voltages VR2 appearing at both ends of these two resistors 38 and 40 are oriented in the same vector direction, and considering the inverting input terminal (voltage VC2) of the operational amplifier 32 as a reference, the voltage VR2 at both ends of the resistor 38 becomes a vector. Input voltage Ei
Then, the output voltage Eo is obtained by vector-wise subtracting the voltage R2 across the resistor 40.

FIG. 5 is a vector diagram showing the relationship between the input / output voltage of the subsequent phase shift circuit 30 and the voltage appearing at the capacitor or the like.

As shown in the figure, the voltage VC2 appearing across the capacitor 34 and the voltage VR2 appearing across the variable resistor 36 are 90 ° out of phase with each other, and the vector addition of these results in the input voltage. It becomes Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes,
The voltage VC2 across the capacitor 34 and the voltage VR2 across the variable resistor 36 change along the circumference of the semicircle shown in FIG.

Further, as described above, the voltage VC2 to the voltage V
The output voltage Eo is obtained by subtracting R2 in vector.
Considering the voltage VC2 applied to the non-inverting input terminal as a reference, the input voltage Ei and the output voltage Eo are different only in the direction in which the voltage VR2 is combined, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be expressed by an isosceles triangle having the hypotenuses of the input voltage Ei and the output voltage Eo and the bottom of twice the voltage VR2, and the amplitude of the output signal is related to the frequency. Not the same as the amplitude of the input signal,
It can be seen that the phase shift amount is represented by φ2 shown in FIG.

As is clear from FIG. 5, the voltage VC2
And the voltage VR2 intersect at a right angle on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VC2 changes from 0 ° to 90 ° as the frequency ω changes from 0 to ∞. The shift amount φ2 of the entire phase shift circuit 30 is twice that, and changes from 0 ° to 180 ° depending on the frequency.

Next, the relationship between the input and output voltages described above will be verified quantitatively.

As in the case of the phase shift circuit 10 in the previous stage, the voltage E
When i is applied to the input end 42, the current flowing from the input end 42 to the output end 44 through the resistors 38 and 40 is I, and the resistance values of the resistance 38 and the resistance 40 are equal, and r is Resistance 3
The voltage across each of 8 and 40 is -Ir.

Since no potential difference should occur between the two inputs of the operational amplifier 32 shown in FIG. 4, the voltage VC2 between both ends of the capacitor 34 applied to the non-inverting input terminal of the operational amplifier 32 and the output voltage Eo. ,

[Equation 9] There is a relationship.

Further, in order to prevent a potential difference between the two inputs of the operational amplifier 32, the voltage VR2 across the variable resistor 36 and the resistor 38 are required.
Since the value obtained by adding the voltage −I · r across both ends of must be 0,

[Equation 10] Becomes From equations (9) and (10),

[Equation 11] Becomes

Further, the sum of the voltages VC2 and VR2 across the capacitor 34 and the variable resistor 36 is the voltage Ei applied to the input terminal 42, so that between these voltages,

(Equation 12) There is a relationship. From equation (11) and equation (12),

(Equation 13) Becomes Here, C represents the capacitance of the capacitor 34, and R represents the resistance value of the variable resistor 36, and the time constant of the CR circuit is T (= CR) as in the case of the phase shift circuit 10 in the previous stage.

Substituting s = jω in the equation (13) and transforming it,

[Equation 14] Becomes

The equations (13) and (14) are different from the equations (5) and (6) shown in the phase shift circuit 10 at the preceding stage only in the sign. Therefore, as for the absolute value of the output voltage Eo, the expression (7) can be applied as it is, and the amplitude of the output signal of the phase shift circuit 30 in the subsequent stage is the same as the input signal, no matter how the phase between the input and the output rotates. It can be seen that the amplitude is equal to and constant.

Further, when the phase shift amount φ2 of the output voltage Eo with respect to the input voltage Ei is calculated from the equation (14),

(Equation 15) Becomes From this equation (15), for example, ω is approximately 1 / T (= 1
The phase shift amount φ2 at a frequency such that / (CR)) is approximately 90 °, and only the phase can be shifted by approximately 90 ° without attenuating the amplitude of the input signal. Moreover, by changing the resistance value R of the variable resistor 36, the frequency ω at which the phase shift amount φ2 becomes approximately 90 ° can be changed.

In this way, the phase is shifted by a predetermined amount in each of the two phase shift circuits 10 and 30. Moreover,
As shown in FIGS. 3 and 5, the relative phase relationships of the input and output voltages in the phase shift circuits 10 and 30 are in opposite directions,
A signal having a phase shift amount of 0 ° is output by the entire two phase shift circuits 10 and 30 at a predetermined frequency.

The output of the phase shift circuit 30 in the subsequent stage is fed back to the input side of the phase shift circuit 10 in the preceding stage via the feedback resistor 70, and this fed back signal and the input resistor 74 are input. Signal is added, and the added voltage is added to the phase shift circuit 10
Input terminal (the input terminal 22 shown in FIG. 2) is applied.

FIG. 6 is a system diagram in which the entire two phase shift circuits 10 and 30 having the above-mentioned configuration are replaced with a circuit having a transfer function K1, and a resistor R0 is provided in parallel with the circuit having the transfer function K1. Feedback resistor 70 is connected in series with feedback resistor 70
An input resistor 74 having a resistance value (nR0) which is n times the resistance value of n is connected. FIG. 7 is a system diagram in which the system shown in FIG. 6 is converted by the Miller's theorem, and the transfer function A of the entire system after conversion is

[Equation 16] Can be represented by

By the way, as is apparent from the equation (5), the transfer function K2 of the phase shift circuit 10 at the preceding stage is

[Equation 17] As is clear from the equation (13), the phase shift circuit 30
The transfer function K3 of

(Equation 18) Is. Therefore, when the phase shift circuits 10 and 30 are cascade-connected in two stages, the overall transfer function K1 is

[Formula 19] Becomes Substituting this equation (19) into the above equation (16),

(Equation 20) Becomes

According to the equation (20), it is understood that when ω = 0 (DC region), A = −1 / (2n + 1), and the maximum attenuation is given. It can also be seen that the maximum attenuation is given when ω = ∞. Furthermore, at the tuning point of ω = 1 / T, A = 1 and feedback resistor 70 and input resistor
It can be seen that it has nothing to do with the resistance ratio n of 74. In other words, as shown in FIG. 8, even if the value of n is changed, the tuning point does not shift and the attenuation amount of the tuning point does not change.

Since the actual operational amplifiers 12 and 32 deviate from the ideal values, the signal amplitude is slightly attenuated even if the resistors 12 and 20 or the resistors 38 and 40 are set to the same resistance value. Therefore, in order to set the gain of the entire closed loop to approximately 1, it is necessary to make the resistance value of the resistor 20 slightly larger than the resistance value of the resistor 18 or the resistance value of the resistor 40 slightly larger than the resistance value of the resistor 38. is there.

As described above, according to the tuning amplifier 1 of this embodiment, the tuning frequency and the gain at the time of tuning are constant even if the resistance ratio n of the feedback resistor 70 and the input resistor 74 is changed, and only the maximum attenuation amount is obtained. Can be changed. On the contrary, since the maximum attenuation amount is determined by the resistance ratio n described above, even if the tuning frequency is changed by changing the resistance value of the variable resistor 16 or 36 in each phase shift circuit 10, 30, The maximum attenuation amount is not affected, and the tuning frequency, the gain at the tuning frequency, and the maximum attenuation amount can be adjusted without interfering with each other.

Further, the tuning amplifier 1 of the first embodiment is constituted by combining an operational amplifier, a capacitor or a resistor, and since any constituent element can be formed on a semiconductor substrate, the tuning frequency and the maximum attenuation amount can be reduced. It is also easy to form the entire adjustable tuning amplifier 1 on a semiconductor substrate to form an integrated circuit.

The tuning amplifier 1 of the first embodiment described above is used.
In FIG. 9, the phase shift circuit 10 is arranged in the front stage, and the phase shift circuit 30 is arranged in the rear stage. , These front and rear are replaced and the phase shift circuit 30
, The phase-shift circuit 10 is arranged in the subsequent stage, and the tuning amplifier 1
You may make it comprise a.

Also, the tuning amplifier 1 of the first embodiment described above.
And 1a, the phase shift amount becomes 0 ° by the whole of the two phase shift circuits 10 and 30 to perform a predetermined tuning operation, and even if a non-inverting circuit that does not shift the phase is added. Good.

FIG. 10 is a diagram showing a configuration of a tuning amplifier 1b in which a non-inverting circuit 50 is added to the tuning amplifier 1 shown in FIG. The non-inverting circuit 50 includes an operational amplifier 52 having an inverting input terminal grounded via a resistor 54 and a resistor 56 connected between the inverting input terminal and the output terminal. It functions as a buffer having a predetermined amplification degree determined by the resistance ratio of the resistors 54 and 56. The non-inverting circuit 50 having such a configuration outputs without changing the phase of the input signal, and it is easy to set the loop gain to almost 1 by adjusting the amplification degree. Two phase shift circuits by adjusting the gain 1
A predetermined tuning operation is performed at a frequency at which the phase shift amount of 0 and 30 is 0 °.

By the way, the tuning amplifier of this embodiment described above is composed of two phase shift circuits or two phase shift circuits and a non-inverting circuit, and two or three connected phase shift circuits.
A predetermined tuning operation is performed by setting the total amount of phase shift to 0 ° at a predetermined frequency by the whole of one circuit. Therefore, focusing only on the amount of phase shift, there is a certain degree of freedom in which order the two or three circuits are connected, and the connection order can be determined as necessary.

11 and 12 show two phase shift circuits 1
FIG. 6 is a diagram showing a connection state between 0 and 30 and a non-inverting circuit 50. In these figures, the feedback impedance element 70
The a and the input side impedance element 74a are for adding the output signal of each tuning amplifier and the input signal at a predetermined ratio, and most commonly, as shown in FIG. 1 and the like, the feedback side impedance element 70a. The feedback resistor 70 is used as, and the input resistor 74 is used as the input-side impedance element 74a.

However, the feedback impedance element 70a and the input impedance element 74a need only be added without changing the phase relationship of the signals input to the respective elements. Therefore, the feedback impedance element 70a and the input impedance element 74a. May be formed by capacitors, or both the feedback impedance element 70a and the input impedance element 74a may be formed by inductors. Alternatively, each impedance element may be formed by combining resistors, capacitors, or inductors so that the ratio of the real number and the imaginary number of impedance can be adjusted at the same time.

FIG. 11A shows a configuration in which the non-inverting circuit 50 is arranged at the stage subsequent to the two phase shift circuits 10 and 30.
It corresponds to the tuning amplifier 1b shown in FIG. FIG. 11 (B)
1 shows a configuration in which a non-inverting circuit 50 is arranged at the subsequent stage of the two phase shift circuits 30 and 10. As described above, when the non-inverting circuit 50 is arranged in the subsequent stage, a large output current can be taken out by giving the non-inverting circuit 50 a function of an output buffer.

The configuration in which the non-inverting circuit 50 is arranged in the middle of the two phase shift circuits 10 and 30 in FIG. 11C is shown in FIG. 11D.
A configuration in which a non-inverting circuit 50 is arranged between the two phase shift circuits 30 and 10 is shown. In this way, when the non-inverting circuit 50 is arranged in the middle, the phase shift circuit 10 or
Mutual interference between 30 and the phase shift circuit 30 or 10 in the subsequent stage can be completely prevented.

In FIG. 12A, the non-inverting circuit 50 is arranged in front of the two phase shift circuits 10 and 30, but in FIG.
A configuration in which a non-inverting circuit 50 is arranged in front of the two phase shift circuits 30 and 10 is shown. In this way, when the non-inverting circuit 50 is arranged in the previous stage, the phase shift circuit 10 or
The influence of the feedback impedance element 70a and the input impedance element 74a on 30 can be minimized.

Further, the phase shift circuits 10 and 30 shown in the above-described embodiments include the variable resistors 16 and 36.
These variable resistors 16 and 36 can be specifically realized by using a junction type or MOS type FET.

FIG. 13 is a diagram showing the structure of the phase shift circuit in the case where the variable resistor 16 or 36 in the two types of phase shift circuits shown in the respective embodiments is replaced with an FET.

FIG. 9A shows a structure in which the variable resistor 16 is replaced with an FET in the one phase shift circuit 10 shown in FIG. 1 and the like. FIG. 2B shows a configuration in which the variable resistor 36 in the other phase shift circuit 30 shown in FIG.

As described above, the channel formed between the source and drain of the FET is used as a resistor to change the resistance of the variable resistor.
When used in place of 16 or 36, the gate voltage can be variably controlled to arbitrarily change the channel resistance within a certain range to change the amount of phase shift in each phase shift circuit. Therefore, it is possible to change the frequency of the signal in which the amount of phase shift of the signal that makes one round in each tuning amplifier becomes 0 °, and it is possible to arbitrarily change the tuning frequency of the tuning amplifier of each embodiment.

In each phase shift circuit shown in FIG. 13, the variable resistance is composed of one FET, that is, a p-channel or n-channel FET.
Alternatively, T and n-channel FETs may be connected in parallel to form one variable resistor, and gate voltages of equal magnitude but different polarities may be applied between the gate and substrate of each FET. When changing the resistance value, the magnitude of the gate voltage may be changed. As described above, by combining the two FETs to form the variable resistance, the non-linear region of the FET can be improved, and thus the distortion of the tuning signal can be reduced.

Further, the phase shift circuit 10 or 30 shown in each of the above-described embodiments changes the resistance value of the variable resistor 16 or 36 connected in series with the capacitors 14 and 34 to change the phase shift amount. Although the whole tuning frequency is changed by means of, the capacitors 14 and 34 may be formed by variable capacitance elements, and the whole tuning frequency may be changed by changing the capacitance thereof.

FIG. 14 is a diagram showing the structure of the phase shift circuit in the case where the capacitor 14 or 34 in the two types of phase shift circuits shown in each embodiment is replaced with a variable capacitance diode.

FIG. 9A shows a configuration in which the variable resistor 16 is replaced with a fixed resistor and the capacitor 14 is replaced with a variable capacitance diode in the one phase shift circuit 10 shown in FIG. 1 and the like. FIG. 2B shows a configuration in which the variable resistor 36 is replaced with a fixed resistor and the capacitor 34 is replaced with a variable capacitance diode in the other phase shift circuit 30 shown in FIG. 1 and the like.

In FIGS. 14A and 14B, the capacitor connected in series to the variable capacitance diode changes its DC current when a reverse bias voltage is applied between the anode and cathode of the variable capacitance diode. The impedance is extremely small at the operating frequency, that is, it has a large capacitance. In addition, since the potentials at both ends of the capacitor shown in FIGS. 14A and 14B are constant when the DC component is seen, by applying a reverse bias voltage larger than the amplitude of the AC component between the anode and the cathode, Each variable capacitance diode can function as a variable capacitance capacitor.

As described above, the capacitor 14 or 34 is composed of a variable capacitance diode, and the magnitude of the reverse bias voltage applied between the anode and the cathode is variably controlled so that the capacitance of the variable capacitance diode falls within a certain range. The amount of phase shift in each phase shift circuit can be changed by changing the value arbitrarily. Therefore, in each tuning amplifier, the frequency of the signal in which the amount of phase shift of the signal that makes one round becomes 0 ° can be changed, and the tuning frequency of the tuning amplifier can be arbitrarily changed.

By the way, although the variable capacitance diode is used as the variable capacitance element in FIGS. 14A and 14B described above, the FET in which the source and the drain are connected to a fixed potential in a direct current manner and the variable voltage is applied to the gate is used. May be used. As described above, the potentials at both ends of the variable capacitance diodes shown in FIGS. 14A and 14B are fixed in terms of direct current.
It is only necessary to replace it with T, and the gate capacitance, that is, the electrostatic capacitance of the FET can be changed by changing the voltage applied to the gate.

Further, although only the capacitance of the variable capacitance diode is changed in FIGS. 14A and 14B described above, the resistance value of the variable resistor 16 or 36 may be changed at the same time. FIG. 14C shows one phase shift circuit 10 shown in FIG.
2 shows a configuration in which the variable resistor 16 is used and the capacitor 14 is replaced with a variable capacitance diode.
FIG. 3D shows a configuration in which the variable resistor 36 is used and the capacitor 34 is replaced with a variable capacitance diode in the other phase shift circuit 30 shown in FIG. 1 and the like. In these, a variable capacitance diode is used as a gate capacitance variable FET
Of course, it may be replaced with.

Needless to say, the variable resistance shown in FIGS. 14C and 14D can be formed by utilizing the channel resistance of the FET as shown in FIG. In particular,
When a p-channel FET and an n-channel FET are connected in parallel to form one variable resistor and gate voltages of equal magnitude and different polarities are applied between the base and substrate of each FET, Since the nonlinear region can be improved, the distortion of the tuning signal can be reduced.

As described above, even when the variable resistance and the variable capacitance element are combined to form the phase shift circuit, the resistance value of the variable resistance and the electrostatic capacitance of the variable capacitance element can be arbitrarily changed within a certain range. The amount of phase shift in each phase shift circuit can be changed. Therefore, in each tuning amplifier, the frequency of the signal in which the amount of phase shift of the signal that makes one round becomes 0 ° can be changed, and the tuning frequency of the tuning amplifier can be arbitrarily changed.

In addition to the case where the variable resistance or the variable capacitance element is used as described above, a plurality of resistors or capacitors having different element constants are prepared and the switch is switched to select from among the plurality of elements. One or more may be selected. In this case, the element constants can be discontinuously switched by the number of elements to be connected and the connection method (serial connection, parallel connection, or a combination thereof) by switching the switches. For example, instead of a variable resistor, a plurality of 2 n-th series resistors whose resistance values are R, 2R, 4R, ...
By selecting one or an arbitrary plurality and connecting them in series, it is possible to easily realize switching of resistance values at equal intervals with a smaller number of elements. Similarly, instead of the capacitors, prepare a plurality of 2 n-th series capacitors having capacitances of C, 2C, 4C, ... And select one or an arbitrary plurality of capacitors for parallel connection. Thus, it is possible to easily realize the switching of the electrostatic capacitances at equal intervals with a smaller number of elements. Therefore, the tuning amplifier of this embodiment is applied to a circuit having a plurality of tuning frequencies, for example, an AM radio, and is suitable for the purpose of selecting and receiving one station from a plurality of broadcasting stations.

When the tuning amplifier 1 of each of the above-mentioned embodiments is formed on a semiconductor substrate, it is practically a capacitor.
It is not possible to set a large capacitance as 14 or 34. Therefore, if the small capacitance of the capacitor actually formed on the semiconductor substrate can be apparently increased by devising the circuit, the time constant T can be set to a large value to reduce the tuning frequency. It is convenient for.

FIG. 15 shows the phase shift circuits 10 and 30 shown in FIG.
FIG. 11 is a diagram showing a modified example in which the capacitor 14 or 34 used for is composed of a circuit instead of a single element, and functions as a capacitance conversion circuit that makes the capacitance of the capacitor actually formed on the semiconductor substrate look large. To do. In addition,
The entire circuit shown in FIG. 15 corresponds to the capacitor 14 or 34 included in the phase shift circuit 10 or 30.

The capacitance conversion circuit 14a shown in FIG. 15 includes a capacitor 210 having a predetermined capacitance C0, two operational amplifiers 212 and 214, and four resistors 216, 218, 220 and 222. Has been done.

In the first-stage operational amplifier 212, a resistor 218 (whose resistance value is R18) is connected between the output terminal and the inverting input terminal, and the inverting input terminal is a resistor.
It is grounded through 216 (this resistance is R16).

Between the voltage E1 applied to the non-inverting input terminal of the first stage operational amplifier 212 and the voltage E2 appearing at the output terminal,

[Equation 21] There is a relationship. The first-stage operational amplifier 212 mainly functions as a buffer that performs impedance conversion, and the gain may be 1. R18 when the gain is 1
When / R16 = 0, that is, R16 is set to infinity (removing the resistor 216), or R18 is set to 0Ω (direct connection).

Further, the operational amplifier 214 of the second stage has a resistor 222 (this resistance value is R22 between the output terminal and the inverting input terminal).
And a resistor 220 (whose resistance value is R20) is connected between the inverting input terminal and the output terminal of the operational amplifier 212 described above, and the non-inverting input terminal is grounded. There is.

When the voltage appearing at the output terminal of the second-stage operational amplifier 214 is E3, the voltage E3 appears between this voltage E3 and the voltage E2 appearing at the output terminal of the first-stage operational amplifier 212.

[Equation 22] There is a relationship. In this way, the second-stage operational amplifier 214 functions as an inverting amplifier, and the first-stage operational amplifier 212 is set in order to set its input side to high impedance.
Is used.

Further, the non-inverting input terminal of the first-stage operational amplifier 212 and the second-stage operational amplifier 2 which are connected in this manner are connected.
As described above, the capacitor 210 having a predetermined electrostatic capacity is connected between the 14 output terminals.

In the capacitance conversion circuit 14a shown in FIG. 15, when the transfer function of the entire circuit except the capacitor 210 is K4, the capacitance conversion circuit 14a can be represented by the system diagram shown in FIG. FIG. 17 is a system diagram in which this is converted by the Miller's theorem.

When the impedance Z0 shown in FIG. 16 is used to represent the impedance Z1 shown in FIG.

(Equation 23) Becomes Here, the capacitance conversion circuit 14a shown in FIG.
In the case of, the impedance Z0 = 1 / (jωC0), and by substituting this into the equation (23),

[Equation 24]

(Equation 25) Becomes In this equation (25), the capacitance C0 of the capacitor 210 in the capacitance conversion circuit 14a is apparently (1-
K4) shows that it has doubled.

Therefore, when the gain of the amplifier is negative, K4 is always larger than 1, so that the capacitance C0 can be changed to the larger one.

By the way, the gain of the amplifier in the capacitance conversion circuit 14a shown in FIG.
The gain K4 of the amplifier constituted by 214 as a whole is calculated from the equations (21) and (22).

(Equation 26) Becomes Substituting this equation (26) into equation (25),

[Equation 27] Becomes Therefore, by setting the resistance value of the four resistors 216, 218, 220, 222 to a predetermined value, the two terminals 22
The apparent capacitance C between 4 and 226 can be increased.

When the gain of the amplifier by the first stage operational amplifier 212 is 1, that is, when R16 is infinite (resistor 216 is removed) or R18 is set to 0Ω as described above, R18 / R16 If = 0, then (2
Equation (7) is simplified to

[Equation 28] Becomes

FIG. 18 is a diagram showing the configuration of the capacitance conversion circuit 14b in which the resistor 216 connected to the inverting input terminal of the first operational amplifier 212 shown in FIG. 15 is removed. In this case, since the electrostatic capacitance C appearing between the terminals 224 and 226 is expressed by the equation (28), it is possible to change it from C0 to the larger one simply by changing the ratio of R22 and R20.

As described above, the capacitance conversion circuit 14 described above
a or 14b is the resistance ratio R22 / R between the resistance 220 and the resistance 222.
20 or by changing the resistance ratio R18 / R16 of the resistor 216 and the resistor 218, the electrostatic capacitance C0 of the capacitor 210 actually formed on the semiconductor substrate can be converted to an apparently larger one. Therefore, when the entire tuning amplifier 1 shown in FIG. 1 or the like is formed on a semiconductor substrate, a capacitor 210 having a small capacitance C0 is formed on the semiconductor substrate, and the capacitor 210 shown in FIG. The circuit shown in FIG. 18 can convert into a large capacitance C, which is convenient for integration. In particular, if a large capacitance can be secured in this way, the overall mounting area of the tuning amplifier 1 shown in FIG. 1 can be downsized, and the material cost can be reduced.

Further, at least one of the resistors 216, 218, 220, 222 (at least one of the resistors 220, 222 in the case of the capacitance conversion circuit 14b shown in FIG. 18) is formed by a variable resistor. Therefore, specifically, the junction type or MOS type F
By connecting the ET or p-channel FET and the n-channel FET in parallel to form a variable resistance, it is possible to easily form a capacitor having a variable capacitance.
Therefore, by using this capacitor instead of the variable capacitance diode shown in FIG. 14, the phase shift amount can be arbitrarily changed within a certain range. Therefore, it is possible to change the frequency at which the phase shift amount of the signal that makes one round in the tuning amplifier becomes 0 °, and it is possible to arbitrarily change the tuning frequency of the tuning amplifier described above.

Since the first stage operational amplifier 212 is used as a buffer for increasing the input impedance as described above, the operational amplifier 212 may be replaced with an emitter follower circuit or a source follower circuit.

FIG. 19 is a diagram showing the configuration of a capacitance conversion circuit 14c using an emitter follower circuit in the first stage. The capacitance conversion circuit 14c shown in the figure includes an emitter follower circuit 22 including a first-stage operational amplifier 212 and two resistors 216 and 218 shown in FIG.
It has a configuration replaced with 8.

FIG. 20 is a diagram showing the configuration of the capacitance conversion circuit 14d using the source follower circuit in the first stage. The capacitance conversion circuit 14d shown in the figure has a configuration in which the first-stage operational amplifier 212 and the two resistors 216 and 218 shown in FIG. 15 are replaced with a source follower circuit 230 including an FET and a resistor.

The capacitance conversion circuits 14c and 14d described above are also included.
Each of the resistors 22 connected to the operational amplifier 214
The point that the apparent capacitance C between the terminals 224 and 226 can be arbitrarily changed by changing the resistance ratio of 0 and 222 is the same as the capacitance conversion circuit 14a and the like shown in FIG. . Therefore, at least one of the resistors 220 and 222 is connected to a junction-type or MOS-type FET or p-channel FET and n-type.
A capacitance variable capacitor can be constructed by replacing the channel FET with a variable resistor connected in parallel. By using this capacitor instead of the variable capacitance diode shown in FIG. 14, the phase shift amount can be increased. Can be arbitrarily changed within a certain range. Therefore, in each tuning amplifier, the frequency at which the amount of phase shift of the signal that makes one round becomes 0 ° can be changed, and the tuning frequency can be arbitrarily changed.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the gist of the present invention.

For example, in each tuning amplifier shown in FIG. 1 etc., the feedback resistor 70 having a fixed resistance value is used as the feedback impedance element, and the input resistor 74 having a fixed resistance value is used as the input impedance element. However, at least one of the resistors may be a variable resistor so that the maximum attenuation amount can be changed arbitrarily. In this case, it goes without saying that the variable resistance can be formed by utilizing the channel resistance of the FET as shown in FIG. In particular, when a p-channel FET and an n-channel FET are connected in parallel to form one variable resistor and gate voltages of equal magnitude and different polarities are applied between the base and substrate of each FET, Since the non-linear region of the FET can be improved, the distortion of the tuning signal can be reduced.

Similarly, when the feedback impedance element and the input impedance element are capacitors, at least one of them is composed of a variable capacitance diode or a gate capacitance variable FET so that the maximum attenuation can be changed arbitrarily. Good.

Further, although the tuning amplifier 1 and the like of the above-described embodiment include two phase shift circuits, when the tuning frequency is variable, the CR circuits included in both phase shift circuits are configured. In addition to the case where the element constant of at least one of the resistor and the capacitor is changed, the case where the element constant of at least one of the resistor and the capacitor included in the CR circuit included in the one phase shift circuit is changed can be considered. In this case, it is easier to change the element constant of the element whose one end is grounded in either one of the phase shift circuits. Further, it is also possible to fix all element constants of all resistors and capacitors to form a tuning amplifier having a fixed tuning frequency.

When the tuning amplifier of the above-described embodiment is integrated on a semiconductor substrate, electrodes are formed with an insulating film such as a silicon oxide film sandwiched between them, or F as described above.
The gate capacitance of ET can be used to form a capacitor in the phase shift circuit.

Further, in the above-described embodiment, a circuit with high stability can be formed by forming the phase shift circuits 10 and 30 by using the operational amplifier. However, in the case of using as in this embodiment Since the offset voltage and the voltage gain are not required to be so high, a differential input amplifier having a predetermined amplification degree may be used instead of the operational amplifier in each phase shift circuit.

FIG. 21 is a circuit diagram in which a part necessary for the operation of the phase shift circuit of each embodiment is extracted from the configuration of the operational amplifier, and the whole operates as a differential input amplifier having a predetermined amplification degree. The differential input amplifier shown in the figure has a differential input stage 100 composed of FETs, a constant current circuit 102 for supplying a constant current to the differential input stage 100, and a predetermined bias voltage for the constant current circuit 102. Bias circuit 104 and differential input stage 100
And an output amplifier 106 connected to. As shown in the figure, the offset adjusting circuit and the like included in the actual operational amplifier can be omitted to simplify the configuration of the differential input amplifier. Since the upper limit of the operating frequency can be increased by simplifying the circuit in this way, the upper limit of the operating frequency of the tuning amplifier 1 and the like configured by using this differential input amplifier is correspondingly increased. You can

[0104]

As is clear from the description based on the above embodiments, each element constituting the tuning amplifier of the present invention can be formed by an integrated circuit manufacturing method.
The tuning amplifier can be miniaturized as an integrated circuit on a semiconductor wafer, and can be manufactured inexpensively by mass production.

In particular, the channel between the source and drain of the FET is used as the variable resistance of the CR circuit in each phase shift circuit, and the resistance of the channel is changed by changing the control voltage applied to the gate of this FET. Then, it is possible to avoid the influence of the inductance and the capacitance of the wiring to which the control voltage is applied, and it is possible to obtain a tuned amplifier having ideal characteristics almost as designed.

In the tuning amplifier of the present invention, the maximum attenuation is determined by the resistance ratio of the input impedance element and the feedback impedance element, and the tuning frequency is determined by the time constant of the CR circuit in each phase shift circuit. The attenuation amount, the tuning frequency, and the gain at the tuning frequency can be set without interfering with each other.

In the conventional tuning amplifier using LC resonance, the tuning frequency ω is 1 / √LC. Therefore, when the capacitance C or the inductance L is changed to adjust the tuning frequency, the tuning frequency changes. Although it changes in proportion to the square root of the amount of change, in the tuning amplifier of the present invention, the tuning frequency ω is, for example, 1 / (CR), and the tuning frequency is changed in proportion to the resistance value R or the capacitance C. Therefore, it is possible to make large changes and adjustments.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a tuning amplifier of an embodiment to which the present invention is applied,

FIG. 2 is a diagram showing an extracted configuration of a phase shift circuit in the preceding stage shown in FIG.

FIG. 3 is a vector diagram showing the relationship between the input / output voltage of the preceding phase shift circuit and the voltage appearing at a capacitor or the like;

FIG. 4 is a diagram showing an extracted configuration of a phase shift circuit at a subsequent stage shown in FIG.

FIG. 5 is a vector diagram showing the relationship between the input / output voltage of the subsequent phase circuit and the voltage appearing at a capacitor or the like;

FIG. 6 is a system diagram in which the entire two phase shift circuits are replaced with a circuit having a transfer function K1.

FIG. 7 is a system diagram obtained by converting the system shown in FIG. 6 by Miller's theorem,

FIG. 8 is a diagram showing a tuning characteristic of the tuning amplifier of this embodiment;

FIG. 9 is a diagram showing a modification of the tuning amplifier of this embodiment,

FIG. 10 is a diagram showing another modification of the tuning amplifier of this embodiment,

FIG. 11 is a diagram showing a connection form of a phase shift circuit and a non-inverting circuit;

FIG. 12 is a diagram showing a connection form of a phase shift circuit and a non-inverting circuit;

FIG. 13 is a diagram showing a configuration of a phase shift circuit in which a variable resistance of the phase shift circuit is replaced with an FET,

FIG. 14 is a diagram showing a configuration of a phase shift circuit in which a capacitor of the phase shift circuit is replaced with a variable capacitance diode;

FIG. 15 is a diagram showing a configuration of a capacitance conversion circuit that apparently increases the capacitance that a capacitor actually has;

16 is a diagram showing the circuit shown in FIG. 15 using a transfer function,

FIG. 17 is a diagram in which the configuration shown in FIG. 16 is converted by the Miller's theorem,

FIG. 18 is a diagram showing a configuration of a capacitance conversion circuit which is a simplified version of the circuit of FIG. 15;

FIG. 19 is a diagram showing a configuration of a capacitance conversion circuit using an emitter follower circuit in the first stage,

FIG. 20 is a diagram showing a configuration of a capacitance conversion circuit using a source follower circuit in the first stage,

FIG. 21 is a circuit diagram in which a part necessary for the operation of the phase shift circuit of the present invention is extracted from the configuration of the operational amplifier,

FIG. 22 is a characteristic curve diagram showing an example of the relationship between the tuning frequency, the gain at the tuning frequency, and the maximum attenuation amount in the conventional tuning amplifier.

[Explanation of symbols]

 1 Tuning amplifier 10, 30 Phase shift circuit 12, 32 Op-amp 14, 34 Capacitor 16, 36 Variable resistance 18, 20, 38, 40 Resistance 50 Non-inverting circuit 70 Feedback resistance 74 Input resistance 90 Input terminal 92 Output terminal

Claims (26)

[Claims] 1. An input-side impedance element to which an input signal is input to one end and a feedback-side impedance element to which a feedback signal is input to one end are included, and the input signal and the feedback signal are added. An adder circuit, a differential input amplifier having one end of the first resistor connected to the inverting input terminal, and a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, And a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, and connecting the third resistor and the capacitor to a non-inverting input terminal of the differential input amplifier. The two phase shift circuits are connected in cascade, and the two phase shift circuits are cascaded, and added by the adder circuit to the preceding phase shift circuit in the two cascaded phase shift circuits. When you input a signal Also, the signal output from the phase shift circuit in the subsequent stage is input to one end of the impedance element on the feedback side as the feedback signal, and the output of either of these two phase shift circuits is taken out as a tuning signal. Tuning amplifier. 2. An input-side impedance element to which an AC signal input to an input terminal is input to one end, and a feedback-side impedance element to which a feedback signal is input to one end, the input-side impedance element being input to the input terminal. An addition circuit for adding the AC signal and the feedback signal, a differential input amplifier having one end of the first resistor connected to the inverting input terminal, an inverting input terminal and an output terminal of the differential input amplifier, A second resistor connected between the first resistor and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, and a connecting portion of the third resistor and the capacitor. Two phase shift circuits connected to the non-inverting input terminals of the differential input amplifier, and a non-inverting circuit that outputs the input AC signal without changing the phase of the AC signal are provided. Each inversion circuit These are cascade-connected, and when the signal added by the adding circuit is input to the first-stage circuit among the plurality of cascade-connected circuits, the signal output from the last-stage circuit is fed back to the feedback circuit. A tuning amplifier which is inputted as a signal to one end of the impedance element on the feedback side and takes out an output of any one of these circuits as a tuning signal. 3. The tuning amplifier according to claim 1, wherein the third resistor and the capacitor forming the series circuit are connected in opposite manners in the two phase shift circuits. 4. The tuning amplifier according to claim 1, wherein the differential input amplifier is an operational amplifier. 5. The tuning amplifier according to claim 1, wherein each of the input impedance element and the feedback impedance element is a resistor. 6. The device according to claim 5, wherein at least one of the input impedance element and the feedback impedance element is formed by a variable resistor, and the resistance ratio of the input impedance element and the feedback impedance element is changed. A tuned amplifier characterized by changing maximum attenuation. 7. The tuning amplifier according to claim 1, wherein each of the input impedance element and the feedback impedance element is a capacitor. 8. The capacitance element according to claim 7, wherein at least one of the input-side impedance element and the feedback-side impedance element is formed by a variable capacitance element, and a capacitance ratio of the input-side impedance element and the feedback-side impedance element is changed. A tuned amplifier characterized in that the maximum attenuation is changed by changing the maximum attenuation. 9. The tuning frequency according to claim 1, wherein the third resistor included in at least one of the two phase shift circuits is formed by a variable resistor, and the resistance value is changed. A tuning amplifier characterized by being changed. 10. The tuning amplifier according to claim 6, wherein the variable resistance is formed by a channel of an FET, and a channel voltage is changed by changing a gate voltage. 11. The variable resistance according to claim 6, wherein the variable resistor is formed by connecting a p-channel type FET and an n-channel type FET in parallel, and changing the magnitude of the gate voltage of each FET having a different polarity. A tunable amplifier characterized by changing the channel resistance. 12. The tuning frequency is changed according to claim 1, wherein the capacitor included in at least one of the two phase shift circuits is formed of a variable capacitance element, and the capacitance is changed. A tuned amplifier characterized by: 13. The tuning amplifier according to claim 8, wherein the variable capacitance element is formed of a variable capacitance diode whose reverse bias voltage can be changed or an FET whose gate capacitance can be changed by changing the gate voltage. . 14. The method according to claim 1, wherein a plurality of resistors having a fixed resistance value are provided as the third resistors included in at least one of the two phase shift circuits, and are switched by switching. A tuning amplifier characterized in that the tuning frequency is changed by selectively connecting. 15. The capacitor according to claim 1, wherein the capacitors included in at least one of the two phase shift circuits have a plurality of capacitors having a fixed electrostatic capacitance, and are selectively switched by a switch. A tuning amplifier characterized in that the tuning frequency is changed by connecting to the. 16. The capacitor according to claim 1, wherein the capacitor included in at least one of the two phase shift circuits is connected in parallel between an amplifier having a negative gain and an input / output of the amplifier. The tuned amplifier is characterized in that the capacitance viewed from the input side of the amplifier is made larger than the capacitance actually possessed by the capacitor element by replacing the capacitor element. 17. The tuning amplifier according to claim 16, wherein the tuning frequency is changed by changing the gain of the amplifier to change the capacitance viewed from the input side of the amplifier. 18. A series circuit including a first differential input amplifier, a resistor and a capacitor to which an input AC signal is applied, and a signal generated in the capacitor, which is non-inverted by the first differential input amplifier. A circuit for inputting to the input terminal, an input resistor connected to the inverting input terminal of the first differential input amplifier, to which an input signal is applied, and an output terminal and an inverting input terminal of the first differential input amplifier. A first phase shift circuit having a feedback resistor connected in between, a second differential input amplifier, a series circuit including a capacitor and a resistor to which an output signal of the first phase shift circuit is applied, A circuit for inputting a signal generated in the resistor to the non-inverting input terminal of the second differential input amplifier and an inverting input terminal of the second differential input amplifier are connected to the first phase shift circuit. The input resistance to which the output signal is applied And a second phase shifter having a feedback resistor connected between the output terminal and the inverting input terminal of the second differential input amplifier, the phase being shifted in a direction opposite to that of the first phase shift circuit. A circuit, a feedback resistor for returning the output of the second phase shift circuit to the input of the first phase shift circuit, and an input resistor for inputting an AC signal to be amplified to the first phase shift circuit. A tuned amplifier characterized by comprising. 19. The tuning according to claim 18, wherein a tuning frequency is changed by changing a resistance connected in series with a capacitor of the first phase shift circuit and / or the second phase shift circuit. amplifier. 20. The tunable amplifier according to claim 18, wherein the maximum attenuation amount is changed by changing a ratio of resistance values of the input resistance and the feedback resistance. 21. The tuning amplifier according to claim 18, wherein the input resistance and / or the resistance connected in series with the capacitor in each of the phase shift circuits is formed by a channel of an FET. 22. An operational amplifier, a time constant circuit composed of a resistor and a capacitor to which an input AC signal is applied, and a circuit for inputting a signal generated in the time constant circuit to a non-inverting input terminal of the operational amplifier. An input AC signal having an input resistance connected to the inverting input terminal of the operational amplifier, to which an input signal is applied, and a feedback resistance connected between the output terminal of the operational amplifier and the inverting input terminal, Of the phase shift circuit in the opposite direction, an input side impedance element for inputting an AC signal to the phase shift circuit of the preceding stage, and the output of the phase shift circuit of the subsequent stage via the feedback side impedance element A circuit for returning to the input of the phase shift circuit of the above, and a tuning amplifier. 23. The tuning according to claim 22, wherein the resistance of the time constant circuit of the preceding phase shift circuit and / or the resistance of the time constant circuit of the subsequent phase shift circuit is changed to change the tuning frequency. amplifier. 24. The tunable amplifier according to claim 22, wherein the maximum attenuation amount is adjusted by changing the ratio of the element constants of the input impedance element and the feedback impedance element. 25. The tuning amplifier according to claim 22, wherein the resistance of each time constant circuit is formed by the channel of the FET. 26. The tuning amplifier according to claim 1, which is formed as a semiconductor integrated circuit.