JPH08288656A - Manufacture of multilayered printed wiring board - Google Patents
Manufacture of multilayered printed wiring boardInfo
- Publication number
- JPH08288656A JPH08288656A JP9251395A JP9251395A JPH08288656A JP H08288656 A JPH08288656 A JP H08288656A JP 9251395 A JP9251395 A JP 9251395A JP 9251395 A JP9251395 A JP 9251395A JP H08288656 A JPH08288656 A JP H08288656A
- Authority
- JP
- Japan
- Prior art keywords
- copper foil
- hole
- adhesive film
- inner layer
- layer circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 87
- 239000011889 copper foil Substances 0.000 claims abstract description 75
- 238000005530 etching Methods 0.000 claims abstract description 22
- 238000007747 plating Methods 0.000 claims abstract description 17
- 238000010438 heat treatment Methods 0.000 claims abstract description 12
- 239000004020 conductor Substances 0.000 claims abstract description 11
- 238000003825 pressing Methods 0.000 claims abstract description 6
- 230000000149 penetrating effect Effects 0.000 claims abstract description 5
- 239000002313 adhesive film Substances 0.000 claims description 53
- 238000000034 method Methods 0.000 claims description 38
- 229920005989 resin Polymers 0.000 claims description 22
- 239000011347 resin Substances 0.000 claims description 22
- 239000000758 substrate Substances 0.000 claims description 6
- 239000000853 adhesive Substances 0.000 claims description 4
- 230000001070 adhesive effect Effects 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 4
- YTAHJIFKAKIKAV-XNMGPUDCSA-N [(1R)-3-morpholin-4-yl-1-phenylpropyl] N-[(3S)-2-oxo-5-phenyl-1,3-dihydro-1,4-benzodiazepin-3-yl]carbamate Chemical compound O=C1[C@H](N=C(C2=C(N1)C=CC=C2)C1=CC=CC=C1)NC(O[C@H](CCN1CCOCC1)C1=CC=CC=C1)=O YTAHJIFKAKIKAV-XNMGPUDCSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 abstract description 65
- 229910052802 copper Inorganic materials 0.000 abstract description 12
- 239000010949 copper Substances 0.000 abstract description 12
- 239000004593 Epoxy Substances 0.000 abstract description 7
- 238000003475 lamination Methods 0.000 abstract description 4
- 239000011229 interlayer Substances 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 239000004698 Polyethylene Substances 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- -1 polyethylene Polymers 0.000 description 2
- 229920000573 polyethylene Polymers 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000007766 curtain coating Methods 0.000 description 1
- 238000003618 dip coating Methods 0.000 description 1
- 229920006332 epoxy adhesive Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、多層配線板とその製造
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board and its manufacturing method.
【0002】[0002]
【従来の技術】多層プリント配線板の種類は多く、様々
な構造や製造法が提案され、使用されている。また、多
層プリント配線板の、層間接続の方法も多く開発されて
おり、代表的なものとしては、(1)複数の片面回路板を
作成しておき、プリプレグを介して積層一体化した後、
必要な箇所に穴をあけ、内部を導体化して接続する方
法、(2)複数の両面回路板を作成し、その両面の接続の
必要な箇所に穴をあけて、内部を導体化しておき、これ
らをプリプレグを介して積層一体化し、穴をあけ、内部
を導体化して接続する方法、(3)内層回路板を作成して
おき、その上にプリプレグと銅箔を重ね、積層一体化
し、穴をあけ、内部を導体化し、最後に外層回路を形成
する方法、(4)前記3つの方法の組合せ、等がある。2. Description of the Related Art There are many types of multilayer printed wiring boards, and various structures and manufacturing methods have been proposed and used. Also, many methods for interlayer connection of a multilayer printed wiring board have been developed, and as a typical example, (1) a plurality of single-sided circuit boards are prepared and laminated and integrated through a prepreg,
How to connect holes by making holes in the necessary parts and making the inside a conductor, (2) Creating multiple double-sided circuit boards, making holes in the parts that require connection on both sides, and making the inside a conductor, A method of laminating and integrating these through a prepreg, making a hole, connecting the inside by making it a conductor, (3) Creating an inner layer circuit board, stacking prepreg and copper foil on it, laminating and integrating, There is a method of forming a conductor inside, and finally forming an outer layer circuit, and (4) a combination of the above three methods.
【0003】[0003]
【発明が解決しようとする課題】ところで、これらの方
法のうち、(1)は、接続の必要な箇所には、必ず穴をあ
けなめらばならず、配線密度も、穴の数によって大きく
制限され、また、穴によって配線の経路の制限を受け、
配線密度の高いものでは実用的でなくなってきている。
そのほかの方法では、隣接する回路層間の接続、さらに
2つ隣の層との接続は、それぞれ隣接する層に別の経由
孔を設けるか、あるいは、図2に示すように、まず3層
の回路板に孔をあけ(図2(a)に示す。)、さらに図
2(b)に示すように、外層を積層して回路を形成する
か、もしくは、図1に示すように、積層した後に、孔を
途中まであけることによって接続していた。ところが、
図2の場合には、2回の積層工程を必要とし、図1の場
合には、孔の深さに対して穴径が小さい場合には、めっ
き液と接触する機会が小さくなり、孔の底のほうでは、
めっき厚さが薄くなる傾向があり、底のほうではまった
くめっきされない場合も生じることがある。By the way, among these methods, the method (1) requires that holes are always formed in the places where the connection is required, and the wiring density is largely limited by the number of holes. And the holes restrict the wiring route,
It has become unpractical for high wiring density.
In other methods, the connection between adjacent circuit layers, or the connection between two adjacent layers is performed by providing another via hole in each adjacent layer, or as shown in FIG. A hole is made in the plate (shown in FIG. 2 (a)), and then outer layers are laminated to form a circuit as shown in FIG. 2 (b), or after lamination as shown in FIG. , They were connected by opening a hole halfway. However,
In the case of FIG. 2, two stacking steps are required, and in the case of FIG. 1, when the hole diameter is smaller than the depth of the hole, the chance of contact with the plating solution is reduced, At the bottom,
The plating thickness tends to be thin, and it may happen that the bottom is not plated at all.
【0004】本発明は、配線密度と接続の信頼性に優れ
た多層配線板と、その製造法を提供することを目的とす
る。An object of the present invention is to provide a multilayer wiring board excellent in wiring density and connection reliability, and a manufacturing method thereof.
【0005】[0005]
【課題を解決するための手段】本発明の多層配線板は、
複数の内層回路層の回路導体と、両面の外層回路層の回
路導体とが、必要な箇所でのみ層間接続のための穴が設
けられていることを特徴とする。The multilayer wiring board of the present invention comprises:
It is characterized in that the circuit conductors of the plurality of inner circuit layers and the circuit conductors of the outer circuit layers on both surfaces are provided with holes for interlayer connection only at necessary portions.
【0006】このような多層配線板を製造するために、
以下の工程を用いることができる。 a.貫通孔によって両面の回路が接続された内層回路板
を作成する工程、 b.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した銅箔付き絶縁性接着フィルムを
準備する工程、 c.前記銅箔付き絶縁性接着フィルムの、内層回路の貫
通孔と接続する箇所に、穴を設ける工程、 d.前記内層回路板と、前記穴をあけた銅箔付き絶縁性
接着フィルムを重ね、加熱加圧して積層一体化する工
程、 e.積層一体化したものに、めっきを行う工程、 f.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程、In order to manufacture such a multilayer wiring board,
The following steps can be used. a. Creating an inner layer circuit board in which circuits on both sides are connected by through holes, b. A step of preparing an insulative adhesive film with a copper foil in which a semi-cured, low-fluidity insulating resin layer is formed on one surface of the copper foil, c. A step of forming a hole in a portion of the insulating adhesive film with copper foil, which is connected to a through hole of an inner layer circuit, d. A step of stacking the inner-layer circuit board and the perforated insulating adhesive film with a copper foil, and heating and pressurizing them to integrate and laminate; e. A step of plating the laminated and integrated product, f. Process of forming a circuit by etching away unnecessary parts of the outer layer copper foil,
【0007】また、以下の製造法とすることもできる。 a.貫通孔によって両面の回路が接続された内層回路板
を2枚作成する工程、 b.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した銅箔付き絶縁性接着フィルムを
2枚準備する工程、 c.前記銅箔付き絶縁性接着フィルムの、内層回路の貫
通孔と接続する箇所に、穴を設ける工程、 d.前記内層回路板2枚の間には、半硬化状であって、
低流動性の絶縁性樹脂層を形成した絶縁性接着フィルム
を重ね、内層回路板の外側には、前記穴をあけた銅箔付
き絶縁性接着フィルムを重ね、加熱加圧して積層一体化
する工程、 e.積層一体化したものに、めっきを行う工程、 f.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程The following manufacturing method can also be used. a. A step of forming two inner layer circuit boards in which circuits on both sides are connected by through holes, b. A step of preparing two insulative adhesive films with copper foil, which are semi-cured and have a low-fluidity insulating resin layer formed on one surface of the copper foil, c. A step of forming a hole in a portion of the insulating adhesive film with copper foil, which is connected to a through hole of an inner layer circuit, d. Between the two inner layer circuit boards, a semi-cured state,
A step of stacking an insulating adhesive film having a low-fluidity insulating resin layer formed thereon, and stacking an insulating adhesive film with a copper foil having the holes on the outside of the inner circuit board, and heating and pressing to laminate the layers. , E. A step of plating the laminated and integrated product, f. Process to form a circuit by etching away unnecessary parts of the outer copper foil
【0008】工程cにおいては、銅箔付き絶縁性接着フ
ィルムに、一方の内層回路のみと接続する箇所にも穴を
設けることもでき、工程dと工程eとの間に、一体化し
た積層体を貫通する穴を設けることもできる。In step c, the insulating adhesive film with a copper foil may be provided with a hole at a place where it is connected to only one inner layer circuit, and an integrated laminated body is formed between steps d and e. It is also possible to provide a hole passing through.
【0009】さらに多層化するためには、上記工程で作
成した多層配線板を第2の内層回路板とし、以下の工程
を上記工程に続けて行なうことができる。 g.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した第2の銅箔付き絶縁性接着フィ
ルムを準備する工程、 h.前記第2の銅箔付き絶縁性接着フィルムの、前記第
2の内層回路の貫通孔と接続する箇所に、穴を設ける工
程、 i.前記第2の内層回路板と、前記穴をあけた第2の銅
箔付き絶縁性接着フィルムを重 ね、加熱加圧して積層
一体化する工程、 j.積層一体化したものに、めっきを行う工程、 k.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程、In order to further increase the number of layers, the multilayer wiring board prepared in the above step can be used as a second inner layer circuit board, and the following steps can be performed following the above steps. g. A step of preparing a second insulating adhesive film with a copper foil, which is a semi-cured, low-flowing insulating resin layer formed on one surface of the copper foil, h. A step of forming a hole in a portion of the second insulating adhesive film with copper foil, which is connected to the through hole of the second inner layer circuit, i. A step of stacking the second inner-layer circuit board and the second insulative adhesive film with copper foil with holes and heating and pressing to laminate and integrate them; j. A step of plating the laminated and integrated product, k. Process of forming a circuit by etching away unnecessary parts of the outer layer copper foil,
【0010】この場合でも、工程hにおいて、第2の銅
箔付き絶縁性接着フィルムに、一方の内層回路のみと接
続する箇所、あるいは、内層回路を貫通する貫通孔と接
続する箇所にも穴を設けることができ、工程iと工程j
との間に、一体化した積層体を貫通する穴を設けること
もできる。Even in this case, in step h, holes are also formed in the second insulating adhesive film with copper foil at a portion to be connected to only one inner layer circuit or a portion to be connected to a through hole penetrating the inner layer circuit. Can be provided, process i and process j
It is also possible to provide a hole penetrating the integrated laminate between and.
【0011】上記銅箔付き絶縁性接着フィルムに代え
て、片面銅箔貼り絶縁基板の絶縁材側に、半硬化状であ
って、低流動性の絶縁性樹脂層を形成した、接着剤付き
片面銅箔貼り絶縁基板を用いることもできる。Instead of the insulating adhesive film with copper foil, a semi-cured, low-fluidity insulating resin layer is formed on the insulating material side of a single-sided copper foil-bonded insulating substrate, and the adhesive-coated one side A copper foil-bonded insulating substrate can also be used.
【0012】本発明に用いる内層回路板は、通常の配線
板を製造する方法で、通常の配線板に使用する材料を用
いて作成することができる。半硬化状であって、低流動
性の絶縁性樹脂層を形成した銅箔付き絶縁性接着フィル
ムには、エポキシ樹脂系、アクリル変性樹脂系、あるい
はポリイミド樹脂系の絶縁材料を用いることができ、こ
れらを、銅箔表面に、ロールコーティング、ディップコ
ーティング、あるいはカーテンコーティング法等によっ
て塗布することができる。ここで、半硬化状とは、40
℃以下では粘着性を持たず、その後の積層接着で接着強
さに0.8kgf/cm以上の強度を与えることのできる状態
をいう。また、低流動性とは、圧力25kgf/cm2で加熱
加圧積層したときに、流動量が200μm以下の性質を
有するものとする。このような銅箔付き絶縁性接着フィ
ルムは、市販のものとして、高分子エポキシ樹脂を用い
たMCF−3000(日立化成工業株式会社製、商品
名)がある。また、多層化するときに用いる、絶縁性接
着フィルムには、市販のものとして、高分子エポキシ重
合体を用いたAS−3000(日立化成工業株式会社
製、商品名)が使用できる。本発明の銅箔付き絶縁性接
着フィルムにあける孔の大きさは、図3(b)に示すよ
うに、内層回路板の貫通孔よりも大きめにすることがで
きる。この場合には、材料の伸縮によって、内層回路板
の貫通孔との位置精度が低下するのを抑制でき好まし
い。The inner layer circuit board used in the present invention can be produced by a method for producing a usual wiring board, using the material used for the usual wiring board. A semi-cured, low-fluidity insulating resin layer with a copper foil on which an insulating resin layer is formed, an epoxy resin type, an acrylic modified resin type, or a polyimide resin type insulating material can be used, These can be applied to the copper foil surface by roll coating, dip coating, curtain coating, or the like. Here, the semi-cured state is 40
It is a state in which it does not have tackiness at a temperature of not higher than 0 ° C., and a strength of 0.8 kgf / cm or more can be given to the adhesive strength in the subsequent laminating adhesion. Further, the low fluidity means that the fluidity is 200 μm or less when laminated under heat and pressure at a pressure of 25 kgf / cm 2 . Such an insulating adhesive film with copper foil is commercially available as MCF-3000 (manufactured by Hitachi Chemical Co., Ltd.) using a polymer epoxy resin. In addition, AS-3000 (manufactured by Hitachi Chemical Co., Ltd., trade name) using a high molecular epoxy polymer can be used as a commercially available insulating adhesive film used for forming a multilayer. The size of the holes formed in the insulating adhesive film with a copper foil of the present invention can be made larger than the through holes of the inner layer circuit board, as shown in FIG. 3 (b). In this case, it is preferable that the positional accuracy of the inner layer circuit board with respect to the through hole can be prevented from being lowered due to expansion and contraction of the material.
【0013】[0013]
【作用】本発明では、図3に示すように、止まり孔の内
部は、既に導体が形成されているため、孔の外層付近さ
えめっきされていれば、接続が十分に行なえる。In the present invention, as shown in FIG. 3, since the conductor is already formed inside the blind hole, the connection can be sufficiently performed as long as the outer layer of the hole is plated.
【0014】[0014]
実施例1 図4(a)に示すように、銅箔張エポキシ積層板に穴を
あけ、銅めっきを行ない、配線パターン以外の部分にエ
ッチングレジストを形成して、エッチング液と接触させ
て内層板を作成した。次に、図4(b)および(d)に
示す、銅箔付きエポキシ接着フィルムであるMCF−3
000(日立化成工業株式会社製、商品名)を準備す
る。次に、図4(c)に示すように、前記銅箔付き絶縁
性接着フィルムの、内層回路の貫通孔と接続する箇所
に、穴を設けた。前記内層回路板と、前記穴をあけた銅
箔付き絶縁性接着フィルムを重ね、圧力25kgf/c
m2、温度170℃で、90分間、加熱加圧して積層一
体化し、図4(e)に示すように、積層一体化したもの
とした。次に、図4(f)に示すように、銅めっきを行
った。次に、図4(f)に示すように、外層の銅箔の不
要な箇所をエッチング除去して回路を形成して、多層配
線板とした。Example 1 As shown in FIG. 4 (a), a hole was formed in a copper foil-clad epoxy laminate, copper plating was performed, an etching resist was formed on a portion other than the wiring pattern, and the inner layer plate was brought into contact with an etching solution. It was created. Next, MCF-3 which is an epoxy adhesive film with copper foil shown in FIGS.
000 (manufactured by Hitachi Chemical Co., Ltd., trade name) is prepared. Next, as shown in FIG. 4 (c), holes were provided in the copper foil-insulated insulating adhesive film at locations where they were connected to the through holes of the inner layer circuit. The inner layer circuit board and the perforated insulating adhesive film with copper foil are overlaid, and the pressure is 25 kgf / c.
At m 2 temperature of 170 ° C., heating and pressurization were performed for 90 minutes to laminate and integrate, and as shown in FIG. Next, copper plating was performed as shown in FIG. Next, as shown in FIG. 4 (f), unnecessary portions of the outer layer copper foil were removed by etching to form a circuit, and a multilayer wiring board was obtained.
【0015】実施例2 実施例1の工程cにおいて、銅箔付き絶縁性接着フィル
ムに、一方の内層回路のみと接続する箇所にも穴を設け
た以外は全て、実施例1と同様にして作成した(図示せ
ず。)。Example 2 All were prepared in the same manner as in Example 1 except that in step c of Example 1, the insulating adhesive film with copper foil was also provided with a hole at a place where only one inner layer circuit was connected. (Not shown).
【0016】実施例3 実施例2の工程dと工程eとの間に、一体化した積層体
を貫通する穴を設けた以外は全て、実施例2と同様にし
て作成した(図示せず。)。Example 3 All were prepared in the same manner as in Example 2 except that a hole was formed between the step d and the step e of Example 2 through the integrated laminate (not shown). ).
【0017】実施例4 両面銅張り積層板として、エポキシ樹脂含浸ガラス布銅
張り積層板であるMCL−E−67(日立化成工業株式
会社製、商品名)を用い、この積層板に貫通孔となる孔
をあけ、全面に無電解めっきを行なった後、電解めっき
を行ない、両面の銅箔表面にエッチングレジストを形成
し、そのエッチングレジストから露出した不要な箇所を
エッチング除去して、図5(a)に示すように、貫通孔
によって両面の回路が接続された内層回路板を2枚作成
した。図5(b)に示すように、銅箔の一方の面に、半
硬化状であって、低流動性の絶縁性樹脂層を形成した銅
箔付き絶縁性接着フィルムを2枚準備した。このときの
材料も実施例1と同じものを用いた。図5(c)に示す
ように、前記銅箔付き絶縁性接着フィルムの、内層回路
の貫通孔と接続する箇所に、穴を設けた。この穴は、ド
リルによってあけた。図5(d)に示すように、前記内
層回路板2枚の間には、半硬化状であって、低流動性の
絶縁性樹脂層を形成した絶縁性接着フィルムとして、高
分子エポキシを支持フィルムであるポリエチレンフィル
ムに塗布し、半硬化状に加熱乾燥したものであるAS−
3000(日立化成工業株式会社製、商品名)の保護フ
ィルムを剥離したものを重ね、内層回路板の外側には、
前記穴をあけた銅箔付き絶縁性接着フィルムを重ね、加
熱加圧して積層一体化した。図5(e)に示すように、
積層一体化したものに、無電解めっきを行い、図5
(f)に示すように、外層の銅箔の不要な箇所をエッチ
ング除去して回路を形成して作成した。Example 4 As a double-sided copper-clad laminate, MCL-E-67 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an epoxy resin-impregnated glass cloth copper-clad laminate, was used. After forming a hole and performing electroless plating on the entire surface, electrolytic plating is performed to form an etching resist on the surfaces of the copper foils on both sides, and unnecessary portions exposed from the etching resist are removed by etching. As shown in a), two inner layer circuit boards having circuits on both sides connected by through holes were prepared. As shown in FIG. 5B, two copper foil-containing insulating adhesive films each having a semi-cured, low-fluidity insulating resin layer formed on one surface of the copper foil were prepared. The material used at this time was the same as in Example 1. As shown in FIG. 5 (c), a hole was provided in the insulating adhesive film with copper foil at a location where it was connected to the through hole of the inner layer circuit. This hole was drilled. As shown in FIG. 5D, a polymeric epoxy is supported as an insulating adhesive film having a semi-cured and low-fluidity insulating resin layer formed between the two inner layer circuit boards. AS- which is applied to a polyethylene film which is a film and heated and dried in a semi-cured state.
3000 (manufactured by Hitachi Chemical Co., Ltd., product name) with the protective film peeled off is stacked, and on the outside of the inner layer circuit board,
The insulative adhesive film with copper foil having the holes formed thereon was stacked and heated and pressed to be laminated and integrated. As shown in FIG. 5 (e),
Electroless plating is applied to the laminated and integrated product, and the result shown in FIG.
As shown in (f), unnecessary portions of the outer copper foil were removed by etching to form a circuit.
【0018】実施例5 実施例4の銅箔付き絶縁性接着フィルムに代えて、片面
銅箔貼り絶縁基板の絶縁材側に、半硬化状であって、低
流動性の絶縁性樹脂層を形成した、接着剤付き片面銅箔
貼り絶縁基板を用いた以外は、実施例1と同様にして作
成した。Example 5 Instead of the insulating adhesive film with copper foil of Example 4, a semi-cured, low-fluidity insulating resin layer is formed on the insulating material side of a single-sided copper foil-clad insulating substrate. It was prepared in the same manner as in Example 1 except that the adhesive-coated one-sided copper foil-clad insulating substrate was used.
【0019】以上のようにして作成した多層配線板は、
いずれも、内層の貫通孔の箇所では、少なくともその厚
さに20μmほどが確保されていた。また、配線密度
も、経由孔を接続の必要な箇所にのみ設けることができ
るため、従来の多層配線板において収容していた回路数
を、ほぼ倍以上に収容することができた。製造の効率
は、前記実施例にも見られるとおり、4層で1回、6層
でも1回の積層プレス工程となるため、効率を高めるこ
とができた。The multilayer wiring board prepared as described above is
In each case, at least the thickness of about 20 μm was secured at the location of the through hole in the inner layer. Further, since the wiring density can be provided only at the place where the connection is required, the number of circuits accommodated in the conventional multilayer wiring board can be accommodated almost twice or more. As can be seen from the above-mentioned Examples, the production efficiency was increased because the lamination pressing step was performed once for 4 layers and once for 6 layers.
【0020】[0020]
【発明の効果】以上に説明したとおり、配線密度と接続
の信頼性に優れた多層配線板と、その多層板を効率良く
製造する方法を提供することができる。As described above, it is possible to provide a multilayer wiring board excellent in wiring density and connection reliability, and a method for efficiently manufacturing the multilayer board.
【図1】本発明の課題を説明するための断面図である。FIG. 1 is a sectional view for explaining a problem of the present invention.
【図2】本発明の他の課題を説明するための断面図であ
る。FIG. 2 is a sectional view for explaining another problem of the present invention.
【図3】(a)及び(b)は、それぞれ本発明の一実施
例を示す断面図である。3A and 3B are cross-sectional views showing an embodiment of the present invention.
【図4】(a)〜(g)は、それぞれ本発明の一実施例
の方法を説明するための各工程における断面図である。4A to 4G are cross-sectional views in each step for explaining the method of one embodiment of the present invention.
【図5】(a)〜(g)は、それぞれ本発明の他の実施
例の方法を説明するための各工程における断面図であ
る。5 (a) to 5 (g) are cross-sectional views in each step for explaining a method of another embodiment of the present invention.
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成7年9月19日[Submission date] September 19, 1995
【手続補正1】[Procedure Amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】0003[Name of item to be corrected] 0003
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【0003】[0003]
【発明が解決しようとする課題】ところで、これらの方
法のうち、(1)は、接続の必要な箇所には、必ず穴をあ
けなければならず、配線密度も、穴の数によって大きく
制限され、また、穴によって配線の経路の制限を受け、
配線密度の高いものでは実用的でなくなってきている。
そのほかの方法では、隣接する回路層間の接続、さらに
2つ隣の層との接続は、それぞれ隣接する層に別の経由
孔を設けるか、あるいは、図2に示すように、まず3層
の回路板に孔をあけ(図2(c)に示す。)、さらに図
2(d)に示すように、外層を積層して回路を形成する
か、もしくは、図1に示すように、積層した後に、孔を
途中まであけることによって接続していた。ところが、
図2の場合には、2回の積層工程を必要とし、図1の場
合には、孔の深さに対して穴径が小さい場合には、めっ
き液と接触する機会が小さくなり、孔の底のほうでは、
めっき厚さが薄くなる傾向があり、底のほうではまった
くめっきされない場合も生じることがある。[SUMMARY OF THE INVENTION Incidentally, among these methods, (1) is the desired location of the connection, must Re only always such a hole, wiring density, larger the number of holes Is restricted, and the route of the wiring is restricted by holes,
It has become unpractical for high wiring density.
In other methods, the connection between adjacent circuit layers, or the connection between two adjacent layers is performed by providing another via hole in each adjacent layer, or as shown in FIG. A hole is made in the plate (shown in FIG. 2 ( c )), and then outer layers are laminated to form a circuit as shown in FIG. 2 ( d ), or after lamination as shown in FIG. , They were connected by opening a hole halfway. However,
In the case of FIG. 2, two stacking steps are required, and in the case of FIG. 1, when the hole diameter is smaller than the depth of the hole, the chance of contact with the plating solution is reduced, At the bottom,
The plating thickness tends to be thin, and it may happen that the bottom is not plated at all.
【手続補正2】[Procedure Amendment 2]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】0017[Correction target item name] 0017
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【0017】実施例4 両面銅張り積層板として、エポキシ樹脂含浸ガラス布銅
張り積層板であるMCL−E−67(日立化成工業株式
会社製、商品名)を用い、この積層板に貫通孔となる孔
をあけ、全面に無電解めっきを行なった後、電解めっき
を行ない、両面の銅箔表面にエッチングレジストを形成
し、そのエッチングレジストから露出した不要な箇所を
エッチング除去して、図5(a)に示すように、貫通孔
によって両面の回路が接続された内層回路板を2枚作成
した。図5(b)に示すように、銅箔の一方の面に、半
硬化状であって、低流動性の絶縁性樹脂層を形成した銅
箔付き絶縁性接着フィルムを2枚準備した。このときの
材料も実施例1と同じものを用いた。図5(c)に示す
ように、前記銅箔付き絶縁性接着フィルムの、内層回路
の貫通孔と接続する箇所に、穴を設けた。この穴は、ド
リルによってあけた。図5(d)に示すように、前記内
層回路板2枚の間には、半硬化状であって、低流動性の
絶縁性樹脂層を形成した絶縁性接着フィルムとして、高
分子エポキシを支持フィルムであるポリエチレンテレフ
タレートフィルムに塗布し、半硬化状に加熱乾燥したも
のであるAS−3000(日立化成工業株式会社製、商
品名)の保護フィルムを剥離したものを重ね、内層回路
板の外側には、前記穴をあけた銅箔付き絶縁性接着フィ
ルムを重ね、加熱加圧して積層一体化した。Example 4 As a double-sided copper-clad laminate, MCL-E-67 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an epoxy resin-impregnated glass cloth copper-clad laminate, was used. After forming a hole and performing electroless plating on the entire surface, electrolytic plating is performed to form an etching resist on the surfaces of the copper foils on both sides, and unnecessary portions exposed from the etching resist are removed by etching. As shown in a), two inner layer circuit boards having circuits on both sides connected by through holes were prepared. As shown in FIG. 5B, two copper foil-containing insulating adhesive films each having a semi-cured, low-fluidity insulating resin layer formed on one surface of the copper foil were prepared. The material used at this time was the same as in Example 1. As shown in FIG. 5 (c), a hole was provided in the insulating adhesive film with copper foil at a location where it was connected to the through hole of the inner layer circuit. This hole was drilled. As shown in FIG. 5D, a polymeric epoxy is supported as an insulating adhesive film having a semi-cured and low-fluidity insulating resin layer formed between the two inner layer circuit boards. Polyethylene teref, which is a film
The protective film of AS-3000 (manufactured by Hitachi Chemical Co., Ltd., which is a product of Hitachi Chemical Co., Ltd.), which is applied to a tarate film and dried by heating in a semi-cured state, is peeled off, and the holes are formed on the outside of the inner circuit board. The insulative adhesive film with copper foil having been opened was stacked and heated and pressed to be laminated and integrated.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 大塚 和久 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Kazuhisa Otsuka 1500 Ogawa, Shimodate City, Ibaraki Prefecture Hitachi Chemical Co., Ltd. Shimodate Research Center
Claims (12)
層回路層の回路導体とが、必要な箇所でのみ層間接続さ
れていることを特徴とする多層配線板。1. A multilayer wiring board characterized in that a plurality of circuit conductors of an inner circuit layer and circuit conductors of outer circuit layers on both surfaces are interlayer-connected only at a necessary position.
配線板の製造法。 a.貫通孔によって両面の回路が接続された内層回路板
を作成する工程、 b.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した銅箔付き絶縁性接着フィルムを
準備する工程、 c.前記銅箔付き絶縁性接着フィルムの、内層回路の貫
通孔と接続する箇所に、 穴を設ける工程、 d.前記内層回路板と、前記穴をあけた銅箔付き絶縁性
接着フィルムを重ね、加熱加圧して積層一体化する工
程、 e.積層一体化したものに、めっきを行う工程、 f.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程、2. A method for manufacturing a multilayer wiring board, comprising the following steps. a. Creating an inner layer circuit board in which circuits on both sides are connected by through holes, b. A step of preparing an insulative adhesive film with a copper foil in which a semi-cured, low-fluidity insulating resin layer is formed on one surface of the copper foil, c. A step of forming a hole in a portion of the insulating adhesive film with copper foil, which is connected to a through hole of an inner layer circuit, d. A step of stacking the inner-layer circuit board and the perforated insulating adhesive film with a copper foil, and heating and pressurizing them to integrate and laminate; e. A step of plating the laminated and integrated product, f. Process of forming a circuit by etching away unnecessary parts of the outer layer copper foil,
配線板の製造法。 a.貫通孔によって両面の回路が接続された内層回路板
を2枚作成する工程、 b.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した銅箔付き絶縁性接着フィルムを
2枚準備する工程、 c.前記銅箔付き絶縁性接着フィルムの、内層回路の貫
通孔と接続する箇所に、穴を設ける工程、 d.前記内層回路板2枚の間には、半硬化状であって、
低流動性の絶縁性樹脂層を形成した絶縁性接着フィルム
を重ね、内層回路板の外側には、前記穴をあけた銅箔付
き絶縁性接着フィルムを重ね、加熱加圧して積層一体化
する工程、 e.積層一体化したものに、めっきを行う工程、 f.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程、3. A method for manufacturing a multilayer wiring board, comprising the following steps. a. A step of forming two inner layer circuit boards in which circuits on both sides are connected by through holes, b. A step of preparing two insulative adhesive films with copper foil, which are semi-cured and have a low-fluidity insulating resin layer formed on one surface of the copper foil, c. A step of forming a hole in a portion of the insulating adhesive film with copper foil, which is connected to a through hole of an inner layer circuit, d. Between the two inner layer circuit boards, a semi-cured state,
A step of stacking an insulating adhesive film having a low-fluidity insulating resin layer formed thereon, and stacking an insulating adhesive film with a copper foil having the holes on the outside of the inner circuit board, and heating and pressing to laminate the layers. , E. A step of plating the laminated and integrated product, f. Process of forming a circuit by etching away unnecessary parts of the outer layer copper foil,
ルムに、一方の内層回路のみと接続する箇所にも穴を設
けることを特徴とする請求項2または3に記載の多層配
線板の製造法。4. The process for producing a multilayer wiring board according to claim 2, wherein in step c, the insulating adhesive film with a copper foil is provided with a hole at a place where only one inner layer circuit is connected. Law.
体を貫通する穴を設けることを特徴とする請求項2〜4
のうちいずれかに記載の多層配線板の製造法。5. A hole for penetrating the integrated laminated body is provided between step d and step e.
A method for manufacturing a multilayer wiring board according to any one of 1.
配線板の製造法。 a.貫通孔によって両面の回路が接続された内層回路板
を作成する工程、 b.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した銅箔付き絶縁性接着フィルムを
準備する工程、 c.前記銅箔付き絶縁性接着フィルムの、内層回路の貫
通孔と接続する箇所に、 穴を設ける工程、 d.前記内層回路板と、前記穴をあけた銅箔付き絶縁性
接着フィルムを重ね、加熱加圧して積層一体化する工
程、 e.積層一体化したものに、めっきを行う工程、 f.外層の銅箔の不要な箇所をエッチング除去して回路
を形成し、第2の内層回路板を作成する工程、 g.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した第2の銅箔付き絶縁性接着フィ
ルムを準備する工程、 h.前記第2の銅箔付き絶縁性接着フィルムの、前記第
2の内層回路の貫通孔と接続する箇所に、穴を設ける工
程、 i.前記第2の内層回路板と、前記穴をあけた第2の銅
箔付き絶縁性接着フィルムを重ね、加熱加圧して積層一
体化する工程、 j.積層一体化したものに、めっきを行う工程、 k.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程、6. A method of manufacturing a multilayer wiring board, comprising the following steps. a. Creating an inner layer circuit board in which circuits on both sides are connected by through holes, b. A step of preparing an insulative adhesive film with a copper foil in which a semi-cured, low-fluidity insulating resin layer is formed on one surface of the copper foil, c. A step of forming a hole in a portion of the insulating adhesive film with copper foil, which is connected to a through hole of an inner layer circuit, d. A step of stacking the inner-layer circuit board and the perforated insulating adhesive film with a copper foil, and heating and pressurizing them to integrate and laminate; e. A step of plating the laminated and integrated product, f. A step of forming a circuit by etching away unnecessary portions of the outer layer copper foil to form a second inner layer circuit board; g. A step of preparing a second insulating adhesive film with a copper foil, which is a semi-cured, low-flowing insulating resin layer formed on one surface of the copper foil, h. A step of forming a hole in a portion of the second insulating adhesive film with copper foil, which is connected to the through hole of the second inner layer circuit, i. A step of stacking the second inner-layer circuit board and the second insulating adhesive film with a copper foil with holes and heating and pressurizing to integrate the layers; j. A step of plating the laminated and integrated product, k. Process of forming a circuit by etching away unnecessary parts of the outer layer copper foil,
配線板の製造法。 a.貫通孔によって両面の回路が接続された内層回路板
を2枚作成する工程、 b.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した銅箔付き絶縁性接着フィルムを
2枚準備する工程、 c.前記銅箔付き絶縁性接着フィルムの、内層回路の貫
通孔と接続する箇所に、 穴を設ける工程、 d.前記内層回路板2枚の間には、半硬化状であって、
低流動性の絶縁性樹脂層を形成した絶縁性接着フィルム
を重ね、内層回路板の外側には、前記穴をあけた銅箔付
き絶縁性接着フィルムを重ね、加熱加圧して積層一体化
する工程、 e.積層一体化したものに、めっきを行う工程、 f.外層の銅箔の不要な箇所をエッチング除去して第2
の内層回路板を作成する工程、 g.銅箔の一方の面に、半硬化状であって、低流動性の
絶縁性樹脂層を形成した第2の銅箔付き絶縁性接着フィ
ルムを準備する工程、 h.前記第2の銅箔付き絶縁性接着フィルムの、前記第
2の内層回路の貫通孔と接続する箇所に、穴を設ける工
程、 i.前記第2の内層回路板と、前記穴をあけた第2の銅
箔付き絶縁性接着フィルムを重ね、加熱加圧して積層一
体化する工程、 j.積層一体化したものに、めっきを行う工程、 k.外層の銅箔の不要な箇所をエッチング除去して回路
を形成する工程、7. A method for manufacturing a multilayer wiring board, comprising the following steps. a. A step of forming two inner layer circuit boards in which circuits on both sides are connected by through holes, b. A step of preparing two insulative adhesive films with copper foil, which are semi-cured and have a low-fluidity insulating resin layer formed on one surface of the copper foil, c. A step of forming a hole in a portion of the insulating adhesive film with copper foil, which is connected to a through hole of an inner layer circuit, d. Between the two inner layer circuit boards, a semi-cured state,
A step of stacking an insulating adhesive film having a low-fluidity insulating resin layer formed thereon, and stacking an insulating adhesive film with a copper foil having the holes on the outside of the inner circuit board, and heating and pressing to laminate the layers. , E. A step of plating the laminated and integrated product, f. Remove unnecessary parts of the outer copper foil by etching
Creating an inner layer circuit board of g. A step of preparing a second insulating adhesive film with a copper foil, which is a semi-cured, low-flowing insulating resin layer formed on one surface of the copper foil, h. A step of forming a hole in a portion of the second insulating adhesive film with copper foil, which is connected to the through hole of the second inner layer circuit, i. A step of stacking the second inner-layer circuit board and the second insulating adhesive film with a copper foil with holes and heating and pressurizing to integrate the layers; j. A step of plating the laminated and integrated product, k. Process of forming a circuit by etching away unnecessary parts of the outer layer copper foil,
ルムに、一方の内層回路のみと接続する箇所にも穴を設
けることを特徴とする請求項6または7に記載の多層配
線板の製造法。8. The process for producing a multilayer wiring board according to claim 6, wherein in step c, the insulating adhesive film with a copper foil is provided with a hole at a place where only one inner layer circuit is connected. Law.
体を貫通する穴を設けることを特徴とする請求項6〜8
のうちいずれかに記載の多層配線板の製造法。9. The method according to claim 6, wherein a hole passing through the integrated laminated body is provided between step d and step e.
A method for manufacturing a multilayer wiring board according to any one of 1.
接着フィルムに、一方の内層回路のみと接続する箇所、
あるいは、内層回路を貫通する貫通孔と接続する箇所に
も穴を設けることを特徴とする請求項6〜9のうちいず
れかに記載の多層配線板の製造法。10. In step h, a portion of the second insulating adhesive film with copper foil, which is connected to only one inner layer circuit,
Alternatively, the method for manufacturing a multilayer wiring board according to any one of claims 6 to 9, wherein a hole is also provided at a position connected to a through hole penetrating the inner layer circuit.
層体を貫通する穴を設けることを特徴とする請求項6〜
10のうちいずれかに記載の多層配線板の製造法。11. The method according to claim 6, wherein a hole is provided between the step i and the step j so as to pass through the integrated laminated body.
11. The method for manufacturing a multilayer wiring board according to any one of 10.
片面銅箔貼り絶縁基板の絶縁材側に、半硬化状であっ
て、低流動性の絶縁性樹脂層を形成した、接着剤付き片
面銅箔貼り絶縁基板を用いることを特徴とする請求項2
〜11のうちいずれかに記載の多層配線板の製造法。12. An insulating adhesive film with a copper foil is replaced with
3. A one-sided copper-clad insulating substrate with an adhesive, in which a semi-cured, low-fluidity insulating resin layer is formed on the insulating material side of the one-sided copper-clad laminated insulating substrate.
11. The method for manufacturing a multilayer wiring board according to any one of 1 to 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9251395A JPH08288656A (en) | 1995-04-18 | 1995-04-18 | Manufacture of multilayered printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9251395A JPH08288656A (en) | 1995-04-18 | 1995-04-18 | Manufacture of multilayered printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08288656A true JPH08288656A (en) | 1996-11-01 |
Family
ID=14056407
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9251395A Pending JPH08288656A (en) | 1995-04-18 | 1995-04-18 | Manufacture of multilayered printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08288656A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001076337A1 (en) * | 2000-03-31 | 2001-10-11 | Fujitsu Limited | Method of manufacturing build-up wiring board |
| CN105246270A (en) * | 2015-10-22 | 2016-01-13 | 深圳崇达多层线路板有限公司 | Preparation process of plug-in type blind hole HDI board |
| CN112888199A (en) * | 2021-01-15 | 2021-06-01 | 浪潮电子信息产业股份有限公司 | Method for forming pin jack of multilayer PCB |
| CN113329556A (en) * | 2021-05-19 | 2021-08-31 | 景旺电子科技(龙川)有限公司 | Flexible circuit board and manufacturing method thereof |
-
1995
- 1995-04-18 JP JP9251395A patent/JPH08288656A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001076337A1 (en) * | 2000-03-31 | 2001-10-11 | Fujitsu Limited | Method of manufacturing build-up wiring board |
| CN105246270A (en) * | 2015-10-22 | 2016-01-13 | 深圳崇达多层线路板有限公司 | Preparation process of plug-in type blind hole HDI board |
| CN112888199A (en) * | 2021-01-15 | 2021-06-01 | 浪潮电子信息产业股份有限公司 | Method for forming pin jack of multilayer PCB |
| CN113329556A (en) * | 2021-05-19 | 2021-08-31 | 景旺电子科技(龙川)有限公司 | Flexible circuit board and manufacturing method thereof |
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