JPH08316152A - Crystal growing method for compound semiconductor - Google Patents
Crystal growing method for compound semiconductorInfo
- Publication number
- JPH08316152A JPH08316152A JP12325995A JP12325995A JPH08316152A JP H08316152 A JPH08316152 A JP H08316152A JP 12325995 A JP12325995 A JP 12325995A JP 12325995 A JP12325995 A JP 12325995A JP H08316152 A JPH08316152 A JP H08316152A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- compound semiconductor
- silicon substrate
- intermediate layer
- absorbed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 37
- 150000001875 compounds Chemical class 0.000 title claims abstract description 34
- 239000013078 crystal Substances 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 36
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 35
- 239000010703 silicon Substances 0.000 claims abstract description 35
- 230000001678 irradiating effect Effects 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 8
- 230000007547 defect Effects 0.000 abstract description 5
- 230000002411 adverse Effects 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 5
- 238000002109 crystal growth method Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910005542 GaSb Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体結晶成長方法に
関し、特に、シリコン基板結晶上に高品質な化合物半導
体層を選択的に形成する方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor crystal growth method, and more particularly to a method for selectively forming a high quality compound semiconductor layer on a silicon substrate crystal.
【0002】[0002]
【従来の技術】GaAsをはじめとする化合物半導体を基板
とする素子は、シリコンを基板とする素子と比べ、発光
機能を有する等の有用性がある。シリコンなどの半導体
基板上にガリウム砒素などの化合物半導体をエピタキシ
ャル成長させた半導体ウェハは、OEIC(光電子集積回
路)や太陽電池、発光ダイオードの材料基板として有用
である。また、将来、光インターコネクションを前提と
した3次元LSI 等を構成する場合には、現在の素子の電
極パッドに相当する部分が、発光素子または受光素子と
なるため、論理素子と発光素子のモノリシック化は一層
重要度を増してくる。2. Description of the Related Art A device using a compound semiconductor such as GaAs as a substrate has usefulness such as having a light emitting function as compared with a device using silicon as a substrate. A semiconductor wafer obtained by epitaxially growing a compound semiconductor such as gallium arsenide on a semiconductor substrate such as silicon is useful as a material substrate for OEICs (photonic and electronic integrated circuits), solar cells, and light emitting diodes. Further, in the future, when configuring a three-dimensional LSI or the like on the premise of optical interconnection, the part corresponding to the electrode pad of the present element becomes a light emitting element or a light receiving element, so that a monolithic logic element and a light emitting element are used. Intensification is becoming more important.
【0003】現在は、論理素子・メモリー等の集積回路
はシリコン基板上に作成され、発光素子は化合物半導体
上に形成されるが、シリコン基板とその上に形成する化
合物半導体層では、格子定数または熱膨張係数が異なる
ため、エピタキシャル成長により形成した化合物半導体
層に欠陥が多く発生するという問題点があった。この欠
陥は結果として化合物半導体層に形成した素子の特性劣
化につながるため、これまで、この欠陥を低減するため
に、シリコン基板に局所的にGe等のイオン注入を行って
中間層を形成し、その中間層上に化合物半導体を形成す
ることによって、化合物半導体の結晶の高品質化を行う
方法が紹介されていた。At present, integrated circuits such as logic elements and memories are formed on a silicon substrate, and light emitting elements are formed on a compound semiconductor. However, in a silicon substrate and a compound semiconductor layer formed thereon, the lattice constant or Since the thermal expansion coefficients are different, there is a problem that many defects occur in the compound semiconductor layer formed by epitaxial growth. Since this defect results in deterioration of the characteristics of the element formed in the compound semiconductor layer, so far, in order to reduce this defect, ion implantation of Ge or the like is locally performed on the silicon substrate to form the intermediate layer, A method of improving the quality of the crystal of the compound semiconductor by forming the compound semiconductor on the intermediate layer has been introduced.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、Ge等の
イオン注入により中間層を形成する方法では、シリコン
基板の結晶回復のために、高温のアニールが必須となっ
ていたが、化合物半導体層以外のシリコン基板上に素子
を形成している場合には、シリコン基板を高温保持する
ことになり、ドーピングした不純物の再拡散を招き、結
局は、シリコン基板上に形成した素子の特性劣化または
動作不良につながるという問題点があった。However, in the method of forming the intermediate layer by ion implantation of Ge or the like, high temperature annealing is essential for crystal recovery of the silicon substrate, but other than the compound semiconductor layer. When the element is formed on the silicon substrate, the silicon substrate is kept at a high temperature, which causes the rediffusion of the doped impurities, and eventually the characteristics of the element formed on the silicon substrate deteriorates or malfunctions occur. There was a problem of being connected.
【0005】本発明は、上記問題点に鑑みなされたもの
で、その目的とするところは、シリコン基板上に形成し
た素子に熱的に悪影響を与えることなく、シリコン基板
上に形成する化合物半導体層の高品質化が図れる化合物
半導体の結晶成長方法を提供することにある。The present invention has been made in view of the above problems, and an object thereof is to provide a compound semiconductor layer formed on a silicon substrate without thermally adversely affecting an element formed on the silicon substrate. The object of the present invention is to provide a crystal growth method for a compound semiconductor, which can improve the quality of the compound semiconductor.
【0006】[0006]
【課題を解決するための手段】上記目的を達成するた
め、本発明の化合物半導体の結晶成長方法は、シリコン
基板上に局所的に中間層を形成する工程と、前記シリコ
ン基板が吸収せず前記中間層のみが吸収する波長の光を
照射して前記中間層のみを加熱し前記中間層上に化合物
半導体の結晶成長を行うことを特徴とするものである。In order to achieve the above object, a method for growing a compound semiconductor crystal according to the present invention comprises a step of locally forming an intermediate layer on a silicon substrate, and It is characterized in that the compound semiconductor is crystal-grown on the intermediate layer by irradiating with light having a wavelength absorbed by only the intermediate layer to heat only the intermediate layer.
【0007】[0007]
【作用】本発明は、シリコン基板上の化合物半導体層を
形成する領域に中間層を形成し、化合物半導体の結晶成
長を行う際に、中間層は吸収するが、シリコン基板は吸
収しない波長の光を照射することによって、中間層の部
分のみを加熱して中間層上のみに化合物半導体を結晶成
長させることを特徴とするものである。中間層のみが選
択的に加熱されるために、シリコン基板上に形成した素
子に熱的に悪影響を与えることなく、シリコン基板上の
所望の箇所に選択的に高品質な化合物半導体層を形成す
ることが可能となる。According to the present invention, when an intermediate layer is formed in a region where a compound semiconductor layer is formed on a silicon substrate and crystal growth of the compound semiconductor is performed, the intermediate layer absorbs light having a wavelength not absorbed by the silicon substrate. Is irradiated to heat only the portion of the intermediate layer so that the compound semiconductor is crystal-grown only on the intermediate layer. Since only the intermediate layer is selectively heated, a high-quality compound semiconductor layer is selectively formed at a desired position on the silicon substrate without thermally adversely affecting the element formed on the silicon substrate. It becomes possible.
【0008】[0008]
【実施例】図1の断面図に基づいて本発明の化合物半導
体の結晶成長方法の一実施例について説明する。まず、
シリコン基板1上に中間層となるGe層を電子ビーム蒸着
により形成した後、フォトリソグラフィー法により、Ge
を除去する位置に開口部を形成したレジスタをマスクと
して、Heを用いたイオンミリングにより、(a)に示す
ように、シリコン基板1上にGeの島(Ge層2)を形成す
る。EXAMPLE An example of the method for growing a compound semiconductor crystal according to the present invention will be described with reference to the sectional view of FIG. First,
A Ge layer, which will be an intermediate layer, is formed on the silicon substrate 1 by electron beam evaporation, and then a Ge layer is formed by photolithography.
As shown in (a), an island of Ge (Ge layer 2) is formed on the silicon substrate 1 by ion milling using He using a resistor having an opening formed at a position where the is removed as a mask.
【0009】次に、(b)に示すように、このGe層2上
のみに、化合物半導体層であるGaAs層3の形成を行う。
この場合、例えば、原料ガスとしてトリメチルガリウム
((CH3)3Ga)及びアルシン(AsH3)を用い、MOCVD (有
機金属気相成長法)による結晶成長を行う。結晶成長さ
せる際、Geは吸収するがSiは吸収しない波長の光をシリ
コン基板1に照射しながら行う。これにより、中間層で
あるGe層2のみを化合物半導体の成長に適切な温度に選
択的に加熱することができるので、Ge層2上のみにGaAs
層3を成長させることができる。Next, as shown in (b), the GaAs layer 3 which is a compound semiconductor layer is formed only on the Ge layer 2.
In this case, for example, trimethylgallium ((CH 3 ) 3 Ga) and arsine (AsH 3 ) are used as source gases, and crystal growth is performed by MOCVD (metal organic chemical vapor deposition). When the crystal is grown, the silicon substrate 1 is irradiated with light having a wavelength that absorbs Ge but does not absorb Si. As a result, only the Ge layer 2, which is the intermediate layer, can be selectively heated to a temperature suitable for growing the compound semiconductor.
The layer 3 can be grown.
【0010】この場合に照射する光の波長について詳述
する。常温( 300K とする)において、Ge及びSiが吸収
する光の最長の波長は、それぞれ、約1.88μm 、約1.11
μmであるが、Ge層2を選択的に加熱した場合でも、熱
伝導により、そのGe層2に近接するシリコン基板1の温
度が上昇する。これにより、シリコン基板1(Si)が吸
収する光の波長が変化するため、シリコン基板1の温度
上昇を考慮して、照射する光を選択する必要がある。例
えば、熱伝導により、シリコン基板1が400Kに温度上昇
した場合、シリコン基板1が吸収する光の最長の波長は
約1.13μm となるため、照射する光の波長は、およそ、
1.2 μm 以上1.8 μm 以下であることが必要となる。こ
の波長範囲の光(赤外線)による加熱により、基板温度
(Ge層2の温度)を 600〜 750℃の範囲の適正な値とし
たMOCVD 法を用いて、中間層であるGe層2上のみに、化
合物半導体層であるGaAs層3を選択的に形成することが
できる。The wavelength of the light emitted in this case will be described in detail. At room temperature (300K), the longest wavelengths of light absorbed by Ge and Si are about 1.88 μm and about 1.11, respectively.
Although the thickness is μm, even if the Ge layer 2 is selectively heated, the temperature of the silicon substrate 1 adjacent to the Ge layer 2 rises due to heat conduction. As a result, the wavelength of the light absorbed by the silicon substrate 1 (Si) changes, so it is necessary to select the light to be irradiated in consideration of the temperature rise of the silicon substrate 1. For example, when the temperature of the silicon substrate 1 rises to 400 K due to heat conduction, the longest wavelength of the light absorbed by the silicon substrate 1 is about 1.13 μm, so the wavelength of the light to be irradiated is about
It must be 1.2 μm or more and 1.8 μm or less. By heating with the light (infrared ray) in this wavelength range, the MOCVD method with the substrate temperature (the temperature of the Ge layer 2) set to an appropriate value in the range of 600 to 750 ° C. is used, and only on the Ge layer 2 as the intermediate layer. The GaAs layer 3 which is a compound semiconductor layer can be selectively formed.
【0011】なお、中間層を構成する材料としてGeをあ
げたが、GaSb等の薄膜を用いることも可能である。ま
た、実施例では、中間層であるGe層を電子ビーム蒸着に
より形成するとして説明したが実施例に限定されず、ス
パッタ法等を用いることが可能である。さらに、Geの島
をイオンミリング法を用いて形成すると説明したが、RI
E (反応性イオンエッチング)法等を用いることも可能
である。また、フォトリソグラフィー法を用いずに、金
属等のマスクにより蒸着部分を限定し、Geの島を形成す
る方法も有効である。また、化合物半導体層の結晶成長
の方法としてMOCVD 法を用いると説明したが、赤外線照
射によりGe中間層を加熱しながら、MBE (分子線エピタ
キシャル成長)法等を用いて成長させることも可能であ
る。Although Ge is mentioned as the material for the intermediate layer, it is also possible to use a thin film of GaSb or the like. Further, in the embodiment, the description has been made on the assumption that the Ge layer as the intermediate layer is formed by electron beam vapor deposition, but the invention is not limited to the embodiment, and a sputtering method or the like can be used. Furthermore, it was explained that the Ge islands were formed using the ion milling method.
It is also possible to use the E (reactive ion etching) method or the like. Further, it is also effective to use a mask of metal or the like to limit the vapor deposition portion to form Ge islands without using the photolithography method. Although the MOCVD method is used as the crystal growth method of the compound semiconductor layer, it is also possible to grow it using the MBE (molecular beam epitaxial growth) method or the like while heating the Ge intermediate layer by infrared irradiation.
【0012】[0012]
【発明の効果】以上に説明したように、本発明の化合物
半導体の結晶成長によれば、シリコン基板上の化合物半
導体層以外の部分に熱的に悪影響を与えることなく、シ
リコン基板上に、結晶欠陥の少ない高品質な化合物半導
体層を形成することが可能となる。As described above, according to the crystal growth of the compound semiconductor of the present invention, the crystal growth is performed on the silicon substrate without thermally adversely affecting the portion other than the compound semiconductor layer on the silicon substrate. It is possible to form a high quality compound semiconductor layer with few defects.
【図1】本発明の化合物半導体の結晶成長方法の一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing an example of a compound semiconductor crystal growth method of the present invention.
1 シリコン基板 2 Ge層(中間層) 3 GaAs層(化合物半導体層) 1 Silicon substrate 2 Ge layer (intermediate layer) 3 GaAs layer (compound semiconductor layer)
Claims (1)
する工程と、前記シリコン基板が吸収せず前記中間層の
みが吸収する波長の光を照射して前記中間層のみを加熱
し前記中間層上に化合物半導体の結晶成長を行うことを
特徴とする化合物半導体の結晶成長方法。1. A step of locally forming an intermediate layer on a silicon substrate, and a step of irradiating light having a wavelength not absorbed by the silicon substrate but absorbed by only the intermediate layer to heat only the intermediate layer. A method for growing a crystal of a compound semiconductor, which comprises performing crystal growth of a compound semiconductor on a layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12325995A JPH08316152A (en) | 1995-05-23 | 1995-05-23 | Crystal growing method for compound semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12325995A JPH08316152A (en) | 1995-05-23 | 1995-05-23 | Crystal growing method for compound semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08316152A true JPH08316152A (en) | 1996-11-29 |
Family
ID=14856144
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12325995A Withdrawn JPH08316152A (en) | 1995-05-23 | 1995-05-23 | Crystal growing method for compound semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08316152A (en) |
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|---|---|---|---|---|
| WO2001075953A1 (en) * | 2000-04-04 | 2001-10-11 | Matsushita Electric Industrial Co., Ltd. | Thin film manufacturing method and manufacturing apparatus, and thin-film transistor and manufacturing method |
| JP2002134426A (en) * | 2000-04-04 | 2002-05-10 | Matsushita Electric Ind Co Ltd | Thin-film manufacturing method and manufacturing apparatus, thin-film transistor and manufacturing method |
| WO2009084240A1 (en) * | 2007-12-28 | 2009-07-09 | Sumitomo Chemical Company, Limited | Semiconductor substrate, method for producing semiconductor substrate, and electronic device |
| WO2009084239A1 (en) * | 2007-12-28 | 2009-07-09 | Sumitomo Chemical Company, Limited | Semiconductor substrate, method for producing semiconductor substrate, and electronic device |
| WO2009084241A1 (en) * | 2007-12-28 | 2009-07-09 | Sumitomo Chemical Company, Limited | Semiconductor substrate, method for producing semiconductor substrate, and electronic device |
| JP2009177169A (en) * | 2007-12-28 | 2009-08-06 | Sumitomo Chemical Co Ltd | Semiconductor substrate and method for manufacturing semiconductor substrate |
| JP2009177167A (en) * | 2007-12-28 | 2009-08-06 | Sumitomo Chemical Co Ltd | Semiconductor substrate, semiconductor substrate manufacturing method, and electronic device |
| WO2009110207A1 (en) * | 2008-03-01 | 2009-09-11 | 住友化学株式会社 | Semiconductor substrate, semiconductor substrate manufacturing method, and electronic device |
| JP2010508676A (en) * | 2006-11-02 | 2010-03-18 | アイメック | Removal of impurities from semiconductor device layers |
| JP2011171548A (en) * | 2010-02-19 | 2011-09-01 | Nippon Telegr & Teleph Corp <Ntt> | Method of manufacturing semiconductor device |
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-
1995
- 1995-05-23 JP JP12325995A patent/JPH08316152A/en not_active Withdrawn
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|---|---|---|---|---|
| WO2001075953A1 (en) * | 2000-04-04 | 2001-10-11 | Matsushita Electric Industrial Co., Ltd. | Thin film manufacturing method and manufacturing apparatus, and thin-film transistor and manufacturing method |
| JP2002134426A (en) * | 2000-04-04 | 2002-05-10 | Matsushita Electric Ind Co Ltd | Thin-film manufacturing method and manufacturing apparatus, thin-film transistor and manufacturing method |
| US6913986B2 (en) | 2000-04-04 | 2005-07-05 | Matsushita Electric Industrial Co., Ltd. | Method and apparatus for fabricating a thin film and thin film transistor and method of fabricating same |
| JP2010508676A (en) * | 2006-11-02 | 2010-03-18 | アイメック | Removal of impurities from semiconductor device layers |
| JP2009177169A (en) * | 2007-12-28 | 2009-08-06 | Sumitomo Chemical Co Ltd | Semiconductor substrate and method for manufacturing semiconductor substrate |
| WO2009084241A1 (en) * | 2007-12-28 | 2009-07-09 | Sumitomo Chemical Company, Limited | Semiconductor substrate, method for producing semiconductor substrate, and electronic device |
| US8772830B2 (en) | 2007-12-28 | 2014-07-08 | Sumitomo Chemical Company, Limited | Semiconductor wafer including lattice matched or pseudo-lattice matched buffer and GE layers, and electronic device |
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| JP2009177170A (en) * | 2007-12-28 | 2009-08-06 | Sumitomo Chemical Co Ltd | Semiconductor substrate, semiconductor substrate manufacturing method, and electronic device |
| JP2009177165A (en) * | 2007-12-28 | 2009-08-06 | Sumitomo Chemical Co Ltd | Semiconductor substrate, semiconductor substrate manufacturing method, and electronic device |
| WO2009084239A1 (en) * | 2007-12-28 | 2009-07-09 | Sumitomo Chemical Company, Limited | Semiconductor substrate, method for producing semiconductor substrate, and electronic device |
| US8809908B2 (en) | 2007-12-28 | 2014-08-19 | Sumitomo Chemical Company, Limited | Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device |
| WO2009084240A1 (en) * | 2007-12-28 | 2009-07-09 | Sumitomo Chemical Company, Limited | Semiconductor substrate, method for producing semiconductor substrate, and electronic device |
| US20110012175A1 (en) * | 2007-12-28 | 2011-01-20 | Sumitomo Chemical Company, Limited | Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device |
| WO2009110207A1 (en) * | 2008-03-01 | 2009-09-11 | 住友化学株式会社 | Semiconductor substrate, semiconductor substrate manufacturing method, and electronic device |
| US8766318B2 (en) | 2008-03-01 | 2014-07-01 | Sumitomo Chemical Company, Limited | Semiconductor wafer, method of manufacturing a semiconductor wafer, and electronic device |
| JP2010021583A (en) * | 2008-03-01 | 2010-01-28 | Sumitomo Chemical Co Ltd | Semiconductor substrate, production process of semiconductor substrate, and electronic device |
| US8686472B2 (en) | 2008-10-02 | 2014-04-01 | Sumitomo Chemical Company, Limited | Semiconductor substrate, electronic device and method for manufacturing semiconductor substrate |
| US8709904B2 (en) | 2008-11-28 | 2014-04-29 | Sumitomo Chemical Company, Limited | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
| JP2011171548A (en) * | 2010-02-19 | 2011-09-01 | Nippon Telegr & Teleph Corp <Ntt> | Method of manufacturing semiconductor device |
| US9064928B2 (en) | 2010-09-02 | 2015-06-23 | National Semiconductor Corporation | Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates |
| US9082817B2 (en) | 2010-09-02 | 2015-07-14 | National Semiconductor Corporation | Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates |
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