JPH08893U - Liquid crystal display - Google Patents
Liquid crystal displayInfo
- Publication number
- JPH08893U JPH08893U JP1339294U JP1339294U JPH08893U JP H08893 U JPH08893 U JP H08893U JP 1339294 U JP1339294 U JP 1339294U JP 1339294 U JP1339294 U JP 1339294U JP H08893 U JPH08893 U JP H08893U
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- electrodes
- auxiliary capacitance
- liquid crystal
- crystal display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
(57)【要約】
【目的】 表示電極への充電不足に応じて、適正な補助
容量とすることにより、表示不良のない液晶表示装置を
提供する。
【構成】 補助容量電極(20)が複数の電極(21)
(22)から成っており、それらの電極と表示電極
(7)との重畳面積が電極(21)と電極(22)とで
異なっており、それら電極の連結部A、Bを所望の補助
容量とするために高エネルギー・ビームで切断可能であ
る液晶表示装置。
(57) [Abstract] [Purpose] To provide a liquid crystal display device having no display defect by providing an appropriate auxiliary capacitance in accordance with insufficient charging of a display electrode. [Configuration] Auxiliary capacitance electrode (20) has a plurality of electrodes (21)
(22), and the overlapping area of those electrodes and the display electrode (7) is different between the electrode (21) and the electrode (22). Liquid crystal display device that can be cut with a high-energy beam.
Description
【0001】[0001]
本考案は、アクティブマトリクス型液晶表示装置に関する。 The present invention relates to an active matrix type liquid crystal display device.
【0002】[0002]
アクティブマトリクス型液晶表示装置では、液晶とそれをはさんだ一対の電極 で構成される画素容量を薄膜トランジスタで充電し、液晶の配向状態を変えるこ とにより表示を行う。しかし、ゲート電極とソース電極の間に形成される寄生容 量が画素容量と直列に形成されているので、図3に示すように液晶に加わる電圧 が△V分低下する。この電圧の低下分(△V)は、画素容量に対する寄生容量の 比率が増加する程大きくなる。 In an active matrix type liquid crystal display device, a thin film transistor charges a pixel capacitance composed of a liquid crystal and a pair of electrodes sandwiching the liquid crystal, and the display is performed by changing the alignment state of the liquid crystal. However, since the parasitic capacitance formed between the gate electrode and the source electrode is formed in series with the pixel capacitance, the voltage applied to the liquid crystal is reduced by ΔV as shown in FIG. This decrease in voltage (ΔV) increases as the ratio of parasitic capacitance to pixel capacitance increases.
【0003】 そこで補助容量を画素容量と並列に形成することにより、電圧の低下分を小さ くする試みがある。前記補助容量を有した構造の薄膜トランジスタとして、例え ば特開昭60−110165号では、表示電極全面で補助容量を形成している。Therefore, there is an attempt to reduce the voltage drop by forming the auxiliary capacitance in parallel with the pixel capacitance. As a thin film transistor having a structure having the auxiliary capacitance, for example, in JP-A-60-110165, the auxiliary capacitance is formed on the entire surface of the display electrode.
【0004】[0004]
上述の如く、補助容量を有した構造のアクティブマトリクス型液晶表示装置は 、画素容量のみのものと比較して、充電するために、大きな電流が必要となる。 このため、特性不良で電流が不足した場合、いっそう充電の不足となり易い。 この場合液晶に加わる電圧が小さくなり、配向が不十分となるため、表示不良と なる問題が発生する。 As described above, the active matrix liquid crystal display device having the structure having the auxiliary capacitance needs a large current for charging as compared with the one having only the pixel capacitance. For this reason, when the current is insufficient due to poor characteristics, charging is more likely to be insufficient. In this case, the voltage applied to the liquid crystal becomes small and the alignment becomes insufficient, which causes a problem of display failure.
【0005】[0005]
本考案の液晶表示装置は、画素対応の表示電極を多数マトリクス状に配列し、 該表示電極に補助容量電極を対応させたアクティブマトリクス型液晶表示装置に 於て、画素対応の前記補助容量電極は複数の電極とこれら電極を連結する連結部 とからなるとともに、前記複数の電極のうち少なくとも1つの電極は前記表示電 極と重畳する面積が他の電極とは異なっており、かつ前記連結部は高エネルギー 線照射にて切断可能なものである。 The liquid crystal display device of the present invention is an active matrix type liquid crystal display device in which a large number of pixel-corresponding display electrodes are arranged in a matrix, and the display electrodes are associated with auxiliary capacitance electrodes. At least one electrode of the plurality of electrodes has an area overlapping with the display electrode different from that of the other electrodes, and the connecting portion has a plurality of electrodes and a connecting portion connecting the electrodes. It can be cut by irradiation with high energy rays.
【0006】[0006]
本考案の液晶表示装置によれば、面積の異なる補助容量電極を備えているため 、表示電極の充電不足に応じた補助容量電極を選択することができるとともに、 さらに高エネルギー・ビーム等を用いて補助容量電極の連結部を切断するだけで 、簡単に補助容量電極を分離できる。従って、所望とする補助容量に小さくでき 、このため表示電極への充電に必要な電流値は小さくなり充電の不足は解消され る。 According to the liquid crystal display device of the present invention, since the auxiliary capacitance electrodes having different areas are provided, it is possible to select the auxiliary capacitance electrode according to the insufficient charging of the display electrode, and by using the high energy beam or the like. The auxiliary capacitance electrode can be easily separated only by cutting the connecting portion of the auxiliary capacitance electrode. Therefore, the auxiliary capacitance can be reduced to a desired value, and thus the current value required for charging the display electrode is reduced, and the shortage of charging is eliminated.
【0007】[0007]
図1(a)、(b)に本考案の液晶表示装置の表示電極基板の1画素分の断面 構造及び平面構造を夫々示す。以下に、構造プロセス順に図1の構成を説明する 。ガラス基板(1)上にゲート電極(2)及び補助容量電極(20)を形成する 。次にプラズマCVD法にて、ゲート絶縁膜(3)、非晶質シリコン膜(4)、 パッシベーション絶縁膜(5)を連続形成した後に所定のパターンを形成する。 さらに、燐ドープn+非晶質シリコン膜(6)をプラズマCVD法にて形成した 後に所定のパターンを形成する。しかる後に、表示電極(7)及びドレイン・ソ ース電極(8)を形成し、ドレイン・ソース電極間のn+非晶質シリコン膜をエ ッチング除去する。1A and 1B respectively show a sectional structure and a planar structure for one pixel of a display electrode substrate of a liquid crystal display device of the present invention. The configuration of FIG. 1 will be described below in the order of the structural process. A gate electrode (2) and an auxiliary capacitance electrode (20) are formed on a glass substrate (1). Next, a gate insulating film (3), an amorphous silicon film (4) and a passivation insulating film (5) are successively formed by plasma CVD, and then a predetermined pattern is formed. Further, a phosphorus-doped n + amorphous silicon film (6) is formed by a plasma CVD method, and then a predetermined pattern is formed. Thereafter, the display electrode (7) and the drain / source electrode (8) are formed, and the n + amorphous silicon film between the drain and source electrodes is removed by etching.
【0008】 本考案が特徴とする補助容量は図1(b)に示したように、表示電極(7)と 隣接したゲート電極ライン(2’)から延長した補助容量電極(20)及び両電 極間に挟まれたゲート絶縁膜(3)から構成されている。As shown in FIG. 1B, the auxiliary capacitance featured by the present invention is an auxiliary capacitance electrode 20 extending from a gate electrode line 2'adjacent to a display electrode 7 and a dual capacitance. It is composed of a gate insulating film (3) sandwiched between the poles.
【0009】 而して、この補助容量電極(20)は、具体的には、ゲート電極ライン(2’ )に連結する第1の補助容量電極(21)と、該第1の電極(21)の両端部で 幅のせまい連結部A、Bによって連結された第2の補助容量電極(22)からな る。Thus, the auxiliary capacitance electrode (20) is, specifically, a first auxiliary capacitance electrode (21) connected to the gate electrode line (2 ′) and the first electrode (21). It comprises a second auxiliary capacitance electrode (22) connected by narrow connecting portions A and B at both ends.
【0010】 このとき、第1の補助容量電極(21)と第2の補助容量電極(22)は、そ れらの両電極(21)(22)と表示電極(7)との重畳面積、即ち有効面積が 異なっている。At this time, the first auxiliary capacitance electrode (21) and the second auxiliary capacitance electrode (22) have an overlapping area of both electrodes (21) (22) and the display electrode (7), That is, the effective area is different.
【0011】 この実施例の場合、第1及び第2補助容量電極(21)(22)間の2本の連 結部A、B位置上には表示電極(7)が切り欠かれた形状の凹部が位置している ので、これら連結部A、Bへの高エネルギー・ビーム、例えばレーザービームが 表示電極(7)に照射されず、連結部A、Bにのみ照射でき、これらを効率よく 分断できる。In the case of this embodiment, the display electrode (7) is cut out on the positions of the two connecting portions A and B between the first and second auxiliary capacitance electrodes (21) and (22). Since the concave portion is located, the display electrode (7) is not irradiated with the high-energy beam to the connecting portions A and B, for example, the laser beam, and only the connecting portions A and B can be irradiated. it can.
【0012】 従って、薄膜トランジスタの特性不良により、充電電流が不足した場合に、面 積の異なる第1の補助容量電極(21)と第2の補助容量電極(22)のうち、 所望とする補助容量に小さくできる補助容量電極を残して、上述の第1及び第2 の補助容量電極(21)(22)の連結部A、Bをレーザービームで切断し、有 効面積の大きい第2の補助容量電極(22)を分離する。これによって、第1の 補助容量電極(21)の補助容量だけが有効となり、レーザービーム切断前の全 補助容量の約1/2となる。Therefore, when the charging current is insufficient due to the characteristic defect of the thin film transistor, a desired auxiliary capacitance among the first auxiliary capacitance electrode (21) and the second auxiliary capacitance electrode (22) having different areas is obtained. The second auxiliary capacitance having a large effective area is obtained by cutting the connecting portions A and B of the first and second auxiliary capacitance electrodes (21) and (22) with a laser beam, leaving the auxiliary capacitance electrode that can be made small. Separate the electrodes (22). As a result, only the auxiliary capacitance of the first auxiliary capacitance electrode (21) becomes effective, which is about 1/2 of the total auxiliary capacitance before the laser beam cutting.
【0013】 本実施例においては、図1(b)に示す如く、補助容量電極22を補助容量電 極21よりも大きくしている。In this embodiment, as shown in FIG. 1B, the auxiliary capacitance electrode 22 is made larger than the auxiliary capacitance electrode 21.
【0014】 なお、本実施例においては補助容量電極が2つの場合について説明したが、必 ずしも2つに限定されるものではない。3つ以上の複数本の場合においても、図 1の補助容量電極22の下に連ねて配置すればよい。Although the case where the number of auxiliary capacitance electrodes is two has been described in this embodiment, the number of storage capacitance electrodes is not necessarily limited to two. Even in the case of a plurality of three or more, they may be arranged continuously under the auxiliary capacitance electrode 22 of FIG.
【0015】 [実施例2] 図2(a)、(b)に他の本考案実施例の断面構造及び平面構造をそれぞれ示 す。同図の場合も、ガラス基板(1)上に補助容量電極(20)を所定のパター ンで形成した後にプラズマCVD法で補助容量用絶縁膜(9)を形成する。次に 、ゲート電極(2)及び表示電極(7)を形成する。さらに、ゲート絶縁膜(3 )、非晶質シリコン膜(4)、パッシベーション絶縁膜(5)を連続形成した後 に、所定のパターンを形成する。さらに、燐ドープn+非晶質シリコン膜(6) をプラズマCVD法にて形成した後に所定のパターンを形成する。しかる後に、 表示電極とのコンタクト孔を開け、ドレイン・ソース電極(8)を形成し、ドレ イン・ソース電極間のn+非晶質シリコン膜をエッチング除去する。本実施例の 補助容量も図2(b)に示したように、表示電極(7)と補助容量電極(20) (第1の電極(21)と第2の電極(22)をもつ)及び両電極間に挟まれた補 助容量用絶縁膜(9)から構成されている。Embodiment 2 FIGS. 2A and 2B show a sectional structure and a planar structure of another embodiment of the present invention, respectively. Also in the case of the same figure, after forming the auxiliary capacitance electrode (20) on the glass substrate (1) by a predetermined pattern, the auxiliary capacitance insulating film (9) is formed by the plasma CVD method. Next, the gate electrode (2) and the display electrode (7) are formed. Further, after a gate insulating film (3), an amorphous silicon film (4) and a passivation insulating film (5) are continuously formed, a predetermined pattern is formed. Further, a phosphorus-doped n + amorphous silicon film (6) is formed by a plasma CVD method, and then a predetermined pattern is formed. Then, a contact hole with the display electrode is opened, a drain / source electrode (8) is formed, and the n + amorphous silicon film between the drain and source electrodes is removed by etching. As shown in FIG. 2B, the auxiliary capacitance of this embodiment also has a display electrode (7), an auxiliary capacitance electrode (20) (having a first electrode (21) and a second electrode (22)), and It is composed of a storage capacitor insulating film (9) sandwiched between both electrodes.
【0016】 本実施例が図1のそれと異なる点は、第1の補助容量電極(21)と第2の補 助容量電極との連結部A、Bに補助容量ライン(2)を接続しており、いずれの 電極(21)(22)でも任意の方を切り離す事ができる。従って、両電極(2 1)(22)の面積を異ならせておく事によって、いずれの電極(21)(22 )を切り離すかで設定容量値を選択できる事となる。The present embodiment is different from that of FIG. 1 in that the auxiliary capacitance line (2) is connected to the connecting portions A and B between the first auxiliary capacitance electrode (21) and the second auxiliary capacitance electrode. Any of the electrodes (21) and (22) can be separated. Therefore, by making the areas of both electrodes (21) (22) different, the set capacitance value can be selected depending on which electrode (21) (22) is cut off.
【0017】 また、本実施例が図1のそれと異なる点は、2個の薄膜トランジスタTFT1 、TFT2を並列配置したところにあり、一方のトランジスタTFT1が不良で 、充電に必要な電流が不足した時、連結部A、Bに加えて、TFT1周囲Cを高 エネルギー・ビーム等で切断し、特性不良の薄膜トランジスタTFT1を切り離 すことにより、寄生容量も低減できる。The difference of this embodiment from that of FIG. 1 is that two thin film transistors TFT1 and TFT2 are arranged in parallel, and when one transistor TFT1 is defective and the current required for charging is insufficient, In addition to the connecting portions A and B, the periphery C of the TFT 1 is cut by a high-energy beam or the like to cut off the thin film transistor TFT1 having poor characteristics, so that the parasitic capacitance can be reduced.
【0018】 なお、本実施例においては補助容量電極が2つの場合について説明したが、必 ずしも2つに限定されるものではない。3つ以上の場合においても、図2の補助 容量電極21の上又は22の下に連ねて配置すればよい。但し、補助容量電極の 連結部は表示電極に切り欠け部に設けるものとする。Although the case where the number of auxiliary capacitance electrodes is two has been described in the present embodiment, the number of storage capacitance electrodes is not necessarily limited to two. Even in the case of three or more electrodes, they may be arranged in series above or below the auxiliary capacitance electrode 21 in FIG. However, the connecting portion of the auxiliary capacitance electrode is provided in the notch in the display electrode.
【0019】[0019]
以上の如く、補助容量電極が複数の電極からなり、それらの電極のうち少なく とも1つの電極の面積が異なっており、所望の補助容量を得られるいずれかの電 極を選択し、他の補助容量電極を高エネルギー・ビームによって切り離すため、 極めて容易に設定容量値を選択することが可能である。 As described above, the auxiliary capacitance electrode is composed of a plurality of electrodes, and at least one of the electrodes has a different area. Therefore, one of the electrodes that can obtain a desired auxiliary capacitance is selected and the other auxiliary capacitance is selected. Since the capacitive electrode is separated by the high energy beam, it is possible to select the set capacitance value very easily.
【図1】本考案の液晶表示装置の表示電極基板の断面図
及び平面図である。FIG. 1 is a cross-sectional view and a plan view of a display electrode substrate of a liquid crystal display device of the present invention.
【図2】本考案装置の他の実施例の断面図及び平面図で
ある。FIG. 2 is a sectional view and a plan view of another embodiment of the device of the present invention.
【図3】電圧波形図である。FIG. 3 is a voltage waveform diagram.
20 補助容量電極 21 第1の補助容量電極 22 第2の補助容量電極 20 auxiliary capacitance electrode 21 first auxiliary capacitance electrode 22 second auxiliary capacitance electrode
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成7年12月20日[Submission date] December 20, 1995
【手続補正1】[Procedure Amendment 1]
【補正対象書類名】図面[Document name to be corrected] Drawing
【補正対象項目名】全図[Correction target item name] All drawings
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図1】 FIG.
【図2】 [Fig. 2]
【図3】 [Figure 3]
Claims (2)
に配列し、該表示電極に補助容量電極を対応させたアク
ティブマトリクス型液晶表示装置に於て、画素対応の前
記補助容量電極は複数の電極とこれら電極を連結する連
結部とからなるとともに、前記複数の電極のうち少なく
とも1つの電極は前記表示電極と重畳する面積が他の電
極とは異なっており、かつ前記連結部は高エネルギー線
照射にて切断可能である事を特徴とする液晶表示装置。1. In an active matrix liquid crystal display device in which a large number of pixel-corresponding display electrodes are arranged in a matrix, and the display electrodes are associated with auxiliary capacitance electrodes, the pixel-corresponding auxiliary capacitance electrodes are a plurality of electrodes. And at least one electrode of the plurality of electrodes has an area overlapping with the display electrode different from that of the other electrodes, and the connection portion is irradiated with high energy rays. A liquid crystal display device characterized in that it can be cut with.
特徴とする請求項1記載の液晶表示装置。2. The liquid crystal display device according to claim 1, wherein the auxiliary capacitance electrode comprises two electrodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1339294U JPH08893U (en) | 1994-10-28 | 1994-10-28 | Liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1339294U JPH08893U (en) | 1994-10-28 | 1994-10-28 | Liquid crystal display |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08893U true JPH08893U (en) | 1996-05-31 |
Family
ID=11831842
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1339294U Pending JPH08893U (en) | 1994-10-28 | 1994-10-28 | Liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08893U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006064832A1 (en) * | 2004-12-16 | 2006-06-22 | Sharp Kabushiki Kaisha | Active matrix substrate, method for manufacturing active matrix substrate, display, liquid crystal display and television system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01267520A (en) * | 1988-04-19 | 1989-10-25 | Seiko Epson Corp | Display device |
| JPH01303415A (en) * | 1988-06-01 | 1989-12-07 | Matsushita Electric Ind Co Ltd | Liquid crystal display device |
| JPH02108028A (en) * | 1988-10-17 | 1990-04-19 | Sharp Corp | matrix display device |
-
1994
- 1994-10-28 JP JP1339294U patent/JPH08893U/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01267520A (en) * | 1988-04-19 | 1989-10-25 | Seiko Epson Corp | Display device |
| JPH01303415A (en) * | 1988-06-01 | 1989-12-07 | Matsushita Electric Ind Co Ltd | Liquid crystal display device |
| JPH02108028A (en) * | 1988-10-17 | 1990-04-19 | Sharp Corp | matrix display device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006064832A1 (en) * | 2004-12-16 | 2006-06-22 | Sharp Kabushiki Kaisha | Active matrix substrate, method for manufacturing active matrix substrate, display, liquid crystal display and television system |
| JPWO2006064832A1 (en) * | 2004-12-16 | 2008-06-12 | シャープ株式会社 | Active matrix substrate, manufacturing method of active matrix substrate, display device, liquid crystal display device, and television device |
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