JPH09102743A - Information signal encoding device and method and information signal decoding method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To further reduce the quantity of data to be sent when the residual signals produced via the estimated encoding are quantized and transmitted. SOLUTION: The residual signals which are produced when the input digital information signals undergo the estimated encoding are turned into blocks, and the maximum value MAX and the minimum value MIN of every block are detected. A mode decision circuit 5 decides a quantization mode based on a fact whether the level range of both value MAX and MIN covers 0. Then a mode signal MODE is produced to instruct a mode. If the level range covers 0, a 1st quantization mode is selected. Then a 2nd quantization mode is selected if the level range does not cover 0. A quantization circuit 6 performs the normal quantization in the 1st quantization mode and then performs the code conversion to decrease the number of quantization output bits in the 2nd quantization mode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information signal coding apparatus, a coding method and an information signal decoding method for reducing the amount of generated data of digital information signals such as digital audio signals and digital image signals. .

[0002]

2. Description of the Related Art Predictive coding is known in order to reduce the amount of transmitted information such as digital audio signals and digital image signals. For example, the one-dimensional DPCM forms the difference (residual) between the input sample value and the predicted value in the temporal or spatial directions, and the two-dimensional DPCM forms the residual difference between the input sample value and the predicted value in the spatial direction. . Since the digital information signal has the correlation in the time direction and the space direction, the level of the residual signal becomes smaller than the sample value. Therefore, the residual signal can be requantized with a smaller number of bits than the original number of quantization bits, thereby compressing the amount of information.

As a quantizer for a residual signal, a non-linear quantizer is known in which the quantizer step width near 0 is made fine and the quantizer step width becomes coarser as the level increases. A conventional quantizing device including this non-linear quantizing targets all levels of a residual signal that can be generated as a quantizing object. For example, when one sample (one pixel) of the digital image signal is quantized to 8 bits, the residual signal may have a value of (-255 to +255). In the conventional quantizer, this entire range is targeted for quantization.

[0004]

The conventional quantizer has the following problems.
Since the entire range of residual signals that can be generated is targeted for quantization, when the number of quantization bits is reduced, the quantization accuracy decreases, and the amount of generated data increases when the number of quantization bits increases. was there. As a result, there is a problem that an audio signal and an image signal of sufficient quality cannot be obtained when decoding.

Therefore, an object of the present invention is to provide an information signal coding apparatus, a coding method, and a decoding method capable of further reducing the data amount of the quantized output when quantizing a residual signal. It is in. That is, when the residual signal is divided into blocks and the level range of the residual signal for each block satisfies a certain condition, the quantization mode is switched so as to reduce the number of quantization bits.

[0006]

According to a first aspect of the present invention, in an information signal coding apparatus for coding an input digital information signal so as to reduce the amount of generated data, the residual difference between sample values of the input digital information signal. Means for generating a signal, means for blocking the residual signal, means for detecting a maximum value and a minimum value for each blocked residual signal, and a residual signal for each block from the maximum value and the minimum value Determines whether the level range crosses over 0, and indicates the first quantization mode when the level range crosses 0, and indicates the second quantization mode when the level range does not cross 0. And the first quantization mode, the residual signal is quantized with a predetermined number of bits smaller than the original number of bits, and the second quantization mode uses a number of bits smaller than the original number of bits. Residual signal Quantizing means for quantizing and reducing the number of bits by code conversion; transmitting means for transmitting information for identifying the first and second quantizing modes; and an output of the quantizing means It is an information signal encoding device characterized by comprising.

According to a third aspect of the present invention, in an information signal coding method for coding an input digital information signal so as to reduce the amount of generated data, a step of generating a residual signal between sample values of the input digital information signal. , The step of dividing the residual signal into blocks, the step of detecting the maximum value and the minimum value for each of the blocked residual signals, and the level range of the residual signal for each block being 0 from the maximum value and the minimum value. And a step of deciding whether to straddle, instructing the first quantization mode when the level range crosses 0, and instructing the second quantization mode when the level range does not cross 0. In the first quantization mode, the residual signal is quantized with a predetermined number of bits smaller than the original number of bits, and in the second quantization mode, the residual signal is quantized with a number of bits smaller than the original number of bits. With quantizing the steps of quantizing to further reduce the number of bits by the code conversion,
An information signal coding method comprising: a step of transmitting information for identifying the first and second quantization modes and a step of transmitting an output of the quantization means.

According to a fourth aspect of the present invention, an information signal coding apparatus is configured to form at least first and second hierarchical data from an input digital information signal, and code and transmit the first and second hierarchical data. , Means for forming second hierarchical data having a resolution lower than that of the first hierarchical data, means for predicting the first hierarchical data from the second hierarchical data, the predicted data and the first hierarchical data A means for forming a residual signal, a means for blocking the residual signal, a means for detecting a maximum value and a minimum value for each of the blocked residual signals, and a block for each block from the maximum value and the minimum value. Determine whether the level range of the residual signal crosses 0, and indicate the first quantization mode when the level range crosses 0, and the second quantization mode when the level range does not cross 0. Activation mode Mode determining means and the first quantization mode, the residual signal is quantized with a predetermined number of bits smaller than the original number of bits, and the second quantization mode uses a smaller number of bits than the original number of bits. Quantizing the residual signal and transmitting a quantizing means adapted to reduce the number of bits by code conversion, information for identifying the first and second quantizing modes, and an output of the quantizing means. And an information signal encoding device.

According to a fifth aspect of the present invention, an information signal coding method for forming at least first and second hierarchical data from an input digital information signal and coding and transmitting the first and second hierarchical data. In the step of forming second hierarchical data having a lower resolution than the first hierarchical data, a step of predicting the first hierarchical data from the second hierarchical data, the predicted data and the first hierarchical data And a step of forming a residual signal into blocks, a step of blocking the residual signal, a step of detecting a maximum value and a minimum value for each blocked residual signal, and a step of calculating the maximum value and the minimum value for each block. Determines whether the level range of the residual signal crosses over 0, indicates the first quantization mode when the level range crosses over 0, and determines the second quantization mode when the level range does not cross over 0. A step of mode decision instructing the quantization mode, the first quantization mode, a predetermined number of bits less than the number of original bits, quantizing the residual signal,
In the second quantization mode, the residual signal is quantized with a number of bits smaller than the original number of bits, and the number of bits is reduced by code conversion.
And an information signal encoding method, which comprises information for identifying a second quantization mode and a transmission step for transmitting a quantized output.

According to the invention of claim 6, the information for identifying the first and second quantization modes and the information of the residual signal are transmitted, and in the first quantization mode, the residual signal has the original bit. Is quantized with a number of bits smaller than the number of bits, and in the second quantization mode, the residual signal is quantized with a number of bits smaller than the original number of bits, and coded to reduce the number of bits by code conversion. In the information signal decoding method for decoding the generated data, the data is inversely quantized in the first quantization mode and the data is code-converted and inverse quantized in the second quantization mode based on the identification information. And a step of decomposing the dequantized residual signal into blocks and converting them into the original order.

By increasing the concentration degree of the level distribution of the residual signal, the residual signal can be requantized with the number of bits smaller than the original number of quantization bits. Further, when the distribution of the residual signal satisfies a certain condition, the residual signal can be quantized with a smaller number of bits.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In this one embodiment, the video signal is sampled at a predetermined sampling frequency,
The present invention is applied to a digital image signal in which each sample is converted into a predetermined number of quantization bits. FIG.
Shows the overall system configuration of an embodiment of the present invention.

In FIG. 1, a digital video signal is supplied to an input terminal 121. Input signal is subtractor 1
23, the output (residual signal) of the subtractor 123 is supplied to the blocking circuit 124 and the predictor 122, and the prediction signal generated by the predictor 122 is supplied to the subtractor 123. The subtractor 123 subtracts the prediction signal from the input signal to generate a prediction residual. This residual signal is supplied to the blocking circuit 124, and converted from raster scan order data to block order data. The blocked residual signal is supplied to the encoding unit 125.

The quantizer circuit in the encoding unit 125 is
As will be described later, the first quantization mode and the second quantization mode are switched according to the frequency distribution of the blocked residual signal. For example, when the number of bits of the residual signal is 8 bits, a 3-bit quantized output is generated from the encoding unit 125 when the first quantization mode is selected. When the second quantization mode is selected, the code conversion table in the encoding unit 125 produces a quantized output converted to 2 bits.

The encoded output of the encoding unit 125 is supplied to the error correction code encoder 126, and the redundant code of the error correction code is added. The output of the error correction code encoder 126 is supplied to the modulator 127. Modulator 1
Reference numeral 27 modulates the digital signal into a form suitable for recording, transmission and the like. The output signal from the modulator 127 is supplied to the recording unit 128, and the recording unit 128 records the recording signal on the information signal recording medium 129. It is also possible to transmit data via the transmission path 130, in which case a transmission unit is used instead of the recording unit 128. A mode signal indicating the quantization mode is also recorded or transmitted together with the coded residual signal. The information signal recording medium 129 is a disk-shaped or tape-shaped recording medium that uses magnetism, magneto-optical property, phase change, or the like. A semiconductor memory is also a kind of recording medium.

The reproduction unit 131 reproduces the data from the recording medium 129, or the data transmitted through the transmission path 130 is received. The data reproduced by the reproduction unit 131 is demodulated by the demodulation unit 132, and the demodulated output is supplied to the error correction code decoder 133. The decoder 133 corrects the error by using the redundant code, and also corrects the error that cannot be corrected and remains.

The output of the error correction decoder 133 is supplied to the decoding unit 134. Decoding unit 134
As will be described later, performs inverse quantization processing for converting the quantized output into a representative value (quantization restored value), which is the reverse of the encoding unit 125. The dequantization circuit in the decoding unit 134 performs dequantization processing according to the quantization mode indicated by the mode signal. A decoded residual signal is generated from the decoding unit 134. This decoded residual signal is supplied to the block decomposition circuit 135. Block decomposition circuit 13
At 5, the block structure is returned to the raster scan order.

The decoded residual signal is supplied to the adder circuit 136. A decoded image signal is formed by the adder circuit 136 and is output to the output terminal 137. The decoded image signal is also supplied to the predictor 138 to generate a predicted signal. The prediction signal is supplied to the adder circuit 136.

FIG. 2 shows an example of the encoding unit 125. The blocked residual signal from the blocking circuit 124 is supplied to the input terminal 1. FIG. 3 schematically shows the formation of the residual signal. One rectangular area in FIG. 3 corresponds to one pixel. Each of a to h indicates a locally decoded pixel value, and each of A to P indicates a pixel value before being encoded. Predicted value A'for pixel value A
Are generated by the predictor 122 using locally decoded pixel values in the vicinity. For example, the predicted value A'is A '= 4c-3
(B−f), A ′ = f + c−b, and the like. Prediction values for the pixel values B, C, ... Are calculated by the same prediction formula. Expressed by a general formula, the predicted value is generated by (αa + βb + γf, where α, β, and γ are constants).

The subtractor 123 subtracts the predicted value (eg A ') from the pixel value (eg A) to generate the residual signal Δa. Similarly, residual signals Δb, Δc, ... Are generated. The blocking circuit 124 converts the generated residual signal into a block structure. For example, by the blocking circuit 124, (4
Data of the blocks of the residual signals Δa to Δp corresponding to the block of (4) are formed. When handling a digital audio signal, a prediction value in the time direction is formed,
A block of one-dimensional residual signals is formed.

It is possible to increase the degree of concentration by blocking the level range of the residual signal. In the case where one pixel is 8-bit data, the distribution of the frequency of occurrence of the residual signal in the entire one screen is centered at 0 (-255 to -255).
+255), and the frequency with a residual of 0 is the maximum. However, when divided into blocks,
The residual frequency distribution is more concentrated than the original distribution.

This is because the residual in the block of the small space has a large value in probability as compared with one screen, and
This is also due to the strong residual correlation within the block. Therefore, the blocked residual signal can be requantized with a bit number smaller than the original quantization bit number. Also, in the distribution of the blocked residual signal,
The frequency with a value of 0 is not always the maximum. For example, when the brightness level gradually changes in a block, for example, in a diagonal direction, a distribution in which the value of 0 is not maximum occurs. Note that blocking is an example of a method of increasing the degree of concentration of the distribution of the residual signal, and other methods are also possible.

Returning to FIG. 2, the encoding unit 125 will be described. The residual signal from the input terminal 1 is supplied to the maximum value detection circuit 2, the minimum value detection circuit 3, and the delay circuit 4.
The maximum value detection circuit 2 detects the maximum value MAX for each block, and the minimum value detection circuit 3 detects the minimum value M for each block.
IN is detected. The detected maximum value MAX and minimum value MIN are supplied to the mode determination circuit 5.

The mode decision circuit 5 is supplied with the blocked residual signal, the maximum value MAX and the minimum value MIN, and based on the level range of the residual signal of the block,
Quantization mode is determined, and signal MOD indicating the mode
E (eg 1 bit) is generated. Mode signal MOD
E is supplied to the quantizing circuit 6, and the residual signal from the input terminal 1 is supplied to the quantizing circuit 6 via the delay circuit 4 for phase matching. In the quantization circuit 6, the residual signal is requantized with a quantization bit number smaller than the original quantization bit number (for example, 8 bits). In the quantization circuit 6, the first and second quantization modes are the mode signal M
Selected according to ODE.

The first quantization mode is to requantize an 8-bit residual signal to reduce the number of quantization bits, for example, 3
A conventional one that produces a quantized output of bits. The second quantization mode is applied when the level range of the blocked residual signal does not cross 0. In this embodiment, the second quantization mode is applied when the minimum value MIN of the residual signal is larger than (Δ / 2). Here, Δ is DR / DR, where n is the number of requantization bits.
It is a quantization step calculated by 2 ⁿ . DR is a dynamic range and can be calculated by (MAX-MIN).

In the second quantization mode, as in the first quantization mode, the code signal generated by requantization (for example, 3
Bit) is converted according to a predetermined rule and converted into a quantized output having a smaller number of bits, for example, 2 bits. The code conversion rule for converting a 3-bit code into a 2-bit quantized output is shown below. 100-00 101-01 01 110-10 111-11

The quantization process will be described with reference to FIG. As described above, the residual signal generated by the predictive coding has the maximum frequency of a value of 0 when viewed in one frame as a whole. However, as shown in FIG. 4A, the residual signal varies depending on the block. Have a bias. FIG.
A shows the distribution of the residual signal biased to the negative side, the distribution of the residual signal whose maximum frequency matches the value of 0, and the distribution of the residual signal biased to the positive side.

FIG. 4B shows the frequency distribution of the residual signal that crosses over the value of 0. When quantizing the residual signal, for example, 2 ³ = 8 is divided between MAX and MIN, and the same code is assigned to the residual signal belonging to that range. When the code is restored, it is converted to a representative value in the middle of the range. Generally, when the number of bits of the code is n, MAX and MIN are divided into 2 ⁿ number ranges. Such quantization is the first quantization mode.

FIG. 4C shows an example of the frequency distribution of the blocked residual signal. That is, in FIG. 4C, the minimum value MI
A distribution 30a in which N is equal to Δ / 2, a distribution 30b that crosses 0 (indicated by a broken line), and a distribution 30c in which the maximum value MAX is equal to −Δ / 2 (indicated by a broken line) as in FIG. 4B. It is shown. In this embodiment, when the condition of (MIN ≧ Δ / 2) is satisfied as in the frequency distribution 30a, the second quantization mode is applied, and the code as described above is used in the second quantization mode. The conversion is done. On the decoding side, reverse code conversion from 2 bits to 3 bits is performed, and the 3-bit code is dequantized.

For example, when the residual signal having the frequency distribution 30a in FIG. 4C is quantized in the second quantization mode, M
Quantized output of 100 to 111 in the range of IN to MAX is 0
It is converted into a quantized output of 0 to 11. On the decoding side, on the contrary, the quantized output of 00 to 11 is converted into the code of 100 to 111. This converted 3-bit code is generated in the same manner as the 3-bit quantized output generated in the first quantization mode.
Inverse quantization can be performed by converting to a representative value.

Unlike the embodiment of the present invention, when the maximum value MAX of the residual signal of the block is smaller than −Δ / 2 (for example, the frequency distribution 30c in FIG. 4C), the second quantization mode is applied. You can Furthermore, the minimum value M
The second quantization mode may be applied when IN is (MIN ≧ 0) or when the maximum value MAX is (MAX ≦ 0).

FIG. 5 shows an example of the quantizing circuit 6. A blocked residual signal is supplied from the delay circuit 4 to the input terminal indicated by 15. The input residual signal is supplied to the input terminal of the switching circuit 16 which is switched by the mode signal MODE. The output terminals a and b of the switching circuit 16 are connected to quantizers 17a and 17b, respectively, which generate, for example, 3-bit outputs. The code conversion circuit 18 is connected to the quantizer 17b.
The code conversion circuit 18 is a circuit for converting 3 bits into 2 bits as described above. Quantizer 17a or 17
The output of b is taken out to the output terminal 19.

When the residual signal of the block is (MIN ≧ Δ / 2) by the mode decision circuit 5, the mode signal MODE indicates the second quantization mode, while otherwise. , The mode signal MODE indicates the first quantization mode. The output terminal a of the switching circuit 16 is selected in the first quantization mode, and the output terminal b of the switching circuit 16 is selected in the second quantization mode. Therefore, in the first quantization mode,
A 3-bit quantized output is generated at the output terminal 19, and a 2-bit quantized output is generated at the output terminal 1 in the second quantization mode.
9 occurs. The quantizers 17a and 17b may be shared.

Returning to FIG. 2, the output of the quantizing circuit 6 is supplied to the bit plane encoding circuit 7. The bit plane encoding circuit 7 converts the code q of n bits, for example, 2 bits into the MSB (most significant bit) plane and the LSB.
Divide into the (least significant bit) plane. The MSB plane is a set of supplied 2-bit quantized MSBs, and the LSB plane is a set of LSBs. FIG. 6A
For simplicity, one screen is composed of (4 × 3 = 12 blocks), and each block includes a code q of a (4 × 4) residual signal.

In FIG. 6A, the values 0, 1, 2, and 3 of the code q shown as an example are 2 bits each ((0
It means 0), (01), (10) and (11). FIG.
In the example of A, the bit plane encoding circuit 7 divides the code q of one screen into an MSB plane and an LSB plane, as shown in FIG. 6B. When the quantization bit number is 3 bits, an intermediate bit plane is further formed. In one embodiment of the present invention, two quantization modes produce a two-bit or three-bit quantized output. When forming a bit plane, the number of bits of the quantized output needs to be known. Therefore, the mode signal MODE is supplied to the bit plane encoding circuit 7.

Each bit plane generated by the bit plane coding circuit 7 is supplied to the variable length coding circuit 8, and each bit plane is variable length coded. In the variable length coding circuit 8, run length coding, for example, MMR (Modefied MR) is performed for each bit plane. The output of the variable length coding circuit 8 is supplied to the framing circuit 9. The above-described mode signal MODE is also supplied to the framing circuit 9. To the output terminal 10 of the framing circuit 9, the mode signal MODE and the variable length code are output as data having a predetermined frame structure.

Next, an example of the decoding unit 134 in FIG. 2 will be described with reference to FIG. The reproduced or received data from the error correction decoder 133 is supplied to the input terminal 31 of the decoding unit 134. The frame decomposition circuit 32 separates the code of the variable-length encoded residual signal from the mode signal MODE. The code of the separated residual signal is decoded by the variable length decoding circuit 33. The variable length decoding circuit 33 includes the variable length coding circuit 1
Corresponds to 3. The decoded output of the variable length decoding circuit 33 is supplied to the bit plane decoding circuit 34, and the bit planes are combined. In this case, the separated mode signal M
With ODE, the bit planes are combined correctly.

The output of the bit plane decoding circuit 34 is supplied to the input terminal of the switching circuit 35. The switching circuit 35 is controlled by the mode signal MODE. When the mode signal MODE indicates the first quantization mode, the output terminal a of the switching circuit 35 is selected, and when this indicates the second quantization mode,
The output terminal b of the switching circuit 35 is selected. At the output terminal a, dequantize a 3-bit quantization code,
An inverse quantizer 36a that generates a quantization restoration value is connected. A code conversion circuit 37 for converting a 2-bit quantized output into a 3-bit code is connected to the output terminal b,
The inverse quantizer 36b is connected to the code conversion circuit 37. The inverse quantizer 36b converts the 3-bit code into a restored value, like the inverse quantizer 36a.

The restored values generated by the inverse quantizers 36a and 36b, that is, the blocked decoded residual signals are taken out to the output terminal 38. The decoded residual signal extracted at the output terminal 38 is supplied to the block decomposition circuit 135 (see FIG. 1). The inverse quantizers 36a and 36b may be shared.

Next, another embodiment in which the present invention is applied to hierarchical coding will be described. The hierarchical coding apparatus described here can prevent an increase in the number of pixels to be coded by performing prediction between layers and using a simple arithmetic expression for inter-layer data.

This hierarchical coding method will be described with reference to FIG. FIG. 8 shows, as an example, a schematic diagram between four layers, where the first layer is the lowest layer (original image) and the fourth layer is the highest layer. For example, when the average value of spatially corresponding lower layer data of four pixels is adopted as the upper layer data generation method, the number of transmission pixels can be prevented from increasing.

That is, assuming that the upper layer data is M and the lower layer pixel values are x ₀ , x ₁ , x ₂ , x ₃ , M = 1/4 · (x ₀ + x ₁ + x ₂ + x ₃ ) It is formed. And data M and 4
Of the data, three data other than x ₃ , for example, are transmitted. On the receiving or reproducing side, the non-transmitted pixel x ₃ can be easily restored by a simple arithmetic expression: x ₃ = 4 · M− (x ₀ + x ₁ + x ₂ ). In FIG. 8, hatched rectangles indicate non-transmission pixels.

FIG. 9 shows a structure of, for example, five layers of hierarchical coding using the above-described averaging. It is assumed that the first layer is the resolution level of the input image. The block size of the first layer is (1 × 1). The second layer data is the first
It is generated by averaging four pixels of hierarchical data. In this example, the second layer data X ₂ (0) is generated by the average value of the first layer data X ₁ (0) to X ₁ (3). X ₂
Second layer data X ₂ (1) to X ₂ adjacent to (0)
Similarly, (3) is generated by averaging four pixels of the first layer data. The block size of the second layer is (1/2 ×
1/2).

Further, the third hierarchical data is generated by averaging four pixels of the spatially corresponding second hierarchical data. The block size of the third layer is (1/4 × 1/4). Similarly, the data of the fourth layer is also generated from the data of the third layer. The block size of this fourth layer is
(1/8 × 1/8). Finally, the fifth layer data X ₅ (0), which is the highest layer, is the fourth layer data X ₄ (0).
Is generated by the average value of X ₄ (3). The block size of the fifth layer is (1/16 × 1/16).

By applying the class classification adaptive prediction to the upper layer data with respect to the hierarchical structure data in which the increase in the number of pixels to be encoded is prevented, the lower layer data is predicted,
It is possible to reduce the amount of transmission data by generating the difference between the lower layer data and its predicted value (that is, the residual signal). FIG. 10 shows such an encoding unit. The first layer data d0 is supplied to the averaging circuit 42 and the subtractor 46 as the input image data d0 via the input terminal 41. The first layer data is the image data of the original resolution.

The averaging circuit 42 performs 1/4 averaging processing on the input pixel data d0 to generate hierarchical data d1. This hierarchical data d1 corresponds to the second hierarchical data shown in FIG. The generated hierarchical data d1 is supplied to the averaging circuit 43 and the subtractor 47.

The averaging circuit 43 is applied to the hierarchical data d1.
Then, processing similar to that of the averaging circuit 42 is performed to generate hierarchical data d2. This hierarchical data d2 corresponds to the third hierarchical data. The generated hierarchical data d2 is supplied to the averaging circuit 44 and the subtractor 48. Similarly, the averaging circuit 44 also performs a quarter averaging process on the hierarchical data d2 to generate hierarchical data d3. This hierarchical data d3 corresponds to the fourth hierarchical data. The generated hierarchical data d3 is used in the averaging circuit 45 and the subtractor 49.
Supplied to Further, the averaging circuit 45 similarly similarly performs the quarter averaging process on the hierarchical data d3 to generate hierarchical data d4. This hierarchical data d4 corresponds to the fifth hierarchical data. The generated hierarchical data d4 is supplied to the quantizer 54.

Then, prediction is performed between layers for these five hierarchical data. First, the quantization process for compression performed in the fifth layer is performed by the quantizer 54. The output data d21 of the quantizer 54 is supplied to the variable-length code encoder 71 and also to the inverse quantizer 58. The output of the encoder 71 is taken out to the output terminal 76 as data of the fifth layer. Output data d of the inverse quantizer 58 to which the encoded data d21 is supplied
16 is supplied to the class classification adaptive prediction circuit 62.

In the class classification adaptive prediction circuit 62, a prediction process is performed using the data d16 to generate a prediction value d12 of the fourth hierarchical data, and the prediction value d12 is used as the prediction value d12.
9. In the subtractor 49, the averaging circuit 44
The difference value between the hierarchical data d3 supplied from the above and the predicted value d12 is obtained, and the difference value d8 is supplied to the quantizer 53.

The quantizer 53, to which the difference value d8 is supplied, performs requantization so as to reduce the number of quantization bits as in the quantizer 54. The output data of the quantizer 53 is supplied to the calculator 66 and the inverse quantizer 57.
The arithmetic unit 66 performs a process of thinning out one pixel from four pixels. The data d20 output from the arithmetic unit 66 is encoded by the encoder 70 of the variable length code, and the encoder 7
The output of 0 is taken out to the output terminal 75 as the output data of the fourth layer.

The fourth layer data d12 predicted by the class classification adaptive prediction circuit 62 and the output data (decoded residual signal) d15 of the inverse quantizer 57 are supplied to the class classification adaptive prediction circuit 61. In the class classification adaptive prediction circuit 61,
By adding the data d15 to the data d12, local decoded data of the fourth layer is formed, the prediction process is performed using this local decoded data, and the predicted value d11 of the third layer data is generated. Predicted value d11
Are supplied to the subtractor 48. The subtractor 48 obtains the difference value between the data d2 supplied from the averaging circuit 43 and the predicted value d11, and the difference value d7 is supplied to the quantizer 52.

The output data of the quantizer 52 to which the difference value d7 is supplied is supplied to the calculator 65 and the inverse quantizer 56. The computing unit 65 performs a process of thinning out one pixel from four pixels. The third layer data d19 output from the calculator 65 is supplied to the encoder 69 of the variable length code, and the output of the encoder 69 is taken out to the output terminal 74 as the third layer data.

The third layer data d11 predicted by the class classification adaptive prediction circuit 61 and the output data d14 of the dequantizer 56 to which the coded data is supplied from the quantizer 52.
Are supplied to the class classification adaptive prediction circuit 60. In the class classification adaptive prediction circuit 60, the data d14 is added to the data d11 to form the third-layer local decoded data, and the prediction process is performed using this local decoded data to obtain the second-layer data. The predicted value d10 is generated, and the predicted value d10 is supplied to the subtractor 47. In the subtractor 47, a difference value between the data d1 supplied from the averaging circuit 42 and the predicted value d10 is obtained, and the difference value d6 is supplied to the quantizer 51.

The output data of the quantizer 51 is the arithmetic unit 64.
And to the inverse quantizer 55. In this computing unit 64, a process of thinning out one pixel from four pixels is performed. The second layer data d18 output from the arithmetic unit 64 is supplied to the variable-length code encoder 68, and the output of the encoder 68 is taken out to the output terminal 73 as the second layer data.

The second layer data d10 predicted by the class classification adaptive prediction circuit 60 and the output data d13 of the dequantizer 55 to which the coded data is supplied from the quantizer 51.
Are supplied to the class classification adaptive prediction circuit 59. The class classification adaptive prediction circuit 59 forms the second layer of local decoded data by adding the data d13 to the data d10, and the local decoded data is used to perform the prediction process to generate the first layer data. The predicted value d9 is generated, and the predicted value d9 is supplied to the subtractor 46. The subtractor 46 obtains a difference value between the input pixel data d0 supplied from the input terminal 41 and the predicted value d9, and the difference value d5 is supplied to the quantizer 50.

The output data of the quantizer 50 to which the difference value d5 is supplied is supplied to the calculator 63. This calculator 63
In, the process of thinning out one pixel from four pixels is performed. The first layer data d17 output from the computing unit 63 is supplied to the encoder 67 of the variable length code, and the output of the encoder 67 is taken out to the output terminal 72 as the first layer data.

Class classification adaptive prediction circuits 59, 60, 6
Each of 1 and 62 is for predicting a pixel of a lower hierarchy to be predicted based on the level distribution of a plurality of pixels spatially nearby (included in the upper hierarchy). FIG.
2 shows an example of a class classification adaptive prediction circuit. The locally decoded data from the input terminal 141 is supplied to the peripheral code value forming unit 142. The peripheral code value forming unit 142 simultaneously synchronizes a plurality of data x ₁ , x ₂ , ..., X _n located in the vicinity of the pixel of the lower hierarchy to be predicted. The peripheral code value is supplied to the class classification unit 143 and the delay unit 145. The class classification unit 143 uses the peripheral code value x ₁ to
The class code corresponding to the level distribution pattern of x _n is output. The peripheral code value itself may be used as the class code, but since the number of classes is enormous, the bit number of each of the peripheral codes is compressed to, for example, 1 bit by ADRC or the like. The class code generated from the class classification unit 143 is the prediction coefficient memory 14
4 is supplied as an address signal.

The prediction coefficient memory 144 stores prediction coefficients w _{1 to} w _n acquired by learning in advance for each address. That is, using the teacher signal (for example, the data of the fourth layer) and the input signal (the data of the fifth layer formed by the averaging process from the data of the fourth layer), a plurality of data and coefficients of the input signal are used. The predicted value is obtained by linear linear combination of, and a coefficient that minimizes the sum of squares of the error between the predicted value and the true value of the teacher signal is obtained by the least square method for each class. Prediction coefficient memory 144 corresponding to the class code
Peripheral code values x ₁ ~x _n from the prediction coefficient W1～w _n a delay unit 145 read out is supplied to the prediction computation unit 146 from.

The prediction calculation unit 146 calculates the prediction value y by the following linear linear combination equation. y = w ₁ x ₁ + w ₂ x ₂ + ... + w _n x _{n The} prediction value y obtained by the prediction calculation unit 146 is taken out to the output terminal 147. The peripheral code value used for class classification and the peripheral code value used for prediction calculation may be different.

A configuration similar to that of the encoding unit 125 (see FIG. 2) in the above-described embodiment is also provided on the encoder side of hierarchical encoding. That is, the quantizers 50, 51, 52 have the same configuration as that of the previous stage up to the quantization circuit 6.
The variable-length encoder 6 has the same configuration as that of each of the bit-plane encoding circuits 7 and 53, 54, respectively.
7, 68, 69, 70, 71 respectively have.

Next, FIG. 11 shows an example of the configuration on the decoder side of hierarchical encoding corresponding to the above encoder. The respective hierarchical data generated on the encoder side are supplied to the input terminals 81, 82, 83, 84 and 85 as d30 to d34, respectively. And variable length code decoders 86, 87, 8
Variable length codes are decoded at 8, 89 and 90. For these decoders, the inverse quantizers 91, 92, 93,
94 and 95 are respectively connected.

First, the fifth-layer input data d34 is subjected to a decoding process corresponding to the quantization applied by the encoder in the inverse quantizer 95 to become the image data d39, and the class classification adaptive prediction circuit 107 and the computing unit. 103 is supplied. Further, the image data d39 is taken out from the output terminal 112 as an image output of the fifth layer.

In the class classification adaptive prediction circuit 107, the fourth
The class classification adaptive prediction is performed on the image data of the hierarchy, and the prediction value d47 of the fourth hierarchy data is generated. The data d38 (that is, the difference value) from the inverse quantizer 94 and the predicted value d47 are added by the adder 99. Adder 99
To the image data d43 supplied from the inverse quantizer 95 to the arithmetic unit 103, and the arithmetic unit 103 performs the above-described calculation to obtain the value of the non-transmission pixel. To all pixel values of the fourth hierarchy are restored. In this calculator 103, all the pixel values restored are supplied to the class classification adaptive prediction circuit 106 and the calculator 102 as image data d51. Further, the image data d51 is taken out from the output terminal 111 as the output of the fourth layer.

In the class classification adaptive prediction circuit 106, the third
The class classification adaptive prediction is performed on the image data of the hierarchy, and the prediction value d46 of the third hierarchy data is generated. The data d37 from the inverse quantizer 93 and the predicted value d46 are added by the adder 98. Image data d42 from the adder 98
Is supplied to the arithmetic unit 102, the value of the non-transmission pixel is obtained by the arithmetic unit 102, and all pixel values of the third layer are restored from the image data d51 and the image data d42 supplied from the arithmetic unit 103. In this arithmetic unit 102, the restored all pixel values are supplied to the class classification adaptive prediction circuit 105 and the arithmetic unit 101 as image data d50. Further, the image data d50 is taken out from the output terminal 110 as an output of the third layer.

In the class classification adaptive prediction circuit 105, the class classification adaptive prediction is performed on the image data of the second layer, and the predicted value d45 of the second layer data is generated. The data d36 from the inverse quantizer 92 and the predicted value d45
And are added by the adder 97. The image data d41 is supplied from the adder 97 to the arithmetic unit 101, the value of the non-transmission pixel is obtained by the arithmetic unit 101, and all the pixel values of the second layer from the image data d50 and the image data d41 supplied from the arithmetic unit 102. Is restored. In this arithmetic unit 101,
The restored all pixel values are supplied to the class classification adaptive prediction circuit 104 and the calculator 100 as image data d49. Further, the image data d49 is taken out from the output terminal 109 as an output of the second layer.

Further, in the class classification adaptive prediction circuit 104, the class classification adaptive prediction is performed on the image data of the first layer, and the predicted value d44 of the first layer data is generated. The data d35 from the inverse quantizer 91 and the predicted value d44
And are added by the adder 96. The image data d40 is supplied from the adder 96 to the arithmetic unit 100, the value of the non-transmission pixel is obtained by the arithmetic unit 100, and all pixel values of the first layer are calculated from the image data d49 and the image data d40 supplied from the arithmetic unit 101. Is restored. In this arithmetic unit 100,
The restored all pixel values are the first image data d48 and the first
It is taken out from the output terminal 108 as the output of the hierarchy.
Class classification adaptive prediction circuits 104, 105, 106, 10
Each of 7 has the specific configuration shown in FIG. 12 and described above. Thus, in hierarchical coding in which the number of pixels to be coded is prevented from increasing, it is possible to improve coding efficiency by introducing the class classification adaptive prediction.

Decoding unit 134 of the above-described embodiment.
And a variable length code decoder 86, 87, 8
8, 89, 90 and inverse quantizers 91, 92, 93, 9
4 and 95 respectively. Therefore, according to another embodiment in which the present invention is applied to the above-mentioned hierarchical encoding,
Similar to the above-described embodiment, the number of quantization bits can be further reduced when the level range of the blocked residual signal satisfies a predetermined condition.

The mode signal M generated in the present invention
Various methods are possible as a method of transmitting the ODE and the coded residual signal. For example, it is possible to transmit the mode signals for one frame at a time, and then transmit the coded residual signal. Moreover, the present invention can set three or more quantization modes. For example, not only the level range of the residual signal of the block but also its dynamic range D
In consideration of R as well, when the dynamic range DR is small, the third quantization mode having a smaller number of bits than the number of bits in the second quantization mode may be set. Furthermore, the quantization mode may be determined based on the level range of the quantization output of the first quantization mode.

Furthermore, the present invention can be applied to the quantization of the residual signal generated by the predictive coding other than the predictive coding described above. The present invention can also be applied to a system having a buffering configuration that controls the amount of generated data by controlling the quantization step width.

[0070]

According to the present invention, the case where the frequency distribution of the blocked residual signal does not cross 0 is detected, and in that case, the number of quantization bits is reduced and the transmission data amount is reduced. It can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of an example of a recording / reproducing or transmission system to which the present invention can be applied.

FIG. 2 is a block diagram of an embodiment of the present invention.

FIG. 3 is a schematic diagram used to explain the generation of a residual signal and its blocking in an embodiment of the present invention.

FIG. 4 is a schematic diagram used to explain a quantization process in an embodiment of the present invention.

FIG. 5 is a block diagram of an example of a quantization circuit according to an embodiment of the present invention.

FIG. 6 is a schematic diagram used for explaining a bit plane in an embodiment of the present invention.

FIG. 7 is a block diagram of a decoding unit according to an embodiment of the present invention.

FIG. 8 is a schematic diagram used to describe an example of hierarchical encoding.

FIG. 9 is a schematic diagram used to describe an example of hierarchical encoding.

FIG. 10 is a block diagram showing an example of a configuration on the encoding side of another embodiment in which the present invention is applied to hierarchical encoding.

FIG. 11 is a block diagram showing an example of a configuration on the decoding side according to another embodiment of the present invention.

FIG. 12 is a block diagram showing an example of a configuration of a class classification adaptive prediction circuit according to another embodiment of the present invention.

[Explanation of symbols]

2 ... Maximum value detection circuit, 3 ... Minimum value detection circuit, 5
... Mode decision circuit 6 ... Quantization circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kunio Kawaguchi 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Sony Corporation

Claims (6)

[Claims] 1. An information signal coding apparatus for coding an input digital information signal so as to reduce the amount of generated data, a means for generating a residual signal between sample values of the input digital information signal, and the residual difference. Means for dividing the signal, means for detecting a maximum value and a minimum value for each of the blocked residual signals, and a level range of the residual signal for each block from the maximum value and the minimum value to 0 Mode determination for determining whether the level range crosses 0, indicating the first quantization mode when the level range crosses 0, and indicating the second quantization mode when the level range does not cross 0 Means for quantizing the residual signal with a predetermined number of bits smaller than the original number of bits, and
In the quantization mode of, the residual signal is quantized with a smaller number of bits than the original number of bits, and the number of bits is reduced by code conversion, and the first and second Information identifying the quantization mode,
An information signal coding device, comprising: a transmission means for transmitting the output of the quantization means. 2. The information signal coding apparatus according to claim 1, wherein the mode determining means sets the second quantization mode when the minimum value is 0 or more or the maximum value is 0 or less. An information signal coding device characterized by indicating the following. 3. An information signal encoding method for encoding an input digital information signal so as to reduce the amount of generated data, a step of generating a residual signal between sample values of the input digital information signal, and the residual error. A step of dividing the signal into blocks, a step of detecting a maximum value and a minimum value for each of the blocked residual signals, and a level range of the residual signal for each block of 0 from the maximum value and the minimum value. Mode determination for determining whether the level range crosses 0, indicating the first quantization mode when the level range crosses 0, and indicating the second quantization mode when the level range does not cross 0 In the first quantization mode, the residual signal is quantized with a predetermined number of bits smaller than the original number of bits, and
In the quantization mode, the quantization step is performed to quantize the residual signal with a smaller number of bits than the original number of bits, and the number of bits is further reduced by code conversion; and the first and second quantization modes. Information that identifies
And a step of transmitting the output of the quantizing means. 4. An information signal coding apparatus for forming at least first and second hierarchical data from an input digital information signal and coding and transmitting the first and second hierarchical data. Means for forming the second hierarchical data having a resolution lower than that of the first hierarchical data, means for predicting the first hierarchical data from the second hierarchical data, the predicted data and the first hierarchical data Means for forming a residual signal with hierarchical data; means for blocking the residual signal; means for detecting a maximum value and a minimum value for each of the blocked residual signals; and a maximum value and From the minimum value, it is determined whether or not the level range of the residual signal for each block crosses over 0, and when the level range crosses over 0, the first quantization mode is instructed. Mode determining means for instructing a second quantization mode when it does not cross 0, and in the first quantization mode, the residual signal is quantized with a predetermined number of bits smaller than the original number of bits, Second above
In the quantization mode of, the residual signal is quantized with a smaller number of bits than the original number of bits, and the number of bits is reduced by code conversion, and the first and second Information identifying the quantization mode,
An information signal coding device, comprising: a transmission means for transmitting the output of the quantization means. 5. An information signal coding method for forming at least first and second hierarchical data from an input digital information signal, and coding and transmitting the first and second hierarchical data, Forming the second hierarchical data having a lower resolution than that of the first hierarchical data; predicting the first hierarchical data from the second hierarchical data; the predicted data and the first hierarchical data; Forming a residual signal with the hierarchical data, blocking the residual signal, detecting a maximum value and a minimum value for each of the blocked residual signals, the maximum value and From the minimum value, it is determined whether the level range of the residual signal for each block crosses 0, and when the level range crosses 0, the first quantization mode is instructed. Then, when the level range does not cross 0, a step of mode determination for instructing the second quantization mode, and in the first quantization mode, with a predetermined number of bits smaller than the original number of bits, The residual signal is quantized and the second
In the quantization mode, the quantization step is performed to quantize the residual signal with a smaller number of bits than the original number of bits, and the number of bits is further reduced by code conversion; and the first and second quantization modes. Information that identifies
A method of encoding an information signal, comprising the step of transmitting the quantized output. 6. The information for identifying the first and second quantization modes and the information of the residual signal are transmitted, and in the first quantization mode, the residual signal has less bits than the original number of bits. Data that has been quantized by a number, and in the second quantization mode, the residual signal is quantized by a number of bits smaller than the original number of bits, and coded to reduce the number of bits by code conversion. In the information signal decoding method, the data is inversely quantized in the first quantization mode based on the identification information, and the data is code-converted and inversely quantized in the second quantization mode. And a step of decomposing the dequantized residual signal into blocks and converting them into the original order.