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JPH09116077A - Substrate with lead frame and semiconductor device using it - Google Patents

Substrate with lead frame and semiconductor device using it

Info

Publication number
JPH09116077A
JPH09116077A JP26891995A JP26891995A JPH09116077A JP H09116077 A JPH09116077 A JP H09116077A JP 26891995 A JP26891995 A JP 26891995A JP 26891995 A JP26891995 A JP 26891995A JP H09116077 A JPH09116077 A JP H09116077A
Authority
JP
Japan
Prior art keywords
substrate
resin
lead frame
molding die
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26891995A
Other languages
Japanese (ja)
Inventor
Takeo Iijima
毅夫 飯島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP26891995A priority Critical patent/JPH09116077A/en
Publication of JPH09116077A publication Critical patent/JPH09116077A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a substrate with a lead frame which allows resin filling speeds to be the same in an upper and a lower side of a molding die for preventing the appearance of voids at the time of resin sealing using the molding die and also provide a semiconductor device using such a substrate. SOLUTION: A substrate with a lead frame has a lead frame 3 at an upper edge 1b of a substrate 1. The substrate with a lead frame is used after resin- sealed with a molding die which has a resin gate above the substrate 1. An end face 1a of the substrate 1 is tapered to its downside. And, the substrate 1 has a dummy lead frame 2 with its basic end 2a being bent upward at another upper edge 1b of the substrate 1 which will be near the resin gate. Owing to this structure, resin flows along the end face 1a of the substrate 1 in a lower part of the molding die while it hits against the basic end 2a of the dummy lead frame 2 and flows slowly in an upper part of the molding die. A semiconductor device is made by mounting a semiconductor chip 4 on such a substrate with a lead frame and then sealing all the components with a resin layer 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明はモールド用金型で樹
脂を封止して用いられるリードフレーム付き基板、及び
それを用いた半導体装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate with a lead frame used by sealing a resin with a molding die, and a semiconductor device using the same.

【0002】[0002]

【従来の技術】電子装置の高機能化に伴って、リードフ
レームを有した基板に半導体チップを搭載し、モールド
用の樹脂で封止した半導体装置が用いられている。上記
半導体装置において、耐湿性が低下する原因として、基
板を封止する際に封止層に発生するボイドと称する気泡
が問題となる。
2. Description of the Related Art As electronic devices have become more sophisticated, semiconductor devices have been used in which a semiconductor chip is mounted on a substrate having a lead frame and is sealed with a molding resin. In the above-mentioned semiconductor device, as a cause of lowering the moisture resistance, bubbles called voids generated in the sealing layer when the substrate is sealed poses a problem.

【0003】[0003]

【発明が解決しようとする課題】このボイド発生の原因
は、モールド用金型で樹脂を注入する際に、樹脂の充填
速度が金型内の上側と下側で大きく異なるためと推測さ
れる。例えば、基板より上側に樹脂ゲート口を形成した
モールド用金型で樹脂を封止する際、基板の上側は樹脂
の充填速度が速く、下側はリードフレームが障害物とな
るため樹脂の充填速度が遅くなる。
It is speculated that the cause of this void generation is that the resin filling speed when the resin is injected in the mold for molding greatly differs between the upper side and the lower side in the mold. For example, when the resin is sealed with a molding die that has a resin gate port above the substrate, the resin filling speed is high on the upper side of the substrate and the lead frame is an obstacle on the lower side so that the resin filling speed is high. Will be late.

【0004】本発明は上述の事実に鑑みてなされたもの
で、その目的とするところは、モールド用金型で樹脂を
封止する際に、ボイド発生を防止するため、金型内の上
側と下側の樹脂の充填速度を均一にできるリードフレー
ム付き基板、及びそれを用いた半導体装置を提供するこ
とにある。
The present invention has been made in view of the above facts, and an object of the present invention is to prevent the occurrence of voids when a resin is sealed in a molding die, and to prevent the occurrence of voids. An object of the present invention is to provide a substrate with a lead frame that can make the filling rate of the lower resin uniform, and a semiconductor device using the same.

【0005】[0005]

【課題を解決するための手段】本発明の請求項1に係る
リードフレーム付き基板は、基板1の上縁部1bにリー
ドフレーム3を有し、この基板1より上側に樹脂ゲート
口を形成したモールド用金型で、樹脂を封止して用いら
れるリードフレーム付き基板であって、上記基板1の端
面1aが下側に狭いテーパ状となっており、且つ、上記
樹脂ゲート口の近傍となる基板1の上縁部1bに、基端
2aを上方に折曲したダミーリードフレーム2を備える
ことを特徴とする。
A substrate with a lead frame according to claim 1 of the present invention has a lead frame 3 at an upper edge 1b of the substrate 1, and a resin gate port is formed above the substrate 1. A lead frame-equipped substrate used for sealing a resin in a molding die, wherein an end face 1a of the substrate 1 is tapered downward and is in the vicinity of the resin gate port. A dummy lead frame 2 having a base end 2a bent upward is provided at the upper edge 1b of the substrate 1.

【0006】上記構成により、金型内の下側の樹脂は基
板1の端面1aに沿って流れるので基板1の下側で乱流
が起きずに、樹脂がスムーズに流れ、金型内の上側の樹
脂はダミーリードフレーム2の基端2aに当たり樹脂の
流速が遅くなる。
With the above structure, the resin on the lower side of the mold flows along the end face 1a of the substrate 1, so that the resin flows smoothly without causing turbulent flow on the lower side of the substrate 1, and the upper side of the mold is closed. The resin comes into contact with the base end 2a of the dummy lead frame 2 and the flow velocity of the resin becomes slow.

【0007】本発明の請求項2に係る半導体装置は、請
求項1記載のリードフレーム付き基板に半導体チップ4
を搭載し、モールド用の樹脂で封止した樹脂層5を形成
したことを特徴とする。
According to a second aspect of the present invention, there is provided a semiconductor device in which the semiconductor chip 4 is mounted on the substrate with the lead frame according to the first aspect.
Is mounted, and a resin layer 5 sealed with a molding resin is formed.

【0008】[0008]

【発明の実施の形態】本発明を図面に基づいて説明す
る。図1(a)は本発明の一実施の形態に係るリードフ
レーム付き基板の要部を示した断面図であり、(b)は
本発明の一実施の形態に係る半導体装置の要部を示した
断面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings. FIG. 1A is a sectional view showing an essential part of a substrate with a lead frame according to an embodiment of the present invention, and FIG. 1B shows an essential part of a semiconductor device according to an embodiment of the present invention. FIG.

【0009】本発明の対象となるリードフレーム付き基
板は、図1(a)に示す如く、基板1の上縁部1bにリ
ードフレーム3を有するものであり、基板1より上側に
樹脂ゲート口を形成したモールド用金型で樹脂を封止し
て用いられるものである。なお、図中の矢印は樹脂ゲー
ト口から注入される樹脂の注入方向を示す。
As shown in FIG. 1 (a), a substrate with a lead frame to which the present invention is applied has a lead frame 3 at an upper edge 1b of the substrate 1, and a resin gate port is provided above the substrate 1. It is used by sealing the resin with the formed molding die. The arrow in the figure indicates the direction of injection of the resin injected from the resin gate port.

【0010】上記基板1は、例えば、基材に樹脂を含浸
し硬化した絶縁基板に回路を形成したものである。上記
樹脂としてはエポキシ樹脂、ポリイミド樹脂、フッソ樹
脂、フェノール樹脂、不飽和ポリエステル樹脂、PPO
樹脂等の単独、変性物、混合物等が挙げられる。上記基
材としてはガラス繊維等の無機材料が挙げられる。
The substrate 1 is, for example, a circuit formed on an insulating substrate obtained by impregnating a base material with a resin and curing the resin. As the above resin, epoxy resin, polyimide resin, fluorine resin, phenol resin, unsaturated polyester resin, PPO
Examples of the resin include single substances, modified products, and mixtures. Examples of the base material include inorganic materials such as glass fiber.

【0011】本発明のリードフレーム付き基板は、上記
基板1の端面1aが下側に狭いテーパ状となっている。
上記端面1aがテーパ状となっていると、モールド用金
型で樹脂を封止する際に、金型内の下側の樹脂は基板1
の端面1aに沿って流れるので、基板1の下側で乱流が
起きずにスムーズに流れる。上記テーパ状の端面1a
は、基板1の全周でもよいし、樹脂ゲート口の近傍に位
置する端面1aだけでもよい。この場合、通常樹脂ゲー
ト口は、基板1の角部近傍に設けられることが多いの
で、この角部を挟んだ端面1aがテーパ状となっていれ
ばよい。
In the substrate with lead frame according to the present invention, the end surface 1a of the substrate 1 is tapered downward.
When the end surface 1a is tapered, the resin on the lower side in the mold is the substrate 1 when the resin is sealed by the mold for molding.
Since it flows along the end surface 1 a of the substrate 1, the turbulent flow does not occur on the lower side of the substrate 1 and the substrate 1 smoothly flows. The tapered end surface 1a
May be the entire circumference of the substrate 1 or only the end face 1a located near the resin gate port. In this case, since the resin gate port is usually provided in the vicinity of the corner of the substrate 1, the end face 1a sandwiching the corner may be tapered.

【0012】さらに、上記リードフレーム付き基板は、
樹脂ゲート口の近傍となる基板1の上縁部1bに、基端
2aを上方に折曲したダミーリードフレーム2を備え
る。上記ダミーリードフレーム2を備えると、金型内の
上側の樹脂をこのダミーリードフレーム2の基端2aに
当て、樹脂の流速を遅くすることができるので、金型内
の下側の樹脂と充填速度を同程度の速度にすることがで
きる。上記ダミーリードフレーム2は樹脂ゲート口の近
傍となる基板1の上縁部1bに1本以上あればよく、ダ
ミーリードフレーム2の数は金型内の上側と下側の樹脂
の流速の差により適宜決定すればよい。通常樹脂ゲート
口は、基板1の角部近傍に設けられることが多いので、
この基板1の角部の上縁部1bにダミーリードフレーム
2を形成することになる。
Further, the above-mentioned substrate with lead frame is
A dummy lead frame 2 having a base end 2a bent upward is provided on an upper edge 1b of the substrate 1 near the resin gate opening. When the dummy lead frame 2 is provided, the resin on the upper side in the mold can be applied to the base end 2a of the dummy lead frame 2 to reduce the flow rate of the resin, so that the resin on the lower side in the mold can be filled. The speeds can be comparable. One or more dummy lead frames 2 may be provided on the upper edge 1b of the substrate 1 near the resin gate port. The number of dummy lead frames 2 depends on the difference in the flow velocity of the resin between the upper side and the lower side in the mold. It may be determined appropriately. Usually, the resin gate opening is often provided near the corner of the substrate 1,
The dummy lead frame 2 is formed on the upper edge 1b of the corner of the substrate 1.

【0013】本発明の半導体装置は、図1(b)に示す
如く、上記リードフレーム付き基板に半導体チップ4を
搭載し、基板1の上側、下側共モールド用の樹脂で封止
し、樹脂層5を形成したものである。上記モールド用の
樹脂は、エポキシ樹脂が挙げられる。上記半導体装置
は、上記リードフレーム付き基板を用いているので、モ
ールド用金型で樹脂を封止する際に、金型内の上側と下
側の樹脂の充填速度を小さくできるため、ボイドの発生
を抑えることができる。その結果、上記半導体装置は、
耐湿性が良好となる。
In the semiconductor device of the present invention, as shown in FIG. 1 (b), the semiconductor chip 4 is mounted on the above-mentioned substrate with lead frame, and the upper and lower sides of the substrate 1 are sealed with resin for co-molding. The layer 5 is formed. Examples of the resin for molding include epoxy resins. Since the semiconductor device uses the substrate with the lead frame, when the resin is sealed with the molding die, the filling speed of the resin on the upper side and the lower side in the die can be reduced, which causes the occurrence of voids. Can be suppressed. As a result, the semiconductor device
Good moisture resistance.

【0014】[0014]

【発明の効果】本発明の請求項1に係るリードフレーム
付き基板は、基板1の端面1aが下側に狭いテーパ状と
なっているので、金型内の下側の樹脂は基板1の端面1
aに沿って流れるので基板1の下側で乱流が起きずに、
樹脂がスムーズに流れると共に、樹脂ゲート口の近傍と
なる基板1の上縁部1bに基端2aを上方に折曲したダ
ミーリードフレーム2を備えるので、金型内の上側の樹
脂はダミーリードフレーム2の基端2aに当たり樹脂の
流速が遅くなる。その結果、金型内の上側と下側の樹脂
の充填速度を同程度にすることができる。本発明のリー
ドフレーム付き基板を用いると、モールド用金型で樹脂
を封止する際に、ボイドの発生を抑えることができる。
In the substrate with lead frame according to claim 1 of the present invention, since the end face 1a of the substrate 1 is tapered downward, the resin on the lower side of the mold is the end face of the substrate 1. 1
Since it flows along a, turbulent flow does not occur under the substrate 1,
Since the resin flows smoothly and the upper edge 1b of the substrate 1 near the resin gate port is provided with the dummy lead frame 2 having the base end 2a bent upward, the upper resin in the mold is the dummy lead frame. The flow velocity of the resin becomes slower as it hits the base end 2a of 2. As a result, the filling speeds of the upper and lower resins in the mold can be made approximately the same. When the substrate with lead frame of the present invention is used, it is possible to suppress the generation of voids when the resin is sealed with the molding die.

【0015】本発明の請求項2に係る半導体装置は、上
記リードフレーム付き基板を用いているので、モールド
用金型で樹脂を封止する際に、金型内の上側と下側の樹
脂の充填速度を同程度にするため、ボイドの発生が抑え
られる。その結果、上記半導体装置は、耐湿性が良好と
なる。
Since the semiconductor device according to claim 2 of the present invention uses the substrate with the lead frame, when the resin is sealed by the molding die, the resin on the upper side and the resin on the lower side in the die are sealed. Since the filling speeds are almost the same, the generation of voids can be suppressed. As a result, the semiconductor device has good moisture resistance.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)は本発明の一実施の形態に係るリードフ
レーム付き基板の要部を示した断面図であり、(b)は
本発明の一実施の形態に係る半導体装置の要部を示した
断面図である。
FIG. 1A is a sectional view showing an essential part of a substrate with a lead frame according to an embodiment of the present invention, and FIG. 1B is an essential part of a semiconductor device according to an embodiment of the present invention. It is sectional drawing which showed.

【符号の説明】[Explanation of symbols]

1 基板 1a 端面 1b 上縁部 2 ダミーリードフレーム 2a 基端 3 リードフレーム 4 半導体チップ 5 封止層 1 Substrate 1a End face 1b Upper edge 2 Dummy lead frame 2a Base end 3 Lead frame 4 Semiconductor chip 5 Sealing layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 基板(1)の上縁部(1b)にリードフ
レーム(3)を有し、この基板(1)より上側に樹脂ゲ
ート口を形成したモールド用金型で、樹脂を封止して用
いられるリードフレーム付き基板であって、上記基板
(1)の端面(1a)が下側に狭いテーパ状となってお
り、且つ、上記樹脂ゲート口の近傍となる基板(1)の
上縁部(1b)に、基端(2a)を上方に折曲したダミ
ーリードフレーム(2)を備えることを特徴とするリー
ドフレーム付き基板。
1. A resin is sealed with a molding die having a lead frame (3) at an upper edge portion (1b) of a substrate (1) and a resin gate opening formed above the substrate (1). A lead frame-equipped substrate, which has a narrow tapered end face (1a) of the substrate (1) and which is near the resin gate opening. A substrate with a lead frame, comprising a dummy lead frame (2) having a base end (2a) bent upward at an edge portion (1b).
【請求項2】 請求項1記載のリードフレーム付き基板
に半導体チップ(4)を搭載し、モールド用の樹脂で封
止した樹脂層(5)を形成したことを特徴とする半導体
装置。
2. A semiconductor device comprising a substrate with a lead frame according to claim 1, wherein a semiconductor chip (4) is mounted and a resin layer (5) sealed with a molding resin is formed.
JP26891995A 1995-10-18 1995-10-18 Substrate with lead frame and semiconductor device using it Pending JPH09116077A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26891995A JPH09116077A (en) 1995-10-18 1995-10-18 Substrate with lead frame and semiconductor device using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26891995A JPH09116077A (en) 1995-10-18 1995-10-18 Substrate with lead frame and semiconductor device using it

Publications (1)

Publication Number Publication Date
JPH09116077A true JPH09116077A (en) 1997-05-02

Family

ID=17465107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26891995A Pending JPH09116077A (en) 1995-10-18 1995-10-18 Substrate with lead frame and semiconductor device using it

Country Status (1)

Country Link
JP (1) JPH09116077A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007524999A (en) * 2003-04-11 2007-08-30 フェアチャイルド・セミコンダクター・コーポレーション Lead frame structure with opening or groove for mounting flip chip in lead mold package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007524999A (en) * 2003-04-11 2007-08-30 フェアチャイルド・セミコンダクター・コーポレーション Lead frame structure with opening or groove for mounting flip chip in lead mold package

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