JPH09270401A - Polishing method of semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable wafers to be held at a time so as to improve a semiconductor wafer polishing device in productivity by a method wherein a template with one or more wafer positioning holes is so fixed to a carrier plate as to put a packing pad in each of the positioning holes. SOLUTION: A packing pad 11 whose wafer holding surface is precisely flattened is pasted on a carrier plate 13 for the formation of a wafer holding jig 3. That is, a template 16 with one or more wafer positioning holes 18 is fixed to the carrier plate 13 through the intermediary of adhesive agent 17. As a semiconductor wafer W is held with the packing pad 11, the packing pad 11 is put in the wafer positioning hole of the template 16. At this point, a gap 19 is provided between the packing pad 11 and the template 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for polishing a semiconductor wafer (hereinafter sometimes simply referred to as a wafer), and more particularly to an improvement in a method for finish polishing a semiconductor wafer.

[0002]

[Related Art] In recent years, in the precision processing of semiconductor wafers, which has dramatically expanded on an industrial scale, the required level of flatness and surface roughness of the processed surface has become more sophisticated, and a large amount of money has been added to production and inspection mechanisms. Since investment is required, improving productivity and reducing production costs are important issues.

Generally, when a semiconductor wafer is polished by a one-side polishing machine, the semiconductor wafer is held by a carrier plate and its surface is mirror-polished. As a method for holding the wafer in this case, a wax method in which wax is applied to one surface of the wafer and fixed to a carrier, a waxless method by vacuum adsorption, and a non-volume compressible material made of a porous resin are used to hold the wafer. The waxless method of applying water is used.

In the wax method, since the wax is used to support the semiconductor wafer, it takes time to fix the semiconductor wafer to the carrier, and the semiconductor wafer is contaminated with the wax.
There are drawbacks such as contamination and damage due to removal after polishing. Further, the nonuniformity of the thickness of the adhesive layer due to the wax coating is directly reflected on the flatness, parallelism, etc. of the wafer. Therefore, it is necessary to make the thickness of the adhesive layer uniform, but this operation is extremely difficult and requires skill.

On the other hand, recently, as the density of integrated circuit elements has increased, the precision of wafers has become more and more severe.
Since the wax is applied manually, there is a limit to the uniformity and reproducibility of the adhesive layer thickness. In addition, as for the adhesion using the wax, the wax removal work is indispensable as a post-treatment, which has been a cause of hindering automation.

However, the conventional waxless method still has drawbacks in terms of wafer adhesion, parallelism and flatness. Therefore, the applicant of the present invention has solved the drawbacks of the conventional waxless method, and holds the wafer with a backing pad having excellent adhesive force, parallelism, and flatness of the wafer, and polishes the wafer to provide excellent parallelism and flatness. A proposal has already been made for a waxless method capable of producing such a wafer (JP-A-4-13568).

Further, mirror-finish polishing of semiconductor wafers is often performed by a double-side polishing machine. The double-sided polishing apparatus has an advantage that the above-described single-sided polishing apparatus using wax does not have any drawbacks since wax is not used to support a semiconductor wafer as compared with a general single-sided polishing apparatus.

This known double-sided polishing device 22 is shown in FIG.
6 and FIG. FIG. 5 is a cross-sectional explanatory view of the double-sided polishing device. FIG. 6 is an explanatory top view showing a state in which the upper platen of the double-sided polishing device is removed.

In FIG. 5, the double-sided polishing device 22 has a lower surface plate 24 and an upper surface plate 26 which are provided facing each other in the vertical direction. A lower polishing cloth 24a is laid on the upper surface of the lower surface plate 24, and an upper polishing cloth 26a is laid on the lower surface of the upper surface plate 26. The lower surface plate 24 and the upper surface plate 26
Are rotated in opposite directions by drive means (not shown).

The lower surface plate 24 has a central gear 28 on the upper surface of the central portion thereof, and an annular internal gear 3 on the peripheral portion thereof.
0 is provided adjacently.

Reference numeral 32 denotes a disk-shaped carrier, which is the lower surface plate 24.
The upper surface of the lower polishing cloth 24a and the upper polishing cloth 26 of the upper surface plate 26
It is held between the lower polishing cloth 24a and the lower polishing cloth 24a and slides between the lower polishing cloth 24a and the upper polishing cloth 26a while rotating and revolving by the action of the central gear 28 and the internal gear 30.

A plurality of carrier holes 34 are formed in the carrier 32. The wafer W to be polished is placed in the carrier hole 34. When polishing the wafer W, the polishing agent is passed from the nozzle 36 through the through hole 38 provided in the upper surface plate 26 to the wafer W and the polishing cloth 24a.
And 26a, the wafer W rotates and revolves along with the rotation and revolution of the carrier 32 and slides between the lower polishing cloth 24a and the upper polishing cloth 26a to polish both sides of the wafer W. To be done.

However, in order to improve the finishing accuracy in double-sided polishing, it is necessary to change the polishing cloth of the double-sided polishing apparatus to a soft polishing cloth and the polishing agent to ultrafine powder abrasive grains. The frictional resistance between the two becomes large.

The semiconductor wafer held in the carrier of the double-sided polishing machine cannot withstand the increased frictional resistance and sticks out of the carrier, causing an accident such as breakage of the semiconductor wafer during polishing. To do.

Furthermore, the destruction of the semiconductor wafer causes damage to the polishing plate and the carrier, which is a disadvantage in that the manufacturing process is greatly damaged.

In order to eliminate the drawbacks of the mirror polishing work of a semiconductor wafer by the above-mentioned double-sided polishing machine, the mirror surface finish polishing of the semiconductor wafer is performed by pouring a polishing agent on the polishing surface of the double-side polishing machine to form a polishing cloth. A step of performing secondary polishing, and one main surface of the semiconductor wafer after the primary polishing is adsorbed and supported by decompression to remove a slight amount of fine dust remaining on the main surface of the semiconductor wafer by the above-mentioned polishing cloth. The second main surface of the semiconductor wafer is slidably contacted by a single-sided polishing device having a polishing surface in which a polishing agent is poured onto a soft polishing cloth.
A method of polishing a semiconductor wafer including a step of performing subsequent polishing has been proposed (Japanese Patent Publication No. 1-21131).

However, in the case of using a single-sided single-sided polishing apparatus of the single-wafer type as in the above-mentioned proposed method for polishing a semiconductor wafer, only one wafer can be held at a time, resulting in poor productivity. In addition, there are many drawbacks that foreign substances are often sandwiched between the suction surfaces, defective dents of the polished wafer often occur, and the back surface shape of the wafer is easily transferred to the front surface.

[0018]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances. Since it is possible to hold a plurality of wafers at a time, productivity is improved, dent defects are extremely reduced, and double-sided An object of the present invention is to provide a method for polishing a semiconductor wafer in which the flatness of a wafer polished by applying polishing is better than that of a conventional single-sided polishing.

[0019]

In order to solve the above problems, a semiconductor wafer polishing method of the present invention comprises a first polishing step of polishing both sides of a semiconductor wafer using a double side polishing apparatus and a single side polishing apparatus. One side of the semiconductor wafer is held by a wafer holding jig in which a template having one or more wafer positioning holes is fixed on a carrier plate so that the backing pad fits in the positioning holes. It is characterized by comprising a second polishing step of polishing one surface.

After the completion of the second polishing step, it is preferable to finish polish the other surface of the semiconductor wafer if necessary.

The backing pad is made of a hydrophobic foam and has a thickness T ₁ when a load of 300 gf / cm ² is applied.
And the thickness T ₂ when a load of 1800 gf / cm ² is applied (T _1-
It is preferable to use one having T ₂ ) of 1 to 100 μm, holes formed in the wafer holding surface, and a pore diameter of 10 to 30 μm.

The backing pad is 300 gf / c
The difference between the maximum and minimum thicknesses at a total of 5 points, 5 mm from the center and the outer edge of two diameters orthogonal to each other when a load of m ² is applied for 1 minute TV ₅
Is preferably 1 μm or less.

As for the backing pad, the wafer holding surface of the backing pad is fixed to a carrier plate, and the wafer holding surface of the backing pad has a flatness of 300 gf / cm ² by a precision surface grinder. The difference between the maximum and minimum thickness of the backing pad is 5 points from the outer edge of 2 diameters which are perpendicular to the center when the load is applied for 1 minute.
It is recommended to use one that has been surface ground so that TV ₅ is 1 μm or less.

Between the inner peripheral edge of the wafer positioning hole of the template and the outer peripheral edge of the backing pad.
It is preferable to provide a gap of 0.5 mm to 1.5 mm.

[0025]

DETAILED DESCRIPTION OF THE INVENTION One embodiment of the present invention will be described below with reference to the accompanying drawings.

The semiconductor wafer polishing method of the present invention has two polishing steps, a primary polishing step and a secondary polishing step. The double-side polishing in the first polishing step of the present invention may be performed by using the conventional double-side polishing apparatus 22 shown in FIGS. 5 and 6, and its structure and operation are as described above. Omit it.

Next, the secondary polishing process is performed by the single-side polishing apparatus shown in FIG. In FIG. 1, the single-side polishing apparatus 1 includes a rotary platen 2, a wafer holding jig 3, and a polishing agent supply device 4. A polishing pad 6 is attached to the upper surface of the rotary platen 2. The rotary platen 2 is rotated at a predetermined rotation speed by the rotary shaft 7.

The wafer holding jig 3 has a structure which will be described later, holds the wafer W on its lower surface, and rotates the rotary shaft 8
The wafer W is pressed against the polishing pad 6 by a predetermined load at the same time as being rotated by. The abrasive supply device 4 supplies the abrasive 9 onto the polishing pad 6 at a predetermined flow rate.
Is supplied between the wafer W and the polishing pad 6 to polish the wafer W.

The wafer holding jig 3 has a unique backing pad 11 (FIG. 2). The backing pad 11 is a hydrophobic foam and has a large number of holes 1 on its surface.
2 are drilled. The semiconductor wafer W is attracted to the backing pad 11 by utilizing the surface tension of water.
A thin film of water is generated on the surface of the backing pad 11, the adhesive force is reduced, and the wafer may rotate (turn around) during polishing. The backing pad 11 is made hydrophobic so as to prevent the wafer from rotating (coloring around).

The pore diameter of the hole 12 is 10 to 30 μm. When the pore diameter exceeds 30 μm, the adhesive force of the wafer is lowered, and the wafer is moved or rotated during polishing, so that the polishing cannot be performed well. Further, when the pore diameter is less than 10 μm, the adhesive force of the wafer becomes large, but the air on the adhesive surface between the backing pad 11 and the wafer W cannot escape, and if the polishing is performed as it is, the parallelism cannot be polished well.

Further, since the backing pad 11 is made of foam resin, it has elasticity and moderate softness. The softness is the difference between the thickness T ₁ of the backing pad 11 when a load of 300 gf / cm ² is applied and the thickness T ₂ of the backing pad 11 when a load of 1800 gf / cm ² is applied (T ₁ -
It is preferable that T ₂ ) is 1 to 100 μm.

It is shown that the larger the value of (T ₁ -T ₂ ) is, the softer it is, and the smaller the value of (T ₁ -T ₂ ) is, the harder it is.

The above-mentioned softness has a compressive stress of 300 gf / cm ²
Represents the difference in compressive strain between 1800 and 1800 gf / cm ² , showing the amount corresponding to the reciprocal of the rough compressive elastic modulus. Since 300 gf / cm ² corresponds to the minimum pressure applied to the backing pad 11 during polishing, the above-mentioned softness indicates an amount corresponding to the reciprocal of the compressive elastic modulus under the compressive stress during polishing. I can say.

When this (T ₁ -T ₂ ) is less than 1 μm, the backing pad 11 is too hard and the adhesive force of the wafer is lowered, and the wafer is moved and rotated during polishing to perform good polishing. Becomes difficult. Also, the backing pad 1
When a foreign matter is mixed between 1 and the wafer W from the atmosphere or the like, the hard backing pad cannot absorb the shape of the foreign matter, and the dent defect frequently occurs on the wafer W. (T ₁ -T ₂ ) is 1
Within the range of up to 100 μm, foreign matter mixed from the atmosphere or the like between the backing pad 11 and the wafer W is absorbed by the change in the shape of the backing pad 11, and there is an advantage that dent defects due to foreign matter can be reduced. On the other hand, (T ₁ -T ₂ ) is 100
When the thickness exceeds μm, the foam is too soft and it is difficult to obtain processing precision such as precision surface grinding of the backing pad 11, and it is difficult to obtain the backing pad 11 having good flatness.

The backing pad 11 is 300 gf / c.
The difference between the maximum and minimum thickness TV ₅ at the 5 points from the center of the constant pressure thickness measuring instrument, 5 mm from the outer edge of the two diameters orthogonal to each other when a load of m ² is applied for 1 minute is 1 μm or less, The entire surface of the backing pad 11 has uniform elasticity and enables mirror polishing with good parallelism and flatness.

The backing pad 11 is disk-shaped and its outer diameter is approximately the same as the outer diameter of the wafer W. The difference between the wafer positioning hole 18 diameter of the template 16 and the wafer outer diameter is preferably within 1 mm. .

As an example of a method for manufacturing the backing pad 11, there is a method in which a hydrophobic foaming resin such as polyether urethane is applied to a film or the like, followed by foaming and then grinding the surface. May be peeled off from the film and used, or may be used as it is. It is also possible to use a foam produced by a method other than this method.

When polishing the wafer W, the wafer holding surface of the backing pad 11 is required to be a perfectly flat surface, and therefore the wafer holding surface of the backing pad 11 is precisely surface-ground. It is suitable. At this time, as shown in FIG. 3, with the wafer holding surface of the backing pad 11 facing upward, the surface grinding is performed by the surface grinder 15 in a state of being attached to the carrier plate 13 with the adhesive 14.

As a precise surface grinding method, a backing pad 1 of diamond or the like having an average particle size of 50 to 100 μm is used.
30 with a surface grinder 15 having a cup wheel in which abrasive grains harder than 1 are solidified by sintered metal or the like and taken into the surface
0 gf / center when the load was applied 1 minute cm ^2, so that the difference between maximum and minimum TV ₅ in the thickness of the backing pad at the point total of five points of the outer peripheral edge 5mm in two orthogonal diameters is 1 [mu] m or less Then, the wafer holding surface of the backing pad is precisely surface-ground.

The wafer holding jig 3 is manufactured with the backing pad 11 having the wafer holding surface precisely machined, being attached to the carrier plate 13. That is,
As shown in FIG. 4, one or more wafer positioning holes 18
The template 16 having the is attached to the carrier plate 13 via the adhesive 17.

The semiconductor wafer W has a backing pad 11
The backing pad 11 is inserted into the wafer positioning hole of the template 16 since the backing pad 11 is held by. This time,
A gap 19 is provided between the backing pad 11 and the template 16 because the backing pad 11 extends in the lateral direction due to pressing when the wafer is polished. The gap 19
It is preferably 0.5 to 1.5 mm.

That is, in consideration of the expansion of the backing pad 11 due to compressive deformation, this gap is set to 0.5 to 1.5 m depending on the hardness of the backing pad 11 and the pressurizing condition during polishing.
It is preferable to select appropriately within the range of m.

If the gap is less than 0.5 mm, the backing pad 11 comes into contact with the template 16 during polishing, so that the outer peripheral portion of the wafer holding surface of the backing pad 11 rises and the wafer W cannot be polished to a uniform thickness. Also,
If the gap exceeds 1.5 mm, the back surface of the wafer W is disengaged from the backing pad 11 due to the insertion position of the wafer W or the rocking during polishing, which is not preferable.

The template 16 also needs to have flatness and parallelism. At the time of polishing, the wafer W is attracted to the backing pad 11. At this time, water is applied to the wafer holding surface of the backing pad 11 to remove excess water on the surface, and then air is prevented from entering the interface between the wafer holding surface of the backing pad 11 and the wafer W.
Backing pad 1 while pressing the center of wafer W
Adsorb to 1.

In this way, by holding the wafer W on the wafer holding jig 3 shown in FIG. 4 and polishing it, a wafer W having good parallelism and flatness can be obtained. As this wafer holder 3, in addition to the batch-type polishing method for holding a large number of wafers on one carrier plate 13 as shown in FIG. 4, one wafer for one carrier plate is used. A single-wafer polishing method for holding a wafer can also be adopted. When the batch type wafer holder 3 (FIG. 4) is used, there is an advantage that productivity is improved as compared with the single wafer type polishing method.

After the completion of the above-mentioned secondary polishing step, finish polishing of the other surface of the semiconductor wafer is carried out if necessary. It should be noted that this finish polishing can of course be carried out by incorporating it in the above secondary polishing step.

[0047]

As described above, according to the present invention, it is possible to hold a plurality of wafers at a time because of batch processing, resulting in high productivity, and since the waxless backing pad is soft, dent defects do not occur. Very few,
Moreover, the double-side polishing has a great effect that the flatness becomes better than that of the conventional single-side polishing.

[Brief description of drawings]

FIG. 1 is a side view showing an embodiment of a single-side polishing machine used in the present invention.

2 is a structural cross-sectional view of a backing pad of the single-side polishing machine of FIG.

FIG. 3 is a cross-sectional view showing a state of precision flat surface processing of the backing pad of FIG.

4 is a sectional view of a wafer holding jig using the backing pad of FIG.

FIG. 5 is a cross-sectional explanatory view of a double-sided polishing device.

FIG. 6 is an explanatory top view showing a state in which the upper platen of the double-sided polishing device is removed.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Single-sided polishing device 2 Rotation surface plate 3 Wafer holding jig 4 Abrasives supply device 6 Polishing pad 7 Rotating shaft 8 Rotating shaft 9 Abrasives 11 Backing pad 12 Holes 13 Carrier plate 14, 17 Adhesive 15 Surface grinder 16 Template 18 Wafer positioning hole 22 Double-sided polishing device 24 Lower surface plate 24a Lower polishing cloth 26 Upper surface plate 26a Upper polishing cloth 28 Center gear 30 Internal gear 32 Carrier 34 Carrier hole 36 Nozzle 38 Through hole W Wafer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masami Nakano, Odaira, Ogokura, Nishigomura, Nishishirakawa-gun, Fukushima 150 Odaira, Shinagawa Semiconductor Shirakawa Laboratory (72) Hideo Kudo, Osakura, Nishigokawa, Fukushima Prefecture Ohira 150, Shin-Etsu Semiconductor Co., Ltd. Semiconductor Shirakawa Laboratory

Claims (6)

[Claims] 1. A primary polishing step of polishing both sides of a semiconductor wafer using a double-side polishing apparatus, and a template having one or more wafer positioning holes on a carrier plate using a single-side polishing apparatus for the positioning holes. A second method for polishing a semiconductor wafer, comprising a second polishing step of holding one surface of a semiconductor wafer and polishing the other surface of the semiconductor wafer by a wafer holding jig fixed so that a backing pad is inserted therein. . 2. The method of polishing a semiconductor wafer according to claim 1, further comprising a final polishing step of final polishing the other surface of the semiconductor wafer after the completion of the secondary polishing step. 3. The backing pad is made of a hydrophobic foam and has a thickness T ₁ and 18 under a load of 300 gf / cm ^2.
The difference (T ₁ -T ₂ ) from the thickness T ₂ when a load of 00 gf / cm ² is applied is
3. The method for polishing a semiconductor wafer according to claim 1, wherein the diameter is 1 to 100 .mu.m, holes are formed in the wafer holding surface, and the pore diameter is 10 to 30 .mu.m. 4. The backing pad is 300 gf / c
The difference between the maximum and minimum thicknesses at a total of 5 points, 5 mm from the center and the outer edge of two diameters orthogonal to each other when a load of m ² is applied for 1 minute TV ₅
2. A material having a thickness of 1 μm or less is used.
4. The method for polishing a semiconductor wafer according to claim 3. 5. The wafer holding surface of the backing pad is fixed to a carrier plate with the wafer holding surface facing upward, and the wafer holding surface of the backing pad has a flatness of 300 gf / cm by a precision surface grinder. A point meter 5 mm 5 mm from the outer edge of the two diameters orthogonal to the center when a load of ² is applied for 1 minute
In terms of the difference between the maximum and minimum thickness of the backing pad TV ₅
5. The method for polishing a semiconductor wafer according to any one of claims 1 to 4, wherein the surface is ground to a value of 1 μm or less. 6. A gap of 0.5 mm to 1.5 mm is provided between the inner peripheral edge of the wafer positioning hole of the template and the outer peripheral edge of the backing pad. 2. A method for polishing a semiconductor wafer according to item 1.